Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs.h
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #pragma once
29
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
33
34 extern "C" {
35
36 #include <sys/types.h>
37
38 #include "main/macros.h"
39 #include "main/shaderobj.h"
40 #include "main/uniforms.h"
41 #include "program/prog_parameter.h"
42 #include "program/prog_print.h"
43 #include "program/prog_optimize.h"
44 #include "util/register_allocate.h"
45 #include "program/hash_table.h"
46 #include "brw_context.h"
47 #include "brw_eu.h"
48 #include "brw_wm.h"
49 #include "intel_asm_annotation.h"
50 }
51 #include "glsl/nir/glsl_types.h"
52 #include "glsl/ir.h"
53 #include "glsl/nir/nir.h"
54 #include "program/sampler.h"
55
56 struct bblock_t;
57 namespace {
58 struct acp_entry;
59 }
60
61 namespace brw {
62 class fs_live_variables;
63 }
64
65 struct brw_gs_compile;
66
67 static inline fs_reg
68 offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
69 {
70 switch (reg.file) {
71 case BAD_FILE:
72 break;
73 case ARF:
74 case FIXED_GRF:
75 case MRF:
76 case VGRF:
77 case ATTR:
78 return byte_offset(reg,
79 delta * reg.component_size(bld.dispatch_width()));
80 case UNIFORM:
81 reg.reg_offset += delta;
82 break;
83 case IMM:
84 assert(delta == 0);
85 }
86 return reg;
87 }
88
89 /**
90 * The fragment shader front-end.
91 *
92 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
93 */
94 class fs_visitor : public backend_shader
95 {
96 public:
97 fs_visitor(const struct brw_compiler *compiler, void *log_data,
98 void *mem_ctx,
99 const void *key,
100 struct brw_stage_prog_data *prog_data,
101 struct gl_program *prog,
102 const nir_shader *shader,
103 unsigned dispatch_width,
104 int shader_time_index);
105 fs_visitor(const struct brw_compiler *compiler, void *log_data,
106 void *mem_ctx,
107 struct brw_gs_compile *gs_compile,
108 struct brw_gs_prog_data *prog_data,
109 const nir_shader *shader,
110 int shader_time_index);
111 void init();
112 ~fs_visitor();
113
114 fs_reg vgrf(const glsl_type *const type);
115 void import_uniforms(fs_visitor *v);
116 void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
117 void compute_clip_distance(gl_clip_plane *clip_planes);
118
119 fs_inst *get_instruction_generating_reg(fs_inst *start,
120 fs_inst *end,
121 const fs_reg &reg);
122
123 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
124 const fs_reg &dst,
125 const fs_reg &surf_index,
126 const fs_reg &varying_offset,
127 uint32_t const_offset);
128 void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
129
130 bool run_fs(bool do_rep_send);
131 bool run_vs(gl_clip_plane *clip_planes);
132 bool run_gs();
133 bool run_cs();
134 void optimize();
135 void allocate_registers();
136 void setup_payload_gen4();
137 void setup_payload_gen6();
138 void setup_vs_payload();
139 void setup_gs_payload();
140 void setup_cs_payload();
141 void fixup_3src_null_dest();
142 void assign_curb_setup();
143 void calculate_urb_setup();
144 void assign_urb_setup();
145 void convert_attr_sources_to_hw_regs(fs_inst *inst);
146 void assign_vs_urb_setup();
147 void assign_gs_urb_setup();
148 bool assign_regs(bool allow_spilling);
149 void assign_regs_trivial();
150 void calculate_payload_ranges(int payload_node_count,
151 int *payload_last_use_ip);
152 void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
153 int first_payload_node);
154 int choose_spill_reg(struct ra_graph *g);
155 void spill_reg(int spill_reg);
156 void split_virtual_grfs();
157 bool compact_virtual_grfs();
158 void assign_constant_locations();
159 void demote_pull_constants();
160 void invalidate_live_intervals();
161 void calculate_live_intervals();
162 void calculate_register_pressure();
163 void validate();
164 bool opt_algebraic();
165 bool opt_redundant_discard_jumps();
166 bool opt_cse();
167 bool opt_cse_local(bblock_t *block);
168 bool opt_copy_propagate();
169 bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
170 bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
171 bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
172 exec_list *acp);
173 bool opt_register_renaming();
174 bool register_coalesce();
175 bool compute_to_mrf();
176 bool eliminate_find_live_channel();
177 bool dead_code_eliminate();
178 bool remove_duplicate_mrf_writes();
179
180 bool opt_sampler_eot();
181 bool virtual_grf_interferes(int a, int b);
182 void schedule_instructions(instruction_scheduler_mode mode);
183 void insert_gen4_send_dependency_workarounds();
184 void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
185 fs_inst *inst);
186 void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
187 fs_inst *inst);
188 void vfail(const char *msg, va_list args);
189 void fail(const char *msg, ...);
190 void no16(const char *msg);
191 void lower_uniform_pull_constant_loads();
192 bool lower_load_payload();
193 bool lower_logical_sends();
194 bool lower_integer_multiplication();
195 bool lower_simd_width();
196 bool opt_combine_constants();
197
198 void emit_dummy_fs();
199 void emit_repclear_shader();
200 fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
201 bool origin_upper_left);
202 fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
203 glsl_interp_qualifier interpolation_mode,
204 bool is_centroid, bool is_sample);
205 fs_reg *emit_frontfacing_interpolation();
206 fs_reg *emit_samplepos_setup();
207 fs_reg *emit_sampleid_setup();
208 void emit_general_interpolation(fs_reg attr, const char *name,
209 const glsl_type *type,
210 glsl_interp_qualifier interpolation_mode,
211 int location, bool mod_centroid,
212 bool mod_sample);
213 fs_reg *emit_vs_system_value(int location);
214 void emit_interpolation_setup_gen4();
215 void emit_interpolation_setup_gen6();
216 void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
217 void emit_texture(ir_texture_opcode op,
218 const glsl_type *dest_type,
219 fs_reg coordinate, int components,
220 fs_reg shadow_c,
221 fs_reg lod, fs_reg dpdy, int grad_components,
222 fs_reg sample_index,
223 fs_reg offset,
224 fs_reg mcs,
225 int gather_component,
226 bool is_cube_array,
227 uint32_t surface,
228 fs_reg surface_reg,
229 uint32_t sampler,
230 fs_reg sampler_reg);
231 fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
232 const fs_reg &sampler);
233 void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
234 fs_reg resolve_source_modifiers(const fs_reg &src);
235 void emit_discard_jump();
236 bool opt_peephole_sel();
237 bool opt_peephole_predicated_break();
238 bool opt_saturate_propagation();
239 bool opt_cmod_propagation();
240 bool opt_zero_samples();
241 void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
242 uint32_t spill_offset, int count);
243 void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
244 uint32_t spill_offset, int count);
245
246 void emit_nir_code();
247 void nir_setup_inputs();
248 void nir_setup_outputs();
249 void nir_setup_uniforms();
250 void nir_emit_system_values();
251 void nir_emit_impl(nir_function_impl *impl);
252 void nir_emit_cf_list(exec_list *list);
253 void nir_emit_if(nir_if *if_stmt);
254 void nir_emit_loop(nir_loop *loop);
255 void nir_emit_block(nir_block *block);
256 void nir_emit_instr(nir_instr *instr);
257 void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
258 void nir_emit_load_const(const brw::fs_builder &bld,
259 nir_load_const_instr *instr);
260 void nir_emit_undef(const brw::fs_builder &bld,
261 nir_ssa_undef_instr *instr);
262 void nir_emit_vs_intrinsic(const brw::fs_builder &bld,
263 nir_intrinsic_instr *instr);
264 void nir_emit_gs_intrinsic(const brw::fs_builder &bld,
265 nir_intrinsic_instr *instr);
266 void nir_emit_fs_intrinsic(const brw::fs_builder &bld,
267 nir_intrinsic_instr *instr);
268 void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
269 nir_intrinsic_instr *instr);
270 void nir_emit_intrinsic(const brw::fs_builder &bld,
271 nir_intrinsic_instr *instr);
272 void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
273 int op, nir_intrinsic_instr *instr);
274 void nir_emit_texture(const brw::fs_builder &bld,
275 nir_tex_instr *instr);
276 void nir_emit_jump(const brw::fs_builder &bld,
277 nir_jump_instr *instr);
278 fs_reg get_nir_src(nir_src src);
279 fs_reg get_nir_dest(nir_dest dest);
280 fs_reg get_nir_image_deref(const nir_deref_var *deref);
281 void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
282 unsigned wr_mask);
283
284 bool optimize_frontfacing_ternary(nir_alu_instr *instr,
285 const fs_reg &result);
286
287 void emit_alpha_test();
288 fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
289 fs_reg color1, fs_reg color2,
290 fs_reg src0_alpha, unsigned components);
291 void emit_fb_writes();
292 void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg());
293 void set_gs_stream_control_data_bits(const fs_reg &vertex_count,
294 unsigned stream_id);
295 void emit_gs_control_data_bits(const fs_reg &vertex_count);
296 void emit_gs_end_primitive(const nir_src &vertex_count_nir_src);
297 void emit_gs_vertex(const nir_src &vertex_count_nir_src,
298 unsigned stream_id);
299 void emit_gs_thread_end();
300 void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
301 const fs_reg &indirect_offset, unsigned imm_offset,
302 unsigned num_components);
303 void emit_cs_terminate();
304 fs_reg *emit_cs_local_invocation_id_setup();
305 fs_reg *emit_cs_work_group_id_setup();
306
307 void emit_barrier();
308
309 void emit_shader_time_begin();
310 void emit_shader_time_end();
311 void SHADER_TIME_ADD(const brw::fs_builder &bld,
312 int shader_time_subindex,
313 fs_reg value);
314
315 fs_reg get_timestamp(const brw::fs_builder &bld);
316
317 struct brw_reg interp_reg(int location, int channel);
318
319 int implied_mrf_writes(fs_inst *inst);
320
321 virtual void dump_instructions();
322 virtual void dump_instructions(const char *name);
323 void dump_instruction(backend_instruction *inst);
324 void dump_instruction(backend_instruction *inst, FILE *file);
325
326 const void *const key;
327 const struct brw_sampler_prog_key_data *key_tex;
328
329 struct brw_gs_compile *gs_compile;
330
331 struct brw_stage_prog_data *prog_data;
332 struct gl_program *prog;
333
334 int *param_size;
335
336 int *virtual_grf_start;
337 int *virtual_grf_end;
338 brw::fs_live_variables *live_intervals;
339
340 int *regs_live_at_ip;
341
342 /** Number of uniform variable components visited. */
343 unsigned uniforms;
344
345 /** Byte-offset for the next available spot in the scratch space buffer. */
346 unsigned last_scratch;
347
348 /**
349 * Array mapping UNIFORM register numbers to the pull parameter index,
350 * or -1 if this uniform register isn't being uploaded as a pull constant.
351 */
352 int *pull_constant_loc;
353
354 /**
355 * Array mapping UNIFORM register numbers to the push parameter index,
356 * or -1 if this uniform register isn't being uploaded as a push constant.
357 */
358 int *push_constant_loc;
359
360 fs_reg frag_depth;
361 fs_reg frag_stencil;
362 fs_reg sample_mask;
363 fs_reg outputs[VARYING_SLOT_MAX];
364 unsigned output_components[VARYING_SLOT_MAX];
365 fs_reg dual_src_output;
366 bool do_dual_src;
367 int first_non_payload_grf;
368 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
369 unsigned max_grf;
370
371 fs_reg *nir_locals;
372 fs_reg *nir_ssa_values;
373 fs_reg nir_inputs;
374 fs_reg nir_outputs;
375 fs_reg *nir_system_values;
376
377 bool failed;
378 char *fail_msg;
379 bool simd16_unsupported;
380 char *no16_msg;
381
382 /* Result of last visit() method. Still used by emit_texture() */
383 fs_reg result;
384
385 /** Register numbers for thread payload fields. */
386 struct thread_payload {
387 uint8_t source_depth_reg;
388 uint8_t source_w_reg;
389 uint8_t aa_dest_stencil_reg;
390 uint8_t dest_depth_reg;
391 uint8_t sample_pos_reg;
392 uint8_t sample_mask_in_reg;
393 uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
394 uint8_t local_invocation_id_reg;
395
396 /** The number of thread payload registers the hardware will supply. */
397 uint8_t num_regs;
398 } payload;
399
400 bool source_depth_to_render_target;
401 bool runtime_check_aads_emit;
402
403 fs_reg pixel_x;
404 fs_reg pixel_y;
405 fs_reg wpos_w;
406 fs_reg pixel_w;
407 fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
408 fs_reg shader_start_time;
409 fs_reg userplane[MAX_CLIP_PLANES];
410 fs_reg final_gs_vertex_count;
411 fs_reg control_data_bits;
412
413 unsigned grf_used;
414 bool spilled_any_registers;
415
416 const unsigned dispatch_width; /**< 8 or 16 */
417
418 int shader_time_index;
419
420 unsigned promoted_constants;
421 brw::fs_builder bld;
422 };
423
424 /**
425 * The fragment shader code generator.
426 *
427 * Translates FS IR to actual i965 assembly code.
428 */
429 class fs_generator
430 {
431 public:
432 fs_generator(const struct brw_compiler *compiler, void *log_data,
433 void *mem_ctx,
434 const void *key,
435 struct brw_stage_prog_data *prog_data,
436 unsigned promoted_constants,
437 bool runtime_check_aads_emit,
438 const char *stage_abbrev);
439 ~fs_generator();
440
441 void enable_debug(const char *shader_name);
442 int generate_code(const cfg_t *cfg, int dispatch_width);
443 const unsigned *get_assembly(unsigned int *assembly_size);
444
445 private:
446 void fire_fb_write(fs_inst *inst,
447 struct brw_reg payload,
448 struct brw_reg implied_header,
449 GLuint nr);
450 void generate_fb_write(fs_inst *inst, struct brw_reg payload);
451 void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload);
452 void generate_urb_write(fs_inst *inst, struct brw_reg payload);
453 void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
454 void generate_stencil_ref_packing(fs_inst *inst, struct brw_reg dst,
455 struct brw_reg src);
456 void generate_barrier(fs_inst *inst, struct brw_reg src);
457 void generate_blorp_fb_write(fs_inst *inst);
458 void generate_linterp(fs_inst *inst, struct brw_reg dst,
459 struct brw_reg *src);
460 void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
461 struct brw_reg surface_index,
462 struct brw_reg sampler_index);
463 void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
464 struct brw_reg src,
465 struct brw_reg surf_index);
466 void generate_math_gen6(fs_inst *inst,
467 struct brw_reg dst,
468 struct brw_reg src0,
469 struct brw_reg src1);
470 void generate_math_gen4(fs_inst *inst,
471 struct brw_reg dst,
472 struct brw_reg src);
473 void generate_math_g45(fs_inst *inst,
474 struct brw_reg dst,
475 struct brw_reg src);
476 void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
477 void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
478 bool negate_value);
479 void generate_scratch_write(fs_inst *inst, struct brw_reg src);
480 void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
481 void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
482 void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
483 struct brw_reg index,
484 struct brw_reg offset);
485 void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
486 struct brw_reg dst,
487 struct brw_reg surf_index,
488 struct brw_reg offset);
489 void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
490 struct brw_reg index,
491 struct brw_reg offset);
492 void generate_varying_pull_constant_load_gen7(fs_inst *inst,
493 struct brw_reg dst,
494 struct brw_reg index,
495 struct brw_reg offset);
496 void generate_mov_dispatch_to_flags(fs_inst *inst);
497
498 void generate_pixel_interpolator_query(fs_inst *inst,
499 struct brw_reg dst,
500 struct brw_reg src,
501 struct brw_reg msg_data,
502 unsigned msg_type);
503
504 void generate_set_sample_id(fs_inst *inst,
505 struct brw_reg dst,
506 struct brw_reg src0,
507 struct brw_reg src1);
508
509 void generate_set_simd4x2_offset(fs_inst *inst,
510 struct brw_reg dst,
511 struct brw_reg offset);
512 void generate_discard_jump(fs_inst *inst);
513
514 void generate_pack_half_2x16_split(fs_inst *inst,
515 struct brw_reg dst,
516 struct brw_reg x,
517 struct brw_reg y);
518 void generate_unpack_half_2x16_split(fs_inst *inst,
519 struct brw_reg dst,
520 struct brw_reg src);
521
522 void generate_shader_time_add(fs_inst *inst,
523 struct brw_reg payload,
524 struct brw_reg offset,
525 struct brw_reg value);
526
527 void generate_mov_indirect(fs_inst *inst,
528 struct brw_reg dst,
529 struct brw_reg reg,
530 struct brw_reg indirect_byte_offset);
531
532 bool patch_discard_jumps_to_fb_writes();
533
534 const struct brw_compiler *compiler;
535 void *log_data; /* Passed to compiler->*_log functions */
536
537 const struct brw_device_info *devinfo;
538
539 struct brw_codegen *p;
540 const void * const key;
541 struct brw_stage_prog_data * const prog_data;
542
543 unsigned dispatch_width; /**< 8 or 16 */
544
545 exec_list discard_halt_patches;
546 unsigned promoted_constants;
547 bool runtime_check_aads_emit;
548 bool debug_flag;
549 const char *shader_name;
550 const char *stage_abbrev;
551 void *mem_ctx;
552 };
553
554 bool brw_do_channel_expressions(struct exec_list *instructions);
555 bool brw_do_vector_splitting(struct exec_list *instructions);