src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "compiler/brw_nir.h"
  26 #include "brw_program.h"
  27 #include "compiler/glsl/gl_nir.h"
  28 #include "compiler/glsl/gl_nir_linker.h"
  29 #include "compiler/glsl/ir.h"
  30 #include "compiler/glsl/ir_optimization.h"
  31 #include "compiler/glsl/program.h"
  32 #include "compiler/nir/nir_serialize.h"
  33 #include "program/program.h"
  34 #include "main/glspirv.h"
  35 #include "main/mtypes.h"
  36 #include "main/shaderapi.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39
  40 /**
  41  * Performs a compile of the shader stages even when we don't know
  42  * what non-orthogonal state will be set, in the hope that it reflects
  43  * the eventual NOS used, and thus allows us to produce link failures.
  44  */
  45 static bool
  46 brw_shader_precompile(struct gl_context *ctx,
  47                       struct gl_shader_program *sh_prog)
  48 {
  49    struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  50    struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
  51    struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
  52    struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  53    struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  54    struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  55
  56    if (fs && !brw_fs_precompile(ctx, fs->Program))
  57       return false;
  58
  59    if (gs && !brw_gs_precompile(ctx, gs->Program))
  60       return false;
  61
  62    if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
  63       return false;
  64
  65    if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
  66       return false;
  67
  68    if (vs && !brw_vs_precompile(ctx, vs->Program))
  69       return false;
  70
  71    if (cs && !brw_cs_precompile(ctx, cs->Program))
  72       return false;
  73
  74    return true;
  75 }
  76
  77 static void
  78 brw_lower_packing_builtins(struct brw_context *brw,
  79                            exec_list *ir)
  80 {
  81    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  82
  83    /* Gens < 7 don't have instructions to convert to or from half-precision,
  84     * and Gens < 6 don't expose that functionality.
  85     */
  86    if (devinfo->gen != 6)
  87       return;
  88
  89    lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
  90 }
  91
  92 static void
  93 process_glsl_ir(struct brw_context *brw,
  94                 struct gl_shader_program *shader_prog,
  95                 struct gl_linked_shader *shader)
  96 {
  97    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  98    struct gl_context *ctx = &brw->ctx;
  99
 100    /* Temporary memory context for any new IR. */
 101    void *mem_ctx = ralloc_context(NULL);
 102
 103    ralloc_adopt(mem_ctx, shader->ir);
 104
 105    lower_blend_equation_advanced(
 106       shader, ctx->Extensions.KHR_blend_equation_advanced_coherent);
 107
 108    /* lower_packing_builtins() inserts arithmetic instructions, so it
 109     * must precede lower_instructions().
 110     */
 111    brw_lower_packing_builtins(brw, shader->ir);
 112    do_mat_op_to_vec(shader->ir);
 113
 114    unsigned instructions_to_lower = (DIV_TO_MUL_RCP |
 115                                      SUB_TO_ADD_NEG |
 116                                      EXP_TO_EXP2 |
 117                                      LOG_TO_LOG2 |
 118                                      DFREXP_DLDEXP_TO_ARITH);
 119    if (devinfo->gen < 7) {
 120       instructions_to_lower |= BIT_COUNT_TO_MATH |
 121                                EXTRACT_TO_SHIFTS |
 122                                INSERT_TO_SHIFTS |
 123                                REVERSE_TO_SHIFTS;
 124    }
 125
 126    lower_instructions(shader->ir, instructions_to_lower);
 127
 128    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 129     * if-statements need to be flattened.
 130     */
 131    if (devinfo->gen < 6)
 132       lower_if_to_cond_assign(shader->Stage, shader->ir, 16);
 133
 134    do_lower_texture_projection(shader->ir);
 135    do_vec_index_to_cond_assign(shader->ir);
 136    lower_vector_insert(shader->ir, true);
 137    lower_offset_arrays(shader->ir);
 138    lower_quadop_vector(shader->ir, false);
 139
 140    validate_ir_tree(shader->ir);
 141
 142    /* Now that we've finished altering the linked IR, reparent any live IR back
 143     * to the permanent memory context, and free the temporary one (discarding any
 144     * junk we optimized away).
 145     */
 146    reparent_ir(shader->ir, shader->ir);
 147    ralloc_free(mem_ctx);
 148
 149    if (ctx->_Shader->Flags & GLSL_DUMP) {
 150       fprintf(stderr, "\n");
 151       if (shader->ir) {
 152          fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 153                  _mesa_shader_stage_to_string(shader->Stage),
 154                  shader_prog->Name);
 155          _mesa_print_ir(stderr, shader->ir, NULL);
 156       } else {
 157          fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be "
 158                  "from cache)\n", _mesa_shader_stage_to_string(shader->Stage),
 159                  shader_prog->Name);
 160       }
 161       fprintf(stderr, "\n");
 162    }
 163 }
 164
 165 static void
 166 unify_interfaces(struct shader_info **infos)
 167 {
 168    struct shader_info *prev_info = NULL;
 169
 170    for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) {
 171       if (!infos[i])
 172          continue;
 173
 174       if (prev_info) {
 175          prev_info->outputs_written |= infos[i]->inputs_read &
 176             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 177          infos[i]->inputs_read |= prev_info->outputs_written &
 178             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 179
 180          prev_info->patch_outputs_written |= infos[i]->patch_inputs_read;
 181          infos[i]->patch_inputs_read |= prev_info->patch_outputs_written;
 182       }
 183       prev_info = infos[i];
 184    }
 185 }
 186
 187 static void
 188 update_xfb_info(struct gl_transform_feedback_info *xfb_info,
 189                 struct shader_info *info)
 190 {
 191    if (!xfb_info)
 192       return;
 193
 194    for (unsigned i = 0; i < xfb_info->NumOutputs; i++) {
 195       struct gl_transform_feedback_output *output = &xfb_info->Outputs[i];
 196
 197       /* The VUE header contains three scalar fields packed together:
 198        * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
 199        * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
 200        * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
 201        */
 202       switch (output->OutputRegister) {
 203       case VARYING_SLOT_LAYER:
 204          assert(output->NumComponents == 1);
 205          output->OutputRegister = VARYING_SLOT_PSIZ;
 206          output->ComponentOffset = 1;
 207          break;
 208       case VARYING_SLOT_VIEWPORT:
 209          assert(output->NumComponents == 1);
 210          output->OutputRegister = VARYING_SLOT_PSIZ;
 211          output->ComponentOffset = 2;
 212          break;
 213       case VARYING_SLOT_PSIZ:
 214          assert(output->NumComponents == 1);
 215          output->ComponentOffset = 3;
 216          break;
 217       }
 218
 219       info->outputs_written |= 1ull << output->OutputRegister;
 220    }
 221 }
 222
 223 extern "C" GLboolean
 224 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 225 {
 226    struct brw_context *brw = brw_context(ctx);
 227    const struct brw_compiler *compiler = brw->screen->compiler;
 228    unsigned int stage;
 229    struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
 230
 231    if (shProg->data->LinkStatus == LINKING_SKIPPED)
 232       return GL_TRUE;
 233
 234    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 235       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 236       if (!shader)
 237          continue;
 238
 239       struct gl_program *prog = shader->Program;
 240       prog->Parameters = _mesa_new_parameter_list();
 241
 242       if (!shader->spirv_data)
 243          process_glsl_ir(brw, shProg, shader);
 244
 245       _mesa_copy_linked_program_data(shProg, shader);
 246
 247       prog->ShadowSamplers = shader->shadow_samplers;
 248
 249       bool debug_enabled =
 250          (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage));
 251
 252       if (debug_enabled && shader->ir) {
 253          fprintf(stderr, "GLSL IR for native %s shader %d:\n",
 254                  _mesa_shader_stage_to_string(shader->Stage), shProg->Name);
 255          _mesa_print_ir(stderr, shader->ir, NULL);
 256          fprintf(stderr, "\n\n");
 257       }
 258
 259       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 260                                  compiler->scalar_stage[stage]);
 261    }
 262
 263    /* TODO: Verify if its feasible to split up the NIR linking work into a
 264     * per-stage part (that fill out information we need for the passes) and a
 265     * actual linking part, so that we could fold back brw_nir_lower_resources
 266     * back into brw_create_nir.
 267     */
 268
 269    /* SPIR-V programs use a NIR linker */
 270    if (shProg->data->spirv) {
 271       static const gl_nir_linker_options opts = {
 272          .fill_parameters = false,
 273       };
 274       if (!gl_nir_link_spirv(ctx, shProg, &opts))
 275          return GL_FALSE;
 276    }
 277
 278    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 279       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 280       if (!shader)
 281          continue;
 282
 283       struct gl_program *prog = shader->Program;
 284
 285       brw_nir_lower_resources(prog->nir, shProg, prog, &brw->screen->devinfo);
 286
 287       NIR_PASS_V(prog->nir, brw_nir_lower_gl_images, prog);
 288    }
 289
 290    /* Determine first and last stage. */
 291    unsigned first = MESA_SHADER_STAGES;
 292    unsigned last = 0;
 293    for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
 294       if (!shProg->_LinkedShaders[i])
 295          continue;
 296       if (first == MESA_SHADER_STAGES)
 297          first = i;
 298       last = i;
 299    }
 300
 301    /* Linking the stages in the opposite order (from fragment to vertex)
 302     * ensures that inter-shader outputs written to in an earlier stage
 303     * are eliminated if they are (transitively) not used in a later
 304     * stage.
 305     *
 306     * TODO: Look into Shadow of Mordor regressions on HSW and enable this for
 307     * all platforms. See: https://bugs.freedesktop.org/show_bug.cgi?id=103537
 308     */
 309     if (first != last && brw->screen->devinfo.gen >= 8) {
 310        int next = last;
 311        for (int i = next - 1; i >= 0; i--) {
 312           if (shProg->_LinkedShaders[i] == NULL)
 313              continue;
 314
 315           brw_nir_link_shaders(compiler,
 316                                shProg->_LinkedShaders[i]->Program->nir,
 317                                shProg->_LinkedShaders[next]->Program->nir);
 318           next = i;
 319        }
 320     }
 321
 322    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 323       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 324       if (!shader)
 325          continue;
 326
 327       struct gl_program *prog = shader->Program;
 328
 329       _mesa_update_shader_textures_used(shProg, prog);
 330
 331       brw_shader_gather_info(prog->nir, prog);
 332
 333       NIR_PASS_V(prog->nir, gl_nir_lower_atomics, shProg, false);
 334       NIR_PASS_V(prog->nir, nir_lower_atomics_to_ssbo);
 335
 336       nir_sweep(prog->nir);
 337
 338       infos[stage] = &prog->nir->info;
 339
 340       update_xfb_info(prog->sh.LinkedTransformFeedback, infos[stage]);
 341
 342       /* Make a pass over the IR to add state references for any built-in
 343        * uniforms that are used.  This has to be done now (during linking).
 344        * Code generation doesn't happen until the first time this shader is
 345        * used for rendering.  Waiting until then to generate the parameters is
 346        * too late.  At that point, the values for the built-in uniforms won't
 347        * get sent to the shader.
 348        */
 349       nir_foreach_variable(var, &prog->nir->uniforms) {
 350          const nir_state_slot *const slots = var->state_slots;
 351          for (unsigned int i = 0; i < var->num_state_slots; i++) {
 352             assert(slots != NULL);
 353             _mesa_add_state_reference(prog->Parameters, slots[i].tokens);
 354          }
 355       }
 356    }
 357
 358    /* The linker tries to dead code eliminate unused varying components,
 359     * and make sure interfaces match.  But it isn't able to do so in all
 360     * cases.  So, explicitly make the interfaces match by OR'ing together
 361     * the inputs_read/outputs_written bitfields of adjacent stages.
 362     */
 363    if (!shProg->SeparateShader)
 364       unify_interfaces(infos);
 365
 366    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 367       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 368          const struct gl_shader *sh = shProg->Shaders[i];
 369          if (!sh)
 370             continue;
 371
 372          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 373                  _mesa_shader_stage_to_string(sh->Stage),
 374                  i, shProg->Name);
 375          fprintf(stderr, "%s", sh->Source);
 376          fprintf(stderr, "\n");
 377       }
 378    }
 379
 380    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 381       return GL_FALSE;
 382
 383    /* SPIR-V programs build its resource list from linked NIR shaders. */
 384    if (!shProg->data->spirv)
 385       build_program_resource_list(ctx, shProg, false);
 386    else
 387       nir_build_program_resource_list(ctx, shProg, true);
 388
 389    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 390       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 391       if (!shader)
 392          continue;
 393
 394       /* The GLSL IR won't be needed anymore. */
 395       ralloc_free(shader->ir);
 396       shader->ir = NULL;
 397    }
 398
 399    return GL_TRUE;
 400 }