i965: remove remaining tabs in brw_link.cpp
[mesa.git] / src / mesa / drivers / dri / i965 / brw_link.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_shader.h"
26 #include "brw_fs.h"
27 #include "brw_nir.h"
28 #include "brw_program.h"
29 #include "compiler/glsl/ir.h"
30 #include "compiler/glsl/ir_optimization.h"
31 #include "compiler/glsl/program.h"
32 #include "program/program.h"
33 #include "main/shaderapi.h"
34 #include "main/shaderobj.h"
35 #include "main/uniforms.h"
36
37 /**
38 * Performs a compile of the shader stages even when we don't know
39 * what non-orthogonal state will be set, in the hope that it reflects
40 * the eventual NOS used, and thus allows us to produce link failures.
41 */
42 static bool
43 brw_shader_precompile(struct gl_context *ctx,
44 struct gl_shader_program *sh_prog)
45 {
46 struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
47 struct gl_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
48 struct gl_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
49 struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
50 struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
51 struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
52
53 if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
54 return false;
55
56 if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
57 return false;
58
59 if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
60 return false;
61
62 if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
63 return false;
64
65 if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
66 return false;
67
68 if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
69 return false;
70
71 return true;
72 }
73
74 static void
75 brw_lower_packing_builtins(struct brw_context *brw,
76 gl_shader_stage shader_type,
77 exec_list *ir)
78 {
79 /* Gens < 7 don't have instructions to convert to or from half-precision,
80 * and Gens < 6 don't expose that functionality.
81 */
82 if (brw->gen != 6)
83 return;
84
85 lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
86 }
87
88 static void
89 process_glsl_ir(gl_shader_stage stage,
90 struct brw_context *brw,
91 struct gl_shader_program *shader_prog,
92 struct gl_shader *shader)
93 {
94 struct gl_context *ctx = &brw->ctx;
95 const struct brw_compiler *compiler = brw->intelScreen->compiler;
96 const struct gl_shader_compiler_options *options =
97 &ctx->Const.ShaderCompilerOptions[shader->Stage];
98
99 /* Temporary memory context for any new IR. */
100 void *mem_ctx = ralloc_context(NULL);
101
102 ralloc_adopt(mem_ctx, shader->ir);
103
104 /* lower_packing_builtins() inserts arithmetic instructions, so it
105 * must precede lower_instructions().
106 */
107 brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
108 do_mat_op_to_vec(shader->ir);
109 lower_instructions(shader->ir,
110 DIV_TO_MUL_RCP |
111 SUB_TO_ADD_NEG |
112 EXP_TO_EXP2 |
113 LOG_TO_LOG2 |
114 DFREXP_DLDEXP_TO_ARITH |
115 CARRY_TO_ARITH |
116 BORROW_TO_ARITH);
117
118 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
119 * if-statements need to be flattened.
120 */
121 if (brw->gen < 6)
122 lower_if_to_cond_assign(shader->ir, 16);
123
124 do_lower_texture_projection(shader->ir);
125 brw_lower_texture_gradients(brw, shader->ir);
126 do_vec_index_to_cond_assign(shader->ir);
127 lower_vector_insert(shader->ir, true);
128 lower_offset_arrays(shader->ir);
129 brw_do_lower_unnormalized_offset(shader->ir);
130 lower_noise(shader->ir);
131 lower_quadop_vector(shader->ir, false);
132
133 bool lowered_variable_indexing =
134 lower_variable_index_to_cond_assign((gl_shader_stage)stage,
135 shader->ir,
136 options->EmitNoIndirectInput,
137 options->EmitNoIndirectOutput,
138 options->EmitNoIndirectTemp,
139 options->EmitNoIndirectUniform);
140
141 if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
142 perf_debug("Unsupported form of variable indexing in %s; falling "
143 "back to very inefficient code generation\n",
144 _mesa_shader_stage_to_abbrev(shader->Stage));
145 }
146
147 bool progress;
148 do {
149 progress = false;
150
151 if (compiler->scalar_stage[shader->Stage]) {
152 if (shader->Stage == MESA_SHADER_VERTEX ||
153 shader->Stage == MESA_SHADER_FRAGMENT)
154 brw_do_channel_expressions(shader->ir);
155 brw_do_vector_splitting(shader->ir);
156 }
157
158 progress = do_lower_jumps(shader->ir, true, true,
159 true, /* main return */
160 false, /* continue */
161 false /* loops */
162 ) || progress;
163
164 progress = do_common_optimization(shader->ir, true, true,
165 options, ctx->Const.NativeIntegers) || progress;
166 } while (progress);
167
168 validate_ir_tree(shader->ir);
169
170 /* Now that we've finished altering the linked IR, reparent any live IR back
171 * to the permanent memory context, and free the temporary one (discarding any
172 * junk we optimized away).
173 */
174 reparent_ir(shader->ir, shader->ir);
175 ralloc_free(mem_ctx);
176
177 if (ctx->_Shader->Flags & GLSL_DUMP) {
178 fprintf(stderr, "\n");
179 fprintf(stderr, "GLSL IR for linked %s program %d:\n",
180 _mesa_shader_stage_to_string(shader->Stage),
181 shader_prog->Name);
182 _mesa_print_ir(stderr, shader->ir, NULL);
183 fprintf(stderr, "\n");
184 }
185 }
186
187 extern "C" struct gl_shader *
188 brw_new_shader(struct gl_context *ctx, GLuint name, gl_shader_stage stage)
189 {
190 struct brw_shader *shader;
191
192 shader = rzalloc(NULL, struct brw_shader);
193 if (shader) {
194 shader->base.Stage = stage;
195 shader->base.Name = name;
196 _mesa_init_shader(ctx, &shader->base);
197 }
198
199 return &shader->base;
200 }
201
202 extern "C" GLboolean
203 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
204 {
205 struct brw_context *brw = brw_context(ctx);
206 const struct brw_compiler *compiler = brw->intelScreen->compiler;
207 unsigned int stage;
208
209 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
210 struct gl_shader *shader = shProg->_LinkedShaders[stage];
211 if (!shader)
212 continue;
213
214 struct gl_program *prog =
215 ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
216 shader->Name);
217 if (!prog)
218 return false;
219 prog->Parameters = _mesa_new_parameter_list();
220
221 _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
222
223 process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
224
225 /* Make a pass over the IR to add state references for any built-in
226 * uniforms that are used. This has to be done now (during linking).
227 * Code generation doesn't happen until the first time this shader is
228 * used for rendering. Waiting until then to generate the parameters is
229 * too late. At that point, the values for the built-in uniforms won't
230 * get sent to the shader.
231 */
232 foreach_in_list(ir_instruction, node, shader->ir) {
233 ir_variable *var = node->as_variable();
234
235 if ((var == NULL) || (var->data.mode != ir_var_uniform)
236 || (strncmp(var->name, "gl_", 3) != 0))
237 continue;
238
239 const ir_state_slot *const slots = var->get_state_slots();
240 assert(slots != NULL);
241
242 for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
243 _mesa_add_state_reference(prog->Parameters,
244 (gl_state_index *) slots[i].tokens);
245 }
246 }
247
248 do_set_program_inouts(shader->ir, prog, shader->Stage);
249
250 prog->SamplersUsed = shader->active_samplers;
251 prog->ShadowSamplers = shader->shadow_samplers;
252 _mesa_update_shader_textures_used(shProg, prog);
253
254 _mesa_reference_program(ctx, &shader->Program, prog);
255
256 brw_add_texrect_params(prog);
257
258 prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
259 compiler->scalar_stage[stage]);
260
261 _mesa_reference_program(ctx, &prog, NULL);
262 }
263
264 if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
265 for (unsigned i = 0; i < shProg->NumShaders; i++) {
266 const struct gl_shader *sh = shProg->Shaders[i];
267 if (!sh)
268 continue;
269
270 fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
271 _mesa_shader_stage_to_string(sh->Stage),
272 i, shProg->Name);
273 fprintf(stderr, "%s", sh->Source);
274 fprintf(stderr, "\n");
275 }
276 }
277
278 if (brw->precompile && !brw_shader_precompile(ctx, shProg))
279 return false;
280
281 build_program_resource_list(ctx, shProg);
282 return true;
283 }