src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_shader.h"
  26 #include "brw_fs.h"
  27 #include "brw_nir.h"
  28 #include "brw_program.h"
  29 #include "glsl/ir_optimization.h"
  30 #include "glsl/glsl_parser_extras.h"
  31 #include "program/program.h"
  32 #include "main/shaderapi.h"
  33 #include "main/uniforms.h"
  34
  35 /**
  36  * Performs a compile of the shader stages even when we don't know
  37  * what non-orthogonal state will be set, in the hope that it reflects
  38  * the eventual NOS used, and thus allows us to produce link failures.
  39  */
  40 static bool
  41 brw_shader_precompile(struct gl_context *ctx,
  42                       struct gl_shader_program *sh_prog)
  43 {
  44    struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  45    struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  46    struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  47    struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  48
  49    if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
  50       return false;
  51
  52    if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
  53       return false;
  54
  55    if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
  56       return false;
  57
  58    if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
  59       return false;
  60
  61    return true;
  62 }
  63
  64 static void
  65 brw_lower_packing_builtins(struct brw_context *brw,
  66                            gl_shader_stage shader_type,
  67                            exec_list *ir)
  68 {
  69    const struct brw_compiler *compiler = brw->intelScreen->compiler;
  70
  71    int ops = LOWER_PACK_SNORM_2x16
  72            | LOWER_UNPACK_SNORM_2x16
  73            | LOWER_PACK_UNORM_2x16
  74            | LOWER_UNPACK_UNORM_2x16;
  75
  76    if (compiler->scalar_stage[shader_type]) {
  77       ops |= LOWER_UNPACK_UNORM_4x8
  78            | LOWER_UNPACK_SNORM_4x8
  79            | LOWER_PACK_UNORM_4x8
  80            | LOWER_PACK_SNORM_4x8;
  81    }
  82
  83    if (brw->gen >= 7) {
  84       /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
  85        * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
  86        * lowering is needed. For SOA code, the Half2x16 ops must be
  87        * scalarized.
  88        */
  89       if (compiler->scalar_stage[shader_type]) {
  90          ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
  91              |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
  92       }
  93    } else {
  94       ops |= LOWER_PACK_HALF_2x16
  95           |  LOWER_UNPACK_HALF_2x16;
  96    }
  97
  98    lower_packing_builtins(ir, ops);
  99 }
 100
 101 static void
 102 process_glsl_ir(gl_shader_stage stage,
 103                 struct brw_context *brw,
 104                 struct gl_shader_program *shader_prog,
 105                 struct gl_shader *shader)
 106 {
 107    struct gl_context *ctx = &brw->ctx;
 108    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 109    const struct gl_shader_compiler_options *options =
 110       &ctx->Const.ShaderCompilerOptions[shader->Stage];
 111
 112    /* Temporary memory context for any new IR. */
 113    void *mem_ctx = ralloc_context(NULL);
 114
 115    ralloc_adopt(mem_ctx, shader->ir);
 116
 117    /* lower_packing_builtins() inserts arithmetic instructions, so it
 118     * must precede lower_instructions().
 119     */
 120    brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
 121    do_mat_op_to_vec(shader->ir);
 122    const int bitfield_insert = brw->gen >= 7 ? BITFIELD_INSERT_TO_BFM_BFI : 0;
 123    lower_instructions(shader->ir,
 124                       MOD_TO_FLOOR |
 125                       DIV_TO_MUL_RCP |
 126                       SUB_TO_ADD_NEG |
 127                       EXP_TO_EXP2 |
 128                       LOG_TO_LOG2 |
 129                       bitfield_insert |
 130                       LDEXP_TO_ARITH |
 131                       CARRY_TO_ARITH |
 132                       BORROW_TO_ARITH);
 133
 134    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 135     * if-statements need to be flattened.
 136     */
 137    if (brw->gen < 6)
 138       lower_if_to_cond_assign(shader->ir, 16);
 139
 140    do_lower_texture_projection(shader->ir);
 141    brw_lower_texture_gradients(brw, shader->ir);
 142    do_vec_index_to_cond_assign(shader->ir);
 143    lower_vector_insert(shader->ir, true);
 144    lower_offset_arrays(shader->ir);
 145    brw_do_lower_unnormalized_offset(shader->ir);
 146    lower_noise(shader->ir);
 147    lower_quadop_vector(shader->ir, false);
 148
 149    bool lowered_variable_indexing =
 150       lower_variable_index_to_cond_assign((gl_shader_stage)stage,
 151                                           shader->ir,
 152                                           options->EmitNoIndirectInput,
 153                                           options->EmitNoIndirectOutput,
 154                                           options->EmitNoIndirectTemp,
 155                                           options->EmitNoIndirectUniform);
 156
 157    if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 158       perf_debug("Unsupported form of variable indexing in %s; falling "
 159                  "back to very inefficient code generation\n",
 160                  _mesa_shader_stage_to_abbrev(shader->Stage));
 161    }
 162
 163    bool progress;
 164    do {
 165       progress = false;
 166
 167       if (compiler->scalar_stage[shader->Stage]) {
 168          brw_do_channel_expressions(shader->ir);
 169          brw_do_vector_splitting(shader->ir);
 170       }
 171
 172       progress = do_lower_jumps(shader->ir, true, true,
 173                                 true, /* main return */
 174                                 false, /* continue */
 175                                 false /* loops */
 176                                 ) || progress;
 177
 178       progress = do_common_optimization(shader->ir, true, true,
 179                                         options, ctx->Const.NativeIntegers) || progress;
 180    } while (progress);
 181
 182    validate_ir_tree(shader->ir);
 183
 184    /* Now that we've finished altering the linked IR, reparent any live IR back
 185     * to the permanent memory context, and free the temporary one (discarding any
 186     * junk we optimized away).
 187     */
 188    reparent_ir(shader->ir, shader->ir);
 189    ralloc_free(mem_ctx);
 190
 191    if (ctx->_Shader->Flags & GLSL_DUMP) {
 192       fprintf(stderr, "\n");
 193       fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 194               _mesa_shader_stage_to_string(shader->Stage),
 195               shader_prog->Name);
 196       _mesa_print_ir(stderr, shader->ir, NULL);
 197       fprintf(stderr, "\n");
 198    }
 199 }
 200
 201 extern "C" GLboolean
 202 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 203 {
 204    struct brw_context *brw = brw_context(ctx);
 205    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 206    unsigned int stage;
 207
 208    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 209       struct gl_shader *shader = shProg->_LinkedShaders[stage];
 210       if (!shader)
 211          continue;
 212
 213       struct gl_program *prog =
 214          ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
 215                                 shader->Name);
 216       if (!prog)
 217         return false;
 218       prog->Parameters = _mesa_new_parameter_list();
 219
 220       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 221
 222       process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
 223
 224       /* Make a pass over the IR to add state references for any built-in
 225        * uniforms that are used.  This has to be done now (during linking).
 226        * Code generation doesn't happen until the first time this shader is
 227        * used for rendering.  Waiting until then to generate the parameters is
 228        * too late.  At that point, the values for the built-in uniforms won't
 229        * get sent to the shader.
 230        */
 231       foreach_in_list(ir_instruction, node, shader->ir) {
 232          ir_variable *var = node->as_variable();
 233
 234          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 235              || (strncmp(var->name, "gl_", 3) != 0))
 236             continue;
 237
 238          const ir_state_slot *const slots = var->get_state_slots();
 239          assert(slots != NULL);
 240
 241          for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
 242             _mesa_add_state_reference(prog->Parameters,
 243                                       (gl_state_index *) slots[i].tokens);
 244          }
 245       }
 246
 247       do_set_program_inouts(shader->ir, prog, shader->Stage);
 248
 249       prog->SamplersUsed = shader->active_samplers;
 250       prog->ShadowSamplers = shader->shadow_samplers;
 251       _mesa_update_shader_textures_used(shProg, prog);
 252
 253       _mesa_reference_program(ctx, &shader->Program, prog);
 254
 255       brw_add_texrect_params(prog);
 256
 257       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 258                                  compiler->scalar_stage[stage]);
 259
 260       _mesa_reference_program(ctx, &prog, NULL);
 261    }
 262
 263    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 264       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 265          const struct gl_shader *sh = shProg->Shaders[i];
 266          if (!sh)
 267             continue;
 268
 269          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 270                  _mesa_shader_stage_to_string(sh->Stage),
 271                  i, shProg->Name);
 272          fprintf(stderr, "%s", sh->Source);
 273          fprintf(stderr, "\n");
 274       }
 275    }
 276
 277    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 278       return false;
 279
 280    return true;
 281 }