2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "main/macros.h"
29 #include "shader/program.h"
30 #include "shader/prog_print.h"
31 #include "brw_context.h"
32 #include "brw_defines.h"
36 is_single_channel_dp4(struct brw_instruction
*insn
)
38 if (insn
->header
.opcode
!= BRW_OPCODE_DP4
||
39 insn
->header
.execution_size
!= BRW_EXECUTE_8
||
40 insn
->header
.access_mode
!= BRW_ALIGN_16
||
41 insn
->bits1
.da1
.dest_reg_file
!= BRW_GENERAL_REGISTER_FILE
)
44 if (!is_power_of_two(insn
->bits1
.da16
.dest_writemask
))
51 * Sets the dependency control fields on DP4 instructions.
53 * The hardware only tracks dependencies on a register basis, so when
61 * It will wait to do the DP4 dst.y until the dst.x is resolved, etc.
62 * We can examine our instruction stream and set the dependency
63 * control fields to tell the hardware when to do it.
65 * We may want to extend this to other instructions that are used to
66 * fill in a channel at a time of the destination register.
69 brw_set_dp4_dependency_control(struct brw_compile
*p
)
73 for (i
= 1; i
< p
->nr_insn
; i
++) {
74 struct brw_instruction
*insn
= &p
->store
[i
];
75 struct brw_instruction
*prev
= &p
->store
[i
- 1];
77 if (!is_single_channel_dp4(prev
))
80 if (!is_single_channel_dp4(insn
)) {
85 /* Only avoid hw dep control if the write masks are different
86 * channels of one reg.
88 if (insn
->bits1
.da16
.dest_writemask
== prev
->bits1
.da16
.dest_writemask
)
90 if (insn
->bits1
.da16
.dest_reg_nr
!= prev
->bits1
.da16
.dest_reg_nr
)
93 /* Check if the second instruction depends on the previous one
96 if (insn
->bits1
.da1
.src0_reg_file
== BRW_GENERAL_REGISTER_FILE
&&
97 (insn
->bits2
.da1
.src0_address_mode
!= BRW_ADDRESS_DIRECT
||
98 insn
->bits2
.da1
.src0_reg_nr
== insn
->bits1
.da16
.dest_reg_nr
))
100 if (insn
->bits1
.da1
.src1_reg_file
== BRW_GENERAL_REGISTER_FILE
&&
101 (insn
->bits3
.da1
.src1_address_mode
!= BRW_ADDRESS_DIRECT
||
102 insn
->bits3
.da1
.src1_reg_nr
== insn
->bits1
.da16
.dest_reg_nr
))
105 prev
->header
.dependency_control
|= BRW_DEPENDENCY_NOTCLEARED
;
106 insn
->header
.dependency_control
|= BRW_DEPENDENCY_NOTCHECKED
;
111 brw_optimize(struct brw_compile
*p
)
113 brw_set_dp4_dependency_control(p
);