2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keithw@vmware.com>
33 #include "main/imports.h"
34 #include "program/prog_parameter.h"
35 #include "program/prog_print.h"
36 #include "program/prog_to_nir.h"
37 #include "program/program.h"
38 #include "program/programopt.h"
40 #include "util/ralloc.h"
41 #include "compiler/glsl/ir.h"
42 #include "compiler/glsl/glsl_to_nir.h"
44 #include "brw_program.h"
45 #include "brw_context.h"
46 #include "compiler/brw_nir.h"
47 #include "brw_defines.h"
48 #include "intel_batchbuffer.h"
51 brw_nir_lower_uniforms(nir_shader
*nir
, bool is_scalar
)
54 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
,
55 type_size_scalar_bytes
);
56 return nir_lower_io(nir
, nir_var_uniform
, type_size_scalar_bytes
, 0);
58 nir_assign_var_locations(&nir
->uniforms
, &nir
->num_uniforms
,
59 type_size_vec4_bytes
);
60 return nir_lower_io(nir
, nir_var_uniform
, type_size_vec4_bytes
, 0);
65 brw_create_nir(struct brw_context
*brw
,
66 const struct gl_shader_program
*shader_prog
,
67 struct gl_program
*prog
,
68 gl_shader_stage stage
,
71 struct gl_context
*ctx
= &brw
->ctx
;
72 const nir_shader_compiler_options
*options
=
73 ctx
->Const
.ShaderCompilerOptions
[stage
].NirOptions
;
76 /* First, lower the GLSL IR or Mesa IR to NIR */
78 nir
= glsl_to_nir(shader_prog
, stage
, options
);
79 nir_remove_dead_variables(nir
, nir_var_shader_in
| nir_var_shader_out
);
80 nir_lower_returns(nir
);
81 nir_validate_shader(nir
);
82 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
83 nir_shader_get_entrypoint(nir
), true, false);
85 nir
= prog_to_nir(prog
, options
);
86 NIR_PASS_V(nir
, nir_lower_regs_to_ssa
); /* turn registers into SSA */
88 nir_validate_shader(nir
);
90 nir
= brw_preprocess_nir(brw
->screen
->compiler
, nir
);
92 if (stage
== MESA_SHADER_FRAGMENT
) {
93 static const struct nir_lower_wpos_ytransform_options wpos_options
= {
94 .state_tokens
= {STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
, 0, 0, 0},
95 .fs_coord_pixel_center_integer
= 1,
96 .fs_coord_origin_upper_left
= 1,
99 bool progress
= false;
100 NIR_PASS(progress
, nir
, nir_lower_wpos_ytransform
, &wpos_options
);
102 _mesa_add_state_reference(prog
->Parameters
,
103 (gl_state_index
*) wpos_options
.state_tokens
);
107 NIR_PASS_V(nir
, brw_nir_lower_uniforms
, is_scalar
);
113 brw_shader_gather_info(nir_shader
*nir
, struct gl_program
*prog
)
115 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
117 /* Copy the info we just generated back into the gl_program */
118 const char *prog_name
= prog
->info
.name
;
119 const char *prog_label
= prog
->info
.label
;
120 prog
->info
= nir
->info
;
121 prog
->info
.name
= prog_name
;
122 prog
->info
.label
= prog_label
;
126 get_new_program_id(struct intel_screen
*screen
)
128 return p_atomic_inc_return(&screen
->program_id
);
131 static struct gl_program
*brwNewProgram(struct gl_context
*ctx
, GLenum target
,
132 GLuint id
, bool is_arb_asm
)
134 struct brw_context
*brw
= brw_context(ctx
);
135 struct brw_program
*prog
= rzalloc(NULL
, struct brw_program
);
138 prog
->id
= get_new_program_id(brw
->screen
);
140 return _mesa_init_gl_program(&prog
->program
, target
, id
, is_arb_asm
);
146 static void brwDeleteProgram( struct gl_context
*ctx
,
147 struct gl_program
*prog
)
149 struct brw_context
*brw
= brw_context(ctx
);
151 /* Beware! prog's refcount has reached zero, and it's about to be freed.
153 * In brw_upload_pipeline_state(), we compare brw->programs[i] to
154 * ctx->FooProgram._Current, and flag BRW_NEW_FOO_PROGRAM if the
155 * pointer has changed.
157 * We cannot leave brw->programs[i] as a dangling pointer to the dead
158 * program. malloc() may allocate the same memory for a new gl_program,
159 * causing us to see matching pointers...but totally different programs.
161 * We cannot set brw->programs[i] to NULL, either. If we've deleted the
162 * active program, Mesa may set ctx->FooProgram._Current to NULL. That
163 * would cause us to see matching pointers (NULL == NULL), and fail to
164 * detect that a program has changed since our last draw.
166 * So, set it to a bogus gl_program pointer that will never match,
167 * causing us to properly reevaluate the state on our next draw.
169 * Getting this wrong causes heisenbugs which are very hard to catch,
170 * as you need a very specific allocation pattern to hit the problem.
172 static const struct gl_program deleted_program
;
174 for (int i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
175 if (brw
->programs
[i
] == prog
)
176 brw
->programs
[i
] = (struct gl_program
*) &deleted_program
;
179 _mesa_delete_program( ctx
, prog
);
184 brwProgramStringNotify(struct gl_context
*ctx
,
186 struct gl_program
*prog
)
188 assert(target
== GL_VERTEX_PROGRAM_ARB
|| !prog
->arb
.IsPositionInvariant
);
190 struct brw_context
*brw
= brw_context(ctx
);
191 const struct brw_compiler
*compiler
= brw
->screen
->compiler
;
194 case GL_FRAGMENT_PROGRAM_ARB
: {
195 struct brw_program
*newFP
= brw_program(prog
);
196 const struct brw_program
*curFP
=
197 brw_program_const(brw
->programs
[MESA_SHADER_FRAGMENT
]);
200 brw
->ctx
.NewDriverState
|= BRW_NEW_FRAGMENT_PROGRAM
;
201 newFP
->id
= get_new_program_id(brw
->screen
);
203 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_FRAGMENT
, true);
205 brw_shader_gather_info(prog
->nir
, prog
);
207 brw_fs_precompile(ctx
, prog
);
210 case GL_VERTEX_PROGRAM_ARB
: {
211 struct brw_program
*newVP
= brw_program(prog
);
212 const struct brw_program
*curVP
=
213 brw_program_const(brw
->programs
[MESA_SHADER_VERTEX
]);
216 brw
->ctx
.NewDriverState
|= BRW_NEW_VERTEX_PROGRAM
;
217 if (newVP
->program
.arb
.IsPositionInvariant
) {
218 _mesa_insert_mvp_code(ctx
, &newVP
->program
);
220 newVP
->id
= get_new_program_id(brw
->screen
);
222 /* Also tell tnl about it:
224 _tnl_program_string(ctx
, target
, prog
);
226 prog
->nir
= brw_create_nir(brw
, NULL
, prog
, MESA_SHADER_VERTEX
,
227 compiler
->scalar_stage
[MESA_SHADER_VERTEX
]);
229 brw_shader_gather_info(prog
->nir
, prog
);
231 brw_vs_precompile(ctx
, prog
);
236 * driver->ProgramStringNotify is only called for ARB programs, fixed
237 * function vertex programs, and ir_to_mesa (which isn't used by the
238 * i965 back-end). Therefore, even after geometry shaders are added,
239 * this function should only ever be called with a target of
240 * GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB.
242 unreachable("Unexpected target in brwProgramStringNotify");
249 brw_memory_barrier(struct gl_context
*ctx
, GLbitfield barriers
)
251 struct brw_context
*brw
= brw_context(ctx
);
252 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
253 unsigned bits
= (PIPE_CONTROL_DATA_CACHE_FLUSH
|
254 PIPE_CONTROL_NO_WRITE
|
255 PIPE_CONTROL_CS_STALL
);
256 assert(devinfo
->gen
>= 7 && devinfo
->gen
<= 10);
258 if (barriers
& (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT
|
259 GL_ELEMENT_ARRAY_BARRIER_BIT
|
260 GL_COMMAND_BARRIER_BIT
))
261 bits
|= PIPE_CONTROL_VF_CACHE_INVALIDATE
;
263 if (barriers
& GL_UNIFORM_BARRIER_BIT
)
264 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
265 PIPE_CONTROL_CONST_CACHE_INVALIDATE
);
267 if (barriers
& GL_TEXTURE_FETCH_BARRIER_BIT
)
268 bits
|= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
;
270 if (barriers
& (GL_TEXTURE_UPDATE_BARRIER_BIT
|
271 GL_PIXEL_BUFFER_BARRIER_BIT
))
272 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
273 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
275 if (barriers
& GL_FRAMEBUFFER_BARRIER_BIT
)
276 bits
|= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
|
277 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
279 /* Typed surface messages are handled by the render cache on IVB, so we
280 * need to flush it too.
282 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
)
283 bits
|= PIPE_CONTROL_RENDER_TARGET_FLUSH
;
285 brw_emit_pipe_control_flush(brw
, bits
);
289 brw_blend_barrier(struct gl_context
*ctx
)
291 struct brw_context
*brw
= brw_context(ctx
);
292 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
294 if (!ctx
->Extensions
.MESA_shader_framebuffer_fetch
) {
295 if (devinfo
->gen
>= 6) {
296 brw_emit_pipe_control_flush(brw
,
297 PIPE_CONTROL_RENDER_TARGET_FLUSH
|
298 PIPE_CONTROL_CS_STALL
);
299 brw_emit_pipe_control_flush(brw
,
300 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE
);
302 brw_emit_pipe_control_flush(brw
,
303 PIPE_CONTROL_RENDER_TARGET_FLUSH
);
309 brw_get_scratch_bo(struct brw_context
*brw
,
310 struct brw_bo
**scratch_bo
, int size
)
312 struct brw_bo
*old_bo
= *scratch_bo
;
314 if (old_bo
&& old_bo
->size
< size
) {
315 brw_bo_unreference(old_bo
);
320 *scratch_bo
= brw_bo_alloc(brw
->bufmgr
, "scratch bo", size
, 4096);
325 * Reserve enough scratch space for the given stage to hold \p per_thread_size
326 * bytes times the given \p thread_count.
329 brw_alloc_stage_scratch(struct brw_context
*brw
,
330 struct brw_stage_state
*stage_state
,
331 unsigned per_thread_size
,
332 unsigned thread_count
)
334 if (stage_state
->per_thread_scratch
< per_thread_size
) {
335 stage_state
->per_thread_scratch
= per_thread_size
;
337 if (stage_state
->scratch_bo
)
338 brw_bo_unreference(stage_state
->scratch_bo
);
340 stage_state
->scratch_bo
=
341 brw_bo_alloc(brw
->bufmgr
, "shader scratch space",
342 per_thread_size
* thread_count
, 4096);
346 void brwInitFragProgFuncs( struct dd_function_table
*functions
)
348 assert(functions
->ProgramStringNotify
== _tnl_program_string
);
350 functions
->NewProgram
= brwNewProgram
;
351 functions
->DeleteProgram
= brwDeleteProgram
;
352 functions
->ProgramStringNotify
= brwProgramStringNotify
;
354 functions
->LinkShader
= brw_link_shader
;
356 functions
->MemoryBarrier
= brw_memory_barrier
;
357 functions
->BlendBarrier
= brw_blend_barrier
;
360 struct shader_times
{
367 brw_init_shader_time(struct brw_context
*brw
)
369 const int max_entries
= 2048;
370 brw
->shader_time
.bo
=
371 brw_bo_alloc(brw
->bufmgr
, "shader time",
372 max_entries
* BRW_SHADER_TIME_STRIDE
* 3, 4096);
373 brw
->shader_time
.names
= rzalloc_array(brw
, const char *, max_entries
);
374 brw
->shader_time
.ids
= rzalloc_array(brw
, int, max_entries
);
375 brw
->shader_time
.types
= rzalloc_array(brw
, enum shader_time_shader_type
,
377 brw
->shader_time
.cumulative
= rzalloc_array(brw
, struct shader_times
,
379 brw
->shader_time
.max_entries
= max_entries
;
383 compare_time(const void *a
, const void *b
)
385 uint64_t * const *a_val
= a
;
386 uint64_t * const *b_val
= b
;
388 /* We don't just subtract because we're turning the value to an int. */
389 if (**a_val
< **b_val
)
391 else if (**a_val
== **b_val
)
398 print_shader_time_line(const char *stage
, const char *name
,
399 int shader_num
, uint64_t time
, uint64_t total
)
401 fprintf(stderr
, "%-6s%-18s", stage
, name
);
404 fprintf(stderr
, "%4d: ", shader_num
);
406 fprintf(stderr
, " : ");
408 fprintf(stderr
, "%16lld (%7.2f Gcycles) %4.1f%%\n",
410 (double)time
/ 1000000000.0,
411 (double)time
/ total
* 100.0);
415 brw_report_shader_time(struct brw_context
*brw
)
417 if (!brw
->shader_time
.bo
|| !brw
->shader_time
.num_entries
)
420 uint64_t scaled
[brw
->shader_time
.num_entries
];
421 uint64_t *sorted
[brw
->shader_time
.num_entries
];
422 uint64_t total_by_type
[ST_CS
+ 1];
423 memset(total_by_type
, 0, sizeof(total_by_type
));
425 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
426 uint64_t written
= 0, reset
= 0;
427 enum shader_time_shader_type type
= brw
->shader_time
.types
[i
];
429 sorted
[i
] = &scaled
[i
];
439 written
= brw
->shader_time
.cumulative
[i
].written
;
440 reset
= brw
->shader_time
.cumulative
[i
].reset
;
444 /* I sometimes want to print things that aren't the 3 shader times.
445 * Just print the sum in that case.
452 uint64_t time
= brw
->shader_time
.cumulative
[i
].time
;
454 scaled
[i
] = time
/ written
* (written
+ reset
);
467 total_by_type
[type
] += scaled
[i
];
477 fprintf(stderr
, "No shader time collected yet\n");
481 qsort(sorted
, brw
->shader_time
.num_entries
, sizeof(sorted
[0]), compare_time
);
483 fprintf(stderr
, "\n");
484 fprintf(stderr
, "type ID cycles spent %% of total\n");
485 for (int s
= 0; s
< brw
->shader_time
.num_entries
; s
++) {
487 /* Work back from the sorted pointers times to a time to print. */
488 int i
= sorted
[s
] - scaled
;
493 int shader_num
= brw
->shader_time
.ids
[i
];
494 const char *shader_name
= brw
->shader_time
.names
[i
];
496 switch (brw
->shader_time
.types
[i
]) {
523 print_shader_time_line(stage
, shader_name
, shader_num
,
527 fprintf(stderr
, "\n");
528 print_shader_time_line("total", "vs", 0, total_by_type
[ST_VS
], total
);
529 print_shader_time_line("total", "tcs", 0, total_by_type
[ST_TCS
], total
);
530 print_shader_time_line("total", "tes", 0, total_by_type
[ST_TES
], total
);
531 print_shader_time_line("total", "gs", 0, total_by_type
[ST_GS
], total
);
532 print_shader_time_line("total", "fs8", 0, total_by_type
[ST_FS8
], total
);
533 print_shader_time_line("total", "fs16", 0, total_by_type
[ST_FS16
], total
);
534 print_shader_time_line("total", "cs", 0, total_by_type
[ST_CS
], total
);
538 brw_collect_shader_time(struct brw_context
*brw
)
540 if (!brw
->shader_time
.bo
)
543 /* This probably stalls on the last rendering. We could fix that by
544 * delaying reading the reports, but it doesn't look like it's a big
545 * overhead compared to the cost of tracking the time in the first place.
547 void *bo_map
= brw_bo_map(brw
, brw
->shader_time
.bo
, MAP_READ
| MAP_WRITE
);
549 for (int i
= 0; i
< brw
->shader_time
.num_entries
; i
++) {
550 uint32_t *times
= bo_map
+ i
* 3 * BRW_SHADER_TIME_STRIDE
;
552 brw
->shader_time
.cumulative
[i
].time
+= times
[BRW_SHADER_TIME_STRIDE
* 0 / 4];
553 brw
->shader_time
.cumulative
[i
].written
+= times
[BRW_SHADER_TIME_STRIDE
* 1 / 4];
554 brw
->shader_time
.cumulative
[i
].reset
+= times
[BRW_SHADER_TIME_STRIDE
* 2 / 4];
557 /* Zero the BO out to clear it out for our next collection.
559 memset(bo_map
, 0, brw
->shader_time
.bo
->size
);
560 brw_bo_unmap(brw
->shader_time
.bo
);
564 brw_collect_and_report_shader_time(struct brw_context
*brw
)
566 brw_collect_shader_time(brw
);
568 if (brw
->shader_time
.report_time
== 0 ||
569 get_time() - brw
->shader_time
.report_time
>= 1.0) {
570 brw_report_shader_time(brw
);
571 brw
->shader_time
.report_time
= get_time();
576 * Chooses an index in the shader_time buffer and sets up tracking information
579 * Note that this holds on to references to the underlying programs, which may
580 * change their lifetimes compared to normal operation.
583 brw_get_shader_time_index(struct brw_context
*brw
, struct gl_program
*prog
,
584 enum shader_time_shader_type type
, bool is_glsl_sh
)
586 int shader_time_index
= brw
->shader_time
.num_entries
++;
587 assert(shader_time_index
< brw
->shader_time
.max_entries
);
588 brw
->shader_time
.types
[shader_time_index
] = type
;
593 } else if (is_glsl_sh
) {
594 name
= prog
->info
.label
?
595 ralloc_strdup(brw
->shader_time
.names
, prog
->info
.label
) : "glsl";
600 brw
->shader_time
.names
[shader_time_index
] = name
;
601 brw
->shader_time
.ids
[shader_time_index
] = prog
->Id
;
603 return shader_time_index
;
607 brw_destroy_shader_time(struct brw_context
*brw
)
609 brw_bo_unreference(brw
->shader_time
.bo
);
610 brw
->shader_time
.bo
= NULL
;
614 brw_stage_prog_data_free(const void *p
)
616 struct brw_stage_prog_data
*prog_data
= (struct brw_stage_prog_data
*)p
;
618 ralloc_free(prog_data
->param
);
619 ralloc_free(prog_data
->pull_param
);
623 brw_dump_arb_asm(const char *stage
, struct gl_program
*prog
)
625 fprintf(stderr
, "ARB_%s_program %d ir for native %s shader\n",
626 stage
, prog
->Id
, stage
);
627 _mesa_print_program(prog
);
631 brw_setup_tex_for_precompile(struct brw_context
*brw
,
632 struct brw_sampler_prog_key_data
*tex
,
633 struct gl_program
*prog
)
635 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
636 const bool has_shader_channel_select
= devinfo
->is_haswell
|| devinfo
->gen
>= 8;
637 unsigned sampler_count
= util_last_bit(prog
->SamplersUsed
);
638 for (unsigned i
= 0; i
< sampler_count
; i
++) {
639 if (!has_shader_channel_select
&& (prog
->ShadowSamplers
& (1 << i
))) {
640 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
642 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_ONE
);
644 /* Color sampler: assume no swizzling. */
645 tex
->swizzles
[i
] = SWIZZLE_XYZW
;
651 * Sets up the starting offsets for the groups of binding table entries
652 * common to all pipeline stages.
654 * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
655 * unused but also make sure that addition of small offsets to them will
656 * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
659 brw_assign_common_binding_table_offsets(const struct gen_device_info
*devinfo
,
660 const struct gl_program
*prog
,
661 struct brw_stage_prog_data
*stage_prog_data
,
662 uint32_t next_binding_table_offset
)
664 int num_textures
= util_last_bit(prog
->SamplersUsed
);
666 stage_prog_data
->binding_table
.texture_start
= next_binding_table_offset
;
667 next_binding_table_offset
+= num_textures
;
669 if (prog
->info
.num_ubos
) {
670 assert(prog
->info
.num_ubos
<= BRW_MAX_UBO
);
671 stage_prog_data
->binding_table
.ubo_start
= next_binding_table_offset
;
672 next_binding_table_offset
+= prog
->info
.num_ubos
;
674 stage_prog_data
->binding_table
.ubo_start
= 0xd0d0d0d0;
677 if (prog
->info
.num_ssbos
) {
678 assert(prog
->info
.num_ssbos
<= BRW_MAX_SSBO
);
679 stage_prog_data
->binding_table
.ssbo_start
= next_binding_table_offset
;
680 next_binding_table_offset
+= prog
->info
.num_ssbos
;
682 stage_prog_data
->binding_table
.ssbo_start
= 0xd0d0d0d0;
685 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
686 stage_prog_data
->binding_table
.shader_time_start
= next_binding_table_offset
;
687 next_binding_table_offset
++;
689 stage_prog_data
->binding_table
.shader_time_start
= 0xd0d0d0d0;
692 if (prog
->nir
->info
.uses_texture_gather
) {
693 if (devinfo
->gen
>= 8) {
694 stage_prog_data
->binding_table
.gather_texture_start
=
695 stage_prog_data
->binding_table
.texture_start
;
697 stage_prog_data
->binding_table
.gather_texture_start
= next_binding_table_offset
;
698 next_binding_table_offset
+= num_textures
;
701 stage_prog_data
->binding_table
.gather_texture_start
= 0xd0d0d0d0;
704 if (prog
->info
.num_abos
) {
705 stage_prog_data
->binding_table
.abo_start
= next_binding_table_offset
;
706 next_binding_table_offset
+= prog
->info
.num_abos
;
708 stage_prog_data
->binding_table
.abo_start
= 0xd0d0d0d0;
711 if (prog
->info
.num_images
) {
712 stage_prog_data
->binding_table
.image_start
= next_binding_table_offset
;
713 next_binding_table_offset
+= prog
->info
.num_images
;
715 stage_prog_data
->binding_table
.image_start
= 0xd0d0d0d0;
718 /* This may or may not be used depending on how the compile goes. */
719 stage_prog_data
->binding_table
.pull_constants_start
= next_binding_table_offset
;
720 next_binding_table_offset
++;
722 /* Plane 0 is just the regular texture section */
723 stage_prog_data
->binding_table
.plane_start
[0] = stage_prog_data
->binding_table
.texture_start
;
725 stage_prog_data
->binding_table
.plane_start
[1] = next_binding_table_offset
;
726 next_binding_table_offset
+= num_textures
;
728 stage_prog_data
->binding_table
.plane_start
[2] = next_binding_table_offset
;
729 next_binding_table_offset
+= num_textures
;
731 /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
733 assert(next_binding_table_offset
<= BRW_MAX_SURFACES
);
734 return next_binding_table_offset
;