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Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / brw_surface_formats.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23 #include "main/context.h"
24 #include "main/mtypes.h"
25
26 #include "brw_context.h"
27 #include "brw_state.h"
28 #include "brw_defines.h"
29 #include "brw_wm.h"
30 #include "brw_surface_formats.h"
31
32 /* This macro allows us to write the table almost as it appears in the PRM,
33 * while restructuring it to turn it into the C code we want.
34 */
35 #define SF(sampl, filt, shad, ck, rt, ab, vb, so, color, ccs_e, sf) \
36 [BRW_SURFACEFORMAT_##sf] = { true, sampl, filt, shad, ck, rt, ab, vb, so, color, ccs_e, #sf},
37
38 #define Y 0
39 #define x 999
40 /**
41 * This is the table of support for surface (texture, renderbuffer, and vertex
42 * buffer, but not depthbuffer) formats across the various hardware generations.
43 *
44 * The table is formatted to match the documentation, except that the docs have
45 * this ridiculous mapping of Y[*+~^#&] for "supported on DevWhatever". To put
46 * it in our table, here's the mapping:
47 *
48 * Y*: 45
49 * Y+: 45 (g45/gm45)
50 * Y~: 50 (gen5)
51 * Y^: 60 (gen6)
52 * Y#: 70 (gen7)
53 *
54 * The abbreviations in the header below are:
55 * smpl - Sampling Engine
56 * filt - Sampling Engine Filtering
57 * shad - Sampling Engine Shadow Map
58 * CK - Sampling Engine Chroma Key
59 * RT - Render Target
60 * AB - Alpha Blend Render Target
61 * VB - Input Vertex Buffer
62 * SO - Steamed Output Vertex Buffers (transform feedback)
63 * color - Color Processing
64 * ccs_e - Lossless Compression Support (gen9+ only)
65 * sf - Surface Format
66 *
67 * See page 88 of the Sandybridge PRM VOL4_Part1 PDF.
68 *
69 * As of Ivybridge, the columns are no longer in that table and the
70 * information can be found spread across:
71 *
72 * - VOL2_Part1 section 2.5.11 Format Conversion (vertex fetch).
73 * - VOL4_Part1 section 2.12.2.1.2 Sampler Output Channel Mapping.
74 * - VOL4_Part1 section 3.9.11 Render Target Write.
75 * - Render Target Surface Types [SKL+]
76 */
77 const struct brw_surface_format_info surface_formats[] = {
78 /* smpl filt shad CK RT AB VB SO color ccs_e */
79 SF( Y, 50, x, x, Y, Y, Y, Y, x, 90, R32G32B32A32_FLOAT)
80 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32G32B32A32_SINT)
81 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32G32B32A32_UINT)
82 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_UNORM)
83 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_SNORM)
84 SF( x, x, x, x, x, x, Y, x, x, x, R64G64_FLOAT)
85 SF( Y, 50, x, x, x, x, x, x, x, x, R32G32B32X32_FLOAT)
86 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_SSCALED)
87 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_USCALED)
88 SF( x, x, x, x, x, x, x, x, x, x, R32G32B32A32_SFIXED)
89 SF( x, x, x, x, x, x, x, x, x, x, R64G64_PASSTHRU)
90 SF( Y, 50, x, x, x, x, Y, Y, x, x, R32G32B32_FLOAT)
91 SF( Y, x, x, x, x, x, Y, Y, x, x, R32G32B32_SINT)
92 SF( Y, x, x, x, x, x, Y, Y, x, x, R32G32B32_UINT)
93 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32_UNORM)
94 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32_SNORM)
95 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32_SSCALED)
96 SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32_USCALED)
97 SF( x, x, x, x, x, x, x, x, x, x, R32G32B32_SFIXED)
98 SF( Y, Y, x, x, Y, 45, Y, x, 60, 90, R16G16B16A16_UNORM)
99 SF( Y, Y, x, x, Y, 60, Y, x, x, 90, R16G16B16A16_SNORM)
100 SF( Y, x, x, x, Y, x, Y, x, x, 90, R16G16B16A16_SINT)
101 SF( Y, x, x, x, Y, x, Y, x, x, 90, R16G16B16A16_UINT)
102 SF( Y, Y, x, x, Y, Y, Y, x, x, 90, R16G16B16A16_FLOAT)
103 SF( Y, 50, x, x, Y, Y, Y, Y, x, 90, R32G32_FLOAT)
104 SF( Y, 70, x, x, Y, Y, Y, Y, x, x, R32G32_FLOAT_LD)
105 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32G32_SINT)
106 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32G32_UINT)
107 SF( Y, 50, Y, x, x, x, x, x, x, x, R32_FLOAT_X8X24_TYPELESS)
108 SF( Y, x, x, x, x, x, x, x, x, x, X32_TYPELESS_G8X24_UINT)
109 SF( Y, 50, x, x, x, x, x, x, x, x, L32A32_FLOAT)
110 SF( x, x, x, x, x, x, Y, x, x, x, R32G32_UNORM)
111 SF( x, x, x, x, x, x, Y, x, x, x, R32G32_SNORM)
112 SF( x, x, x, x, x, x, Y, x, x, x, R64_FLOAT)
113 SF( Y, Y, x, x, x, x, x, x, x, x, R16G16B16X16_UNORM)
114 SF( Y, Y, x, x, x, x, x, x, x, 90, R16G16B16X16_FLOAT)
115 SF( Y, 50, x, x, x, x, x, x, x, x, A32X32_FLOAT)
116 SF( Y, 50, x, x, x, x, x, x, x, x, L32X32_FLOAT)
117 SF( Y, 50, x, x, x, x, x, x, x, x, I32X32_FLOAT)
118 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16A16_SSCALED)
119 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16A16_USCALED)
120 SF( x, x, x, x, x, x, Y, x, x, x, R32G32_SSCALED)
121 SF( x, x, x, x, x, x, Y, x, x, x, R32G32_USCALED)
122 SF( x, x, x, x, x, x, x, x, x, x, R32G32_SFIXED)
123 SF( x, x, x, x, x, x, x, x, x, x, R64_PASSTHRU)
124 SF( Y, Y, x, Y, Y, Y, Y, x, 60, 90, B8G8R8A8_UNORM)
125 SF( Y, Y, x, x, Y, Y, x, x, x, x, B8G8R8A8_UNORM_SRGB)
126 /* smpl filt shad CK RT AB VB SO color ccs_e */
127 SF( Y, Y, x, x, Y, Y, Y, x, 60, x, R10G10B10A2_UNORM)
128 SF( Y, Y, x, x, x, x, x, x, 60, x, R10G10B10A2_UNORM_SRGB)
129 SF( Y, x, x, x, Y, x, Y, x, x, x, R10G10B10A2_UINT)
130 SF( Y, Y, x, x, x, Y, Y, x, x, x, R10G10B10_SNORM_A2_UNORM)
131 SF( Y, Y, x, x, Y, Y, Y, x, 60, 90, R8G8B8A8_UNORM)
132 SF( Y, Y, x, x, Y, Y, x, x, 60, x, R8G8B8A8_UNORM_SRGB)
133 SF( Y, Y, x, x, Y, 60, Y, x, x, 90, R8G8B8A8_SNORM)
134 SF( Y, x, x, x, Y, x, Y, x, x, 90, R8G8B8A8_SINT)
135 SF( Y, x, x, x, Y, x, Y, x, x, 90, R8G8B8A8_UINT)
136 SF( Y, Y, x, x, Y, 45, Y, x, x, 90, R16G16_UNORM)
137 SF( Y, Y, x, x, Y, 60, Y, x, x, 90, R16G16_SNORM)
138 SF( Y, x, x, x, Y, x, Y, x, x, 90, R16G16_SINT)
139 SF( Y, x, x, x, Y, x, Y, x, x, 90, R16G16_UINT)
140 SF( Y, Y, x, x, Y, Y, Y, x, x, 90, R16G16_FLOAT)
141 SF( Y, Y, x, x, Y, Y, x, x, 60, x, B10G10R10A2_UNORM)
142 SF( Y, Y, x, x, Y, Y, x, x, 60, x, B10G10R10A2_UNORM_SRGB)
143 SF( Y, Y, x, x, Y, Y, Y, x, x, x, R11G11B10_FLOAT)
144 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32_SINT)
145 SF( Y, x, x, x, Y, x, Y, Y, x, 90, R32_UINT)
146 SF( Y, 50, Y, x, Y, Y, Y, Y, x, 90, R32_FLOAT)
147 SF( Y, 50, Y, x, x, x, x, x, x, x, R24_UNORM_X8_TYPELESS)
148 SF( Y, x, x, x, x, x, x, x, x, x, X24_TYPELESS_G8_UINT)
149 SF( Y, Y, x, x, x, x, x, x, x, x, L16A16_UNORM)
150 SF( Y, 50, Y, x, x, x, x, x, x, x, I24X8_UNORM)
151 SF( Y, 50, Y, x, x, x, x, x, x, x, L24X8_UNORM)
152 SF( Y, 50, Y, x, x, x, x, x, x, x, A24X8_UNORM)
153 SF( Y, 50, Y, x, x, x, x, x, x, x, I32_FLOAT)
154 SF( Y, 50, Y, x, x, x, x, x, x, x, L32_FLOAT)
155 SF( Y, 50, Y, x, x, x, x, x, x, x, A32_FLOAT)
156 SF( Y, Y, x, Y, x, x, x, x, 60, 90, B8G8R8X8_UNORM)
157 SF( Y, Y, x, x, x, x, x, x, x, x, B8G8R8X8_UNORM_SRGB)
158 SF( Y, Y, x, x, x, x, x, x, x, x, R8G8B8X8_UNORM)
159 SF( Y, Y, x, x, x, x, x, x, x, x, R8G8B8X8_UNORM_SRGB)
160 SF( Y, Y, x, x, x, x, x, x, x, x, R9G9B9E5_SHAREDEXP)
161 SF( Y, Y, x, x, x, x, x, x, x, x, B10G10R10X2_UNORM)
162 SF( Y, Y, x, x, x, x, x, x, x, x, L16A16_FLOAT)
163 SF( x, x, x, x, x, x, Y, x, x, x, R32_UNORM)
164 SF( x, x, x, x, x, x, Y, x, x, x, R32_SNORM)
165 /* smpl filt shad CK RT AB VB SO color ccs_e */
166 SF( x, x, x, x, x, x, Y, x, x, x, R10G10B10X2_USCALED)
167 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8A8_SSCALED)
168 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8A8_USCALED)
169 SF( x, x, x, x, x, x, Y, x, x, x, R16G16_SSCALED)
170 SF( x, x, x, x, x, x, Y, x, x, x, R16G16_USCALED)
171 SF( x, x, x, x, x, x, Y, x, x, x, R32_SSCALED)
172 SF( x, x, x, x, x, x, Y, x, x, x, R32_USCALED)
173 SF( Y, Y, x, Y, Y, Y, x, x, x, x, B5G6R5_UNORM)
174 SF( Y, Y, x, x, Y, Y, x, x, x, x, B5G6R5_UNORM_SRGB)
175 SF( Y, Y, x, Y, Y, Y, x, x, x, x, B5G5R5A1_UNORM)
176 SF( Y, Y, x, x, Y, Y, x, x, x, x, B5G5R5A1_UNORM_SRGB)
177 SF( Y, Y, x, Y, Y, Y, x, x, x, x, B4G4R4A4_UNORM)
178 SF( Y, Y, x, x, Y, Y, x, x, x, x, B4G4R4A4_UNORM_SRGB)
179 SF( Y, Y, x, x, Y, Y, Y, x, x, x, R8G8_UNORM)
180 SF( Y, Y, x, Y, Y, 60, Y, x, x, x, R8G8_SNORM)
181 SF( Y, x, x, x, Y, x, Y, x, x, x, R8G8_SINT)
182 SF( Y, x, x, x, Y, x, Y, x, x, x, R8G8_UINT)
183 SF( Y, Y, Y, x, Y, 45, Y, x, 70, x, R16_UNORM)
184 SF( Y, Y, x, x, Y, 60, Y, x, x, x, R16_SNORM)
185 SF( Y, x, x, x, Y, x, Y, x, x, x, R16_SINT)
186 SF( Y, x, x, x, Y, x, Y, x, x, x, R16_UINT)
187 SF( Y, Y, x, x, Y, Y, Y, x, x, x, R16_FLOAT)
188 SF(50, 50, x, x, x, x, x, x, x, x, A8P8_UNORM_PALETTE0)
189 SF(50, 50, x, x, x, x, x, x, x, x, A8P8_UNORM_PALETTE1)
190 SF( Y, Y, Y, x, x, x, x, x, x, x, I16_UNORM)
191 SF( Y, Y, Y, x, x, x, x, x, x, x, L16_UNORM)
192 SF( Y, Y, Y, x, x, x, x, x, x, x, A16_UNORM)
193 SF( Y, Y, x, Y, x, x, x, x, x, x, L8A8_UNORM)
194 SF( Y, Y, Y, x, x, x, x, x, x, x, I16_FLOAT)
195 SF( Y, Y, Y, x, x, x, x, x, x, x, L16_FLOAT)
196 SF( Y, Y, Y, x, x, x, x, x, x, x, A16_FLOAT)
197 SF(45, 45, x, x, x, x, x, x, x, x, L8A8_UNORM_SRGB)
198 SF( Y, Y, x, Y, x, x, x, x, x, x, R5G5_SNORM_B6_UNORM)
199 SF( x, x, x, x, Y, Y, x, x, x, x, B5G5R5X1_UNORM)
200 SF( x, x, x, x, Y, Y, x, x, x, x, B5G5R5X1_UNORM_SRGB)
201 SF( x, x, x, x, x, x, Y, x, x, x, R8G8_SSCALED)
202 SF( x, x, x, x, x, x, Y, x, x, x, R8G8_USCALED)
203 /* smpl filt shad CK RT AB VB SO color ccs_e */
204 SF( x, x, x, x, x, x, Y, x, x, x, R16_SSCALED)
205 SF( x, x, x, x, x, x, Y, x, x, x, R16_USCALED)
206 SF(50, 50, x, x, x, x, x, x, x, x, P8A8_UNORM_PALETTE0)
207 SF(50, 50, x, x, x, x, x, x, x, x, P8A8_UNORM_PALETTE1)
208 SF( x, x, x, x, x, x, x, x, x, x, A1B5G5R5_UNORM)
209 SF( x, x, x, x, x, x, x, x, x, x, A4B4G4R4_UNORM)
210 SF( x, x, x, x, x, x, x, x, x, x, L8A8_UINT)
211 SF( x, x, x, x, x, x, x, x, x, x, L8A8_SINT)
212 SF( Y, Y, x, 45, Y, Y, Y, x, x, x, R8_UNORM)
213 SF( Y, Y, x, x, Y, 60, Y, x, x, x, R8_SNORM)
214 SF( Y, x, x, x, Y, x, Y, x, x, x, R8_SINT)
215 SF( Y, x, x, x, Y, x, Y, x, x, x, R8_UINT)
216 SF( Y, Y, x, Y, Y, Y, x, x, x, x, A8_UNORM)
217 SF( Y, Y, x, x, x, x, x, x, x, x, I8_UNORM)
218 SF( Y, Y, x, Y, x, x, x, x, x, x, L8_UNORM)
219 SF( Y, Y, x, x, x, x, x, x, x, x, P4A4_UNORM)
220 SF( Y, Y, x, x, x, x, x, x, x, x, A4P4_UNORM)
221 SF( x, x, x, x, x, x, Y, x, x, x, R8_SSCALED)
222 SF( x, x, x, x, x, x, Y, x, x, x, R8_USCALED)
223 SF(45, 45, x, x, x, x, x, x, x, x, P8_UNORM_PALETTE0)
224 SF(45, 45, x, x, x, x, x, x, x, x, L8_UNORM_SRGB)
225 SF(45, 45, x, x, x, x, x, x, x, x, P8_UNORM_PALETTE1)
226 SF(45, 45, x, x, x, x, x, x, x, x, P4A4_UNORM_PALETTE1)
227 SF(45, 45, x, x, x, x, x, x, x, x, A4P4_UNORM_PALETTE1)
228 SF( x, x, x, x, x, x, x, x, x, x, Y8_SNORM)
229 SF( x, x, x, x, x, x, x, x, x, x, L8_UINT)
230 SF( x, x, x, x, x, x, x, x, x, x, L8_SINT)
231 SF( x, x, x, x, x, x, x, x, x, x, I8_UINT)
232 SF( x, x, x, x, x, x, x, x, x, x, I8_SINT)
233 SF(45, 45, x, x, x, x, x, x, x, x, DXT1_RGB_SRGB)
234 SF( Y, Y, x, x, x, x, x, x, x, x, R1_UINT)
235 SF( Y, Y, x, Y, Y, x, x, x, 60, x, YCRCB_NORMAL)
236 SF( Y, Y, x, Y, Y, x, x, x, 60, x, YCRCB_SWAPUVY)
237 SF(45, 45, x, x, x, x, x, x, x, x, P2_UNORM_PALETTE0)
238 SF(45, 45, x, x, x, x, x, x, x, x, P2_UNORM_PALETTE1)
239 SF( Y, Y, x, Y, x, x, x, x, x, x, BC1_UNORM)
240 SF( Y, Y, x, Y, x, x, x, x, x, x, BC2_UNORM)
241 SF( Y, Y, x, Y, x, x, x, x, x, x, BC3_UNORM)
242 SF( Y, Y, x, x, x, x, x, x, x, x, BC4_UNORM)
243 SF( Y, Y, x, x, x, x, x, x, x, x, BC5_UNORM)
244 SF( Y, Y, x, x, x, x, x, x, x, x, BC1_UNORM_SRGB)
245 SF( Y, Y, x, x, x, x, x, x, x, x, BC2_UNORM_SRGB)
246 SF( Y, Y, x, x, x, x, x, x, x, x, BC3_UNORM_SRGB)
247 SF( Y, x, x, x, x, x, x, x, x, x, MONO8)
248 SF( Y, Y, x, x, Y, x, x, x, 60, x, YCRCB_SWAPUV)
249 SF( Y, Y, x, x, Y, x, x, x, 60, x, YCRCB_SWAPY)
250 SF( Y, Y, x, x, x, x, x, x, x, x, DXT1_RGB)
251 /* smpl filt shad CK RT AB VB SO color ccs_e */
252 SF( Y, Y, x, x, x, x, x, x, x, x, FXT1)
253 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_UNORM)
254 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_SNORM)
255 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_SSCALED)
256 SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_USCALED)
257 SF( x, x, x, x, x, x, Y, x, x, x, R64G64B64A64_FLOAT)
258 SF( x, x, x, x, x, x, Y, x, x, x, R64G64B64_FLOAT)
259 SF( Y, Y, x, x, x, x, x, x, x, x, BC4_SNORM)
260 SF( Y, Y, x, x, x, x, x, x, x, x, BC5_SNORM)
261 SF(50, 50, x, x, x, x, 60, x, x, x, R16G16B16_FLOAT)
262 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_UNORM)
263 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_SNORM)
264 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_SSCALED)
265 SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_USCALED)
266 SF(70, 70, x, x, x, x, x, x, x, x, BC6H_SF16)
267 SF(70, 70, x, x, x, x, x, x, x, x, BC7_UNORM)
268 SF(70, 70, x, x, x, x, x, x, x, x, BC7_UNORM_SRGB)
269 SF(70, 70, x, x, x, x, x, x, x, x, BC6H_UF16)
270 SF( x, x, x, x, x, x, x, x, x, x, PLANAR_420_8)
271 SF( x, x, x, x, x, x, x, x, x, x, R8G8B8_UNORM_SRGB)
272 SF( x, x, x, x, x, x, x, x, x, x, ETC1_RGB8)
273 SF( x, x, x, x, x, x, x, x, x, x, ETC2_RGB8)
274 SF( x, x, x, x, x, x, x, x, x, x, EAC_R11)
275 SF( x, x, x, x, x, x, x, x, x, x, EAC_RG11)
276 SF( x, x, x, x, x, x, x, x, x, x, EAC_SIGNED_R11)
277 SF( x, x, x, x, x, x, x, x, x, x, EAC_SIGNED_RG11)
278 SF( x, x, x, x, x, x, x, x, x, x, ETC2_SRGB8)
279 SF( x, x, x, x, x, x, x, x, x, x, R16G16B16_UINT)
280 SF( x, x, x, x, x, x, x, x, x, x, R16G16B16_SINT)
281 SF( x, x, x, x, x, x, x, x, x, x, R32_SFIXED)
282 SF( x, x, x, x, x, x, x, x, x, x, R10G10B10A2_SNORM)
283 SF( x, x, x, x, x, x, x, x, x, x, R10G10B10A2_USCALED)
284 SF( x, x, x, x, x, x, x, x, x, x, R10G10B10A2_SSCALED)
285 SF( x, x, x, x, x, x, x, x, x, x, R10G10B10A2_SINT)
286 SF( x, x, x, x, x, x, x, x, x, x, B10G10R10A2_SNORM)
287 SF( x, x, x, x, x, x, x, x, x, x, B10G10R10A2_USCALED)
288 SF( x, x, x, x, x, x, x, x, x, x, B10G10R10A2_SSCALED)
289 SF( x, x, x, x, x, x, x, x, x, x, B10G10R10A2_UINT)
290 SF( x, x, x, x, x, x, x, x, x, x, B10G10R10A2_SINT)
291 SF( x, x, x, x, x, x, x, x, x, x, R64G64B64A64_PASSTHRU)
292 SF( x, x, x, x, x, x, x, x, x, x, R64G64B64_PASSTHRU)
293 SF( x, x, x, x, x, x, x, x, x, x, ETC2_RGB8_PTA)
294 SF( x, x, x, x, x, x, x, x, x, x, ETC2_SRGB8_PTA)
295 SF( x, x, x, x, x, x, x, x, x, x, ETC2_EAC_RGBA8)
296 SF( x, x, x, x, x, x, x, x, x, x, ETC2_EAC_SRGB8_A8)
297 SF( x, x, x, x, x, x, x, x, x, x, R8G8B8_UINT)
298 SF( x, x, x, x, x, x, x, x, x, x, R8G8B8_SINT)
299 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4x4_FLT16)
300 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5x4_FLT16)
301 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5x5_FLT16)
302 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6x5_FLT16)
303 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6x6_FLT16)
304 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x5_FLT16)
305 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x6_FLT16)
306 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x8_FLT16)
307 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x5_FLT16)
308 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x6_FLT16)
309 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x8_FLT16)
310 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x10_FLT16)
311 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12x10_FLT16)
312 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12x12_FLT16)
313 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4x4_U8sRGB)
314 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5x4_U8sRGB)
315 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5x5_U8sRGB)
316 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6x5_U8sRGB)
317 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6x6_U8sRGB)
318 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x5_U8sRGB)
319 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x6_U8sRGB)
320 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8x8_U8sRGB)
321 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x5_U8sRGB)
322 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x6_U8sRGB)
323 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x8_U8sRGB)
324 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10x10_U8sRGB)
325 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12x10_U8sRGB)
326 SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12x12_U8sRGB)
327 };
328 #undef x
329 #undef Y
330
331 const char *
332 brw_surface_format_name(unsigned format)
333 {
334 return surface_formats[format].name;
335 }
336
337 uint32_t
338 brw_format_for_mesa_format(mesa_format mesa_format)
339 {
340 /* This table is ordered according to the enum ordering in formats.h. We do
341 * expect that enum to be extended without our explicit initialization
342 * staying in sync, so we initialize to 0 even though
343 * BRW_SURFACEFORMAT_R32G32B32A32_FLOAT happens to also be 0.
344 */
345 static const uint32_t table[MESA_FORMAT_COUNT] =
346 {
347 [MESA_FORMAT_A8B8G8R8_UNORM] = 0,
348 [MESA_FORMAT_R8G8B8A8_UNORM] = BRW_SURFACEFORMAT_R8G8B8A8_UNORM,
349 [MESA_FORMAT_B8G8R8A8_UNORM] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM,
350 [MESA_FORMAT_A8R8G8B8_UNORM] = 0,
351 [MESA_FORMAT_X8B8G8R8_UNORM] = 0,
352 [MESA_FORMAT_R8G8B8X8_UNORM] = BRW_SURFACEFORMAT_R8G8B8X8_UNORM,
353 [MESA_FORMAT_B8G8R8X8_UNORM] = BRW_SURFACEFORMAT_B8G8R8X8_UNORM,
354 [MESA_FORMAT_X8R8G8B8_UNORM] = 0,
355 [MESA_FORMAT_BGR_UNORM8] = 0,
356 [MESA_FORMAT_RGB_UNORM8] = BRW_SURFACEFORMAT_R8G8B8_UNORM,
357 [MESA_FORMAT_B5G6R5_UNORM] = BRW_SURFACEFORMAT_B5G6R5_UNORM,
358 [MESA_FORMAT_R5G6B5_UNORM] = 0,
359 [MESA_FORMAT_B4G4R4A4_UNORM] = BRW_SURFACEFORMAT_B4G4R4A4_UNORM,
360 [MESA_FORMAT_A4R4G4B4_UNORM] = 0,
361 [MESA_FORMAT_A1B5G5R5_UNORM] = 0,
362 [MESA_FORMAT_B5G5R5A1_UNORM] = BRW_SURFACEFORMAT_B5G5R5A1_UNORM,
363 [MESA_FORMAT_A1R5G5B5_UNORM] = 0,
364 [MESA_FORMAT_L4A4_UNORM] = 0,
365 [MESA_FORMAT_L8A8_UNORM] = BRW_SURFACEFORMAT_L8A8_UNORM,
366 [MESA_FORMAT_A8L8_UNORM] = 0,
367 [MESA_FORMAT_L16A16_UNORM] = BRW_SURFACEFORMAT_L16A16_UNORM,
368 [MESA_FORMAT_A16L16_UNORM] = 0,
369 [MESA_FORMAT_B2G3R3_UNORM] = 0,
370 [MESA_FORMAT_A_UNORM8] = BRW_SURFACEFORMAT_A8_UNORM,
371 [MESA_FORMAT_A_UNORM16] = BRW_SURFACEFORMAT_A16_UNORM,
372 [MESA_FORMAT_L_UNORM8] = BRW_SURFACEFORMAT_L8_UNORM,
373 [MESA_FORMAT_L_UNORM16] = BRW_SURFACEFORMAT_L16_UNORM,
374 [MESA_FORMAT_I_UNORM8] = BRW_SURFACEFORMAT_I8_UNORM,
375 [MESA_FORMAT_I_UNORM16] = BRW_SURFACEFORMAT_I16_UNORM,
376 [MESA_FORMAT_YCBCR_REV] = BRW_SURFACEFORMAT_YCRCB_NORMAL,
377 [MESA_FORMAT_YCBCR] = BRW_SURFACEFORMAT_YCRCB_SWAPUVY,
378 [MESA_FORMAT_R_UNORM8] = BRW_SURFACEFORMAT_R8_UNORM,
379 [MESA_FORMAT_R8G8_UNORM] = BRW_SURFACEFORMAT_R8G8_UNORM,
380 [MESA_FORMAT_G8R8_UNORM] = 0,
381 [MESA_FORMAT_R_UNORM16] = BRW_SURFACEFORMAT_R16_UNORM,
382 [MESA_FORMAT_R16G16_UNORM] = BRW_SURFACEFORMAT_R16G16_UNORM,
383 [MESA_FORMAT_G16R16_UNORM] = 0,
384 [MESA_FORMAT_B10G10R10A2_UNORM] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM,
385 [MESA_FORMAT_S8_UINT_Z24_UNORM] = 0,
386 [MESA_FORMAT_Z24_UNORM_S8_UINT] = 0,
387 [MESA_FORMAT_Z_UNORM16] = 0,
388 [MESA_FORMAT_Z24_UNORM_X8_UINT] = 0,
389 [MESA_FORMAT_X8_UINT_Z24_UNORM] = 0,
390 [MESA_FORMAT_Z_UNORM32] = 0,
391 [MESA_FORMAT_S_UINT8] = BRW_SURFACEFORMAT_R8_UINT,
392
393 [MESA_FORMAT_BGR_SRGB8] = 0,
394 [MESA_FORMAT_A8B8G8R8_SRGB] = 0,
395 [MESA_FORMAT_B8G8R8A8_SRGB] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB,
396 [MESA_FORMAT_A8R8G8B8_SRGB] = 0,
397 [MESA_FORMAT_R8G8B8A8_SRGB] = BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB,
398 [MESA_FORMAT_X8R8G8B8_SRGB] = 0,
399 [MESA_FORMAT_L_SRGB8] = BRW_SURFACEFORMAT_L8_UNORM_SRGB,
400 [MESA_FORMAT_L8A8_SRGB] = BRW_SURFACEFORMAT_L8A8_UNORM_SRGB,
401 [MESA_FORMAT_A8L8_SRGB] = 0,
402 [MESA_FORMAT_SRGB_DXT1] = BRW_SURFACEFORMAT_DXT1_RGB_SRGB,
403 [MESA_FORMAT_SRGBA_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM_SRGB,
404 [MESA_FORMAT_SRGBA_DXT3] = BRW_SURFACEFORMAT_BC2_UNORM_SRGB,
405 [MESA_FORMAT_SRGBA_DXT5] = BRW_SURFACEFORMAT_BC3_UNORM_SRGB,
406
407 [MESA_FORMAT_RGB_FXT1] = BRW_SURFACEFORMAT_FXT1,
408 [MESA_FORMAT_RGBA_FXT1] = BRW_SURFACEFORMAT_FXT1,
409 [MESA_FORMAT_RGB_DXT1] = BRW_SURFACEFORMAT_DXT1_RGB,
410 [MESA_FORMAT_RGBA_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM,
411 [MESA_FORMAT_RGBA_DXT3] = BRW_SURFACEFORMAT_BC2_UNORM,
412 [MESA_FORMAT_RGBA_DXT5] = BRW_SURFACEFORMAT_BC3_UNORM,
413
414 [MESA_FORMAT_RGBA_FLOAT32] = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT,
415 [MESA_FORMAT_RGBA_FLOAT16] = BRW_SURFACEFORMAT_R16G16B16A16_FLOAT,
416 [MESA_FORMAT_RGB_FLOAT32] = BRW_SURFACEFORMAT_R32G32B32_FLOAT,
417 [MESA_FORMAT_RGB_FLOAT16] = 0,
418 [MESA_FORMAT_A_FLOAT32] = BRW_SURFACEFORMAT_A32_FLOAT,
419 [MESA_FORMAT_A_FLOAT16] = BRW_SURFACEFORMAT_A16_FLOAT,
420 [MESA_FORMAT_L_FLOAT32] = BRW_SURFACEFORMAT_L32_FLOAT,
421 [MESA_FORMAT_L_FLOAT16] = BRW_SURFACEFORMAT_L16_FLOAT,
422 [MESA_FORMAT_LA_FLOAT32] = BRW_SURFACEFORMAT_L32A32_FLOAT,
423 [MESA_FORMAT_LA_FLOAT16] = BRW_SURFACEFORMAT_L16A16_FLOAT,
424 [MESA_FORMAT_I_FLOAT32] = BRW_SURFACEFORMAT_I32_FLOAT,
425 [MESA_FORMAT_I_FLOAT16] = BRW_SURFACEFORMAT_I16_FLOAT,
426 [MESA_FORMAT_R_FLOAT32] = BRW_SURFACEFORMAT_R32_FLOAT,
427 [MESA_FORMAT_R_FLOAT16] = BRW_SURFACEFORMAT_R16_FLOAT,
428 [MESA_FORMAT_RG_FLOAT32] = BRW_SURFACEFORMAT_R32G32_FLOAT,
429 [MESA_FORMAT_RG_FLOAT16] = BRW_SURFACEFORMAT_R16G16_FLOAT,
430
431 [MESA_FORMAT_A_UINT8] = 0,
432 [MESA_FORMAT_A_UINT16] = 0,
433 [MESA_FORMAT_A_UINT32] = 0,
434 [MESA_FORMAT_A_SINT8] = 0,
435 [MESA_FORMAT_A_SINT16] = 0,
436 [MESA_FORMAT_A_SINT32] = 0,
437
438 [MESA_FORMAT_I_UINT8] = 0,
439 [MESA_FORMAT_I_UINT16] = 0,
440 [MESA_FORMAT_I_UINT32] = 0,
441 [MESA_FORMAT_I_SINT8] = 0,
442 [MESA_FORMAT_I_SINT16] = 0,
443 [MESA_FORMAT_I_SINT32] = 0,
444
445 [MESA_FORMAT_L_UINT8] = 0,
446 [MESA_FORMAT_L_UINT16] = 0,
447 [MESA_FORMAT_L_UINT32] = 0,
448 [MESA_FORMAT_L_SINT8] = 0,
449 [MESA_FORMAT_L_SINT16] = 0,
450 [MESA_FORMAT_L_SINT32] = 0,
451
452 [MESA_FORMAT_LA_UINT8] = 0,
453 [MESA_FORMAT_LA_UINT16] = 0,
454 [MESA_FORMAT_LA_UINT32] = 0,
455 [MESA_FORMAT_LA_SINT8] = 0,
456 [MESA_FORMAT_LA_SINT16] = 0,
457 [MESA_FORMAT_LA_SINT32] = 0,
458
459 [MESA_FORMAT_R_SINT8] = BRW_SURFACEFORMAT_R8_SINT,
460 [MESA_FORMAT_RG_SINT8] = BRW_SURFACEFORMAT_R8G8_SINT,
461 [MESA_FORMAT_RGB_SINT8] = BRW_SURFACEFORMAT_R8G8B8_SINT,
462 [MESA_FORMAT_RGBA_SINT8] = BRW_SURFACEFORMAT_R8G8B8A8_SINT,
463 [MESA_FORMAT_R_SINT16] = BRW_SURFACEFORMAT_R16_SINT,
464 [MESA_FORMAT_RG_SINT16] = BRW_SURFACEFORMAT_R16G16_SINT,
465 [MESA_FORMAT_RGB_SINT16] = BRW_SURFACEFORMAT_R16G16B16_SINT,
466 [MESA_FORMAT_RGBA_SINT16] = BRW_SURFACEFORMAT_R16G16B16A16_SINT,
467 [MESA_FORMAT_R_SINT32] = BRW_SURFACEFORMAT_R32_SINT,
468 [MESA_FORMAT_RG_SINT32] = BRW_SURFACEFORMAT_R32G32_SINT,
469 [MESA_FORMAT_RGB_SINT32] = BRW_SURFACEFORMAT_R32G32B32_SINT,
470 [MESA_FORMAT_RGBA_SINT32] = BRW_SURFACEFORMAT_R32G32B32A32_SINT,
471
472 [MESA_FORMAT_R_UINT8] = BRW_SURFACEFORMAT_R8_UINT,
473 [MESA_FORMAT_RG_UINT8] = BRW_SURFACEFORMAT_R8G8_UINT,
474 [MESA_FORMAT_RGB_UINT8] = BRW_SURFACEFORMAT_R8G8B8_UINT,
475 [MESA_FORMAT_RGBA_UINT8] = BRW_SURFACEFORMAT_R8G8B8A8_UINT,
476 [MESA_FORMAT_R_UINT16] = BRW_SURFACEFORMAT_R16_UINT,
477 [MESA_FORMAT_RG_UINT16] = BRW_SURFACEFORMAT_R16G16_UINT,
478 [MESA_FORMAT_RGB_UINT16] = BRW_SURFACEFORMAT_R16G16B16_UINT,
479 [MESA_FORMAT_RGBA_UINT16] = BRW_SURFACEFORMAT_R16G16B16A16_UINT,
480 [MESA_FORMAT_R_UINT32] = BRW_SURFACEFORMAT_R32_UINT,
481 [MESA_FORMAT_RG_UINT32] = BRW_SURFACEFORMAT_R32G32_UINT,
482 [MESA_FORMAT_RGB_UINT32] = BRW_SURFACEFORMAT_R32G32B32_UINT,
483 [MESA_FORMAT_RGBA_UINT32] = BRW_SURFACEFORMAT_R32G32B32A32_UINT,
484
485 [MESA_FORMAT_R_SNORM8] = BRW_SURFACEFORMAT_R8_SNORM,
486 [MESA_FORMAT_R8G8_SNORM] = BRW_SURFACEFORMAT_R8G8_SNORM,
487 [MESA_FORMAT_X8B8G8R8_SNORM] = 0,
488 [MESA_FORMAT_A8B8G8R8_SNORM] = 0,
489 [MESA_FORMAT_R8G8B8A8_SNORM] = BRW_SURFACEFORMAT_R8G8B8A8_SNORM,
490 [MESA_FORMAT_R_SNORM16] = BRW_SURFACEFORMAT_R16_SNORM,
491 [MESA_FORMAT_R16G16_SNORM] = BRW_SURFACEFORMAT_R16G16_SNORM,
492 [MESA_FORMAT_RGB_SNORM16] = BRW_SURFACEFORMAT_R16G16B16_SNORM,
493 [MESA_FORMAT_RGBA_SNORM16] = BRW_SURFACEFORMAT_R16G16B16A16_SNORM,
494 [MESA_FORMAT_RGBA_UNORM16] = BRW_SURFACEFORMAT_R16G16B16A16_UNORM,
495
496 [MESA_FORMAT_R_RGTC1_UNORM] = BRW_SURFACEFORMAT_BC4_UNORM,
497 [MESA_FORMAT_R_RGTC1_SNORM] = BRW_SURFACEFORMAT_BC4_SNORM,
498 [MESA_FORMAT_RG_RGTC2_UNORM] = BRW_SURFACEFORMAT_BC5_UNORM,
499 [MESA_FORMAT_RG_RGTC2_SNORM] = BRW_SURFACEFORMAT_BC5_SNORM,
500
501 [MESA_FORMAT_L_LATC1_UNORM] = 0,
502 [MESA_FORMAT_L_LATC1_SNORM] = 0,
503 [MESA_FORMAT_LA_LATC2_UNORM] = 0,
504 [MESA_FORMAT_LA_LATC2_SNORM] = 0,
505
506 [MESA_FORMAT_ETC1_RGB8] = BRW_SURFACEFORMAT_ETC1_RGB8,
507 [MESA_FORMAT_ETC2_RGB8] = BRW_SURFACEFORMAT_ETC2_RGB8,
508 [MESA_FORMAT_ETC2_SRGB8] = BRW_SURFACEFORMAT_ETC2_SRGB8,
509 [MESA_FORMAT_ETC2_RGBA8_EAC] = BRW_SURFACEFORMAT_ETC2_EAC_RGBA8,
510 [MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC] = BRW_SURFACEFORMAT_ETC2_EAC_SRGB8_A8,
511 [MESA_FORMAT_ETC2_R11_EAC] = BRW_SURFACEFORMAT_EAC_R11,
512 [MESA_FORMAT_ETC2_RG11_EAC] = BRW_SURFACEFORMAT_EAC_RG11,
513 [MESA_FORMAT_ETC2_SIGNED_R11_EAC] = BRW_SURFACEFORMAT_EAC_SIGNED_R11,
514 [MESA_FORMAT_ETC2_SIGNED_RG11_EAC] = BRW_SURFACEFORMAT_EAC_SIGNED_RG11,
515 [MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1] = BRW_SURFACEFORMAT_ETC2_RGB8_PTA,
516 [MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1] = BRW_SURFACEFORMAT_ETC2_SRGB8_PTA,
517
518 [MESA_FORMAT_BPTC_RGBA_UNORM] = BRW_SURFACEFORMAT_BC7_UNORM,
519 [MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM] = BRW_SURFACEFORMAT_BC7_UNORM_SRGB,
520 [MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_SF16,
521 [MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_UF16,
522
523 [MESA_FORMAT_RGBA_ASTC_4x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_FLT16,
524 [MESA_FORMAT_RGBA_ASTC_5x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_FLT16,
525 [MESA_FORMAT_RGBA_ASTC_5x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_FLT16,
526 [MESA_FORMAT_RGBA_ASTC_6x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_FLT16,
527 [MESA_FORMAT_RGBA_ASTC_6x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_FLT16,
528 [MESA_FORMAT_RGBA_ASTC_8x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_FLT16,
529 [MESA_FORMAT_RGBA_ASTC_8x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_FLT16,
530 [MESA_FORMAT_RGBA_ASTC_8x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_FLT16,
531 [MESA_FORMAT_RGBA_ASTC_10x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_FLT16,
532 [MESA_FORMAT_RGBA_ASTC_10x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_FLT16,
533 [MESA_FORMAT_RGBA_ASTC_10x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_FLT16,
534 [MESA_FORMAT_RGBA_ASTC_10x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_FLT16,
535 [MESA_FORMAT_RGBA_ASTC_12x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_FLT16,
536 [MESA_FORMAT_RGBA_ASTC_12x12] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_FLT16,
537 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_U8sRGB,
538 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_U8sRGB,
539 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_U8sRGB,
540 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_U8sRGB,
541 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_U8sRGB,
542 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_U8sRGB,
543 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_U8sRGB,
544 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_U8sRGB,
545 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_U8sRGB,
546 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_U8sRGB,
547 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_U8sRGB,
548 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_U8sRGB,
549 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_U8sRGB,
550 [MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_U8sRGB,
551
552 [MESA_FORMAT_A_SNORM8] = 0,
553 [MESA_FORMAT_L_SNORM8] = 0,
554 [MESA_FORMAT_L8A8_SNORM] = 0,
555 [MESA_FORMAT_A8L8_SNORM] = 0,
556 [MESA_FORMAT_I_SNORM8] = 0,
557 [MESA_FORMAT_A_SNORM16] = 0,
558 [MESA_FORMAT_L_SNORM16] = 0,
559 [MESA_FORMAT_LA_SNORM16] = 0,
560 [MESA_FORMAT_I_SNORM16] = 0,
561
562 [MESA_FORMAT_R9G9B9E5_FLOAT] = BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP,
563 [MESA_FORMAT_R11G11B10_FLOAT] = BRW_SURFACEFORMAT_R11G11B10_FLOAT,
564
565 [MESA_FORMAT_Z_FLOAT32] = 0,
566 [MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = 0,
567
568 [MESA_FORMAT_R10G10B10A2_UNORM] = BRW_SURFACEFORMAT_R10G10B10A2_UNORM,
569 [MESA_FORMAT_B10G10R10A2_UINT] = BRW_SURFACEFORMAT_B10G10R10A2_UINT,
570 [MESA_FORMAT_R10G10B10A2_UINT] = BRW_SURFACEFORMAT_R10G10B10A2_UINT,
571
572 [MESA_FORMAT_B4G4R4X4_UNORM] = 0,
573 [MESA_FORMAT_B5G5R5X1_UNORM] = BRW_SURFACEFORMAT_B5G5R5X1_UNORM,
574 [MESA_FORMAT_R8G8B8X8_SNORM] = 0,
575 [MESA_FORMAT_R8G8B8X8_SRGB] = BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB,
576 [MESA_FORMAT_X8B8G8R8_SRGB] = 0,
577 [MESA_FORMAT_RGBX_UINT8] = 0,
578 [MESA_FORMAT_RGBX_SINT8] = 0,
579 [MESA_FORMAT_B10G10R10X2_UNORM] = BRW_SURFACEFORMAT_B10G10R10X2_UNORM,
580 [MESA_FORMAT_RGBX_UNORM16] = BRW_SURFACEFORMAT_R16G16B16X16_UNORM,
581 [MESA_FORMAT_RGBX_SNORM16] = 0,
582 [MESA_FORMAT_RGBX_FLOAT16] = BRW_SURFACEFORMAT_R16G16B16X16_FLOAT,
583 [MESA_FORMAT_RGBX_UINT16] = 0,
584 [MESA_FORMAT_RGBX_SINT16] = 0,
585 [MESA_FORMAT_RGBX_FLOAT32] = BRW_SURFACEFORMAT_R32G32B32X32_FLOAT,
586 [MESA_FORMAT_RGBX_UINT32] = 0,
587 [MESA_FORMAT_RGBX_SINT32] = 0,
588 };
589 assert(mesa_format < MESA_FORMAT_COUNT);
590 return table[mesa_format];
591 }
592
593 void
594 brw_init_surface_formats(struct brw_context *brw)
595 {
596 struct gl_context *ctx = &brw->ctx;
597 int gen;
598 mesa_format format;
599
600 memset(&ctx->TextureFormatSupported, 0, sizeof(ctx->TextureFormatSupported));
601
602 gen = brw->gen * 10;
603 if (brw->is_g4x || brw->is_haswell)
604 gen += 5;
605
606 for (format = MESA_FORMAT_NONE + 1; format < MESA_FORMAT_COUNT; format++) {
607 uint32_t texture, render;
608 const struct brw_surface_format_info *rinfo, *tinfo;
609 bool is_integer = _mesa_is_format_integer_color(format);
610
611 render = texture = brw_format_for_mesa_format(format);
612 tinfo = &surface_formats[texture];
613
614 /* The value of BRW_SURFACEFORMAT_R32G32B32A32_FLOAT is 0, so don't skip
615 * it.
616 */
617 if (texture == 0 && format != MESA_FORMAT_RGBA_FLOAT32)
618 continue;
619
620 if (gen >= tinfo->sampling && (gen >= tinfo->filtering || is_integer))
621 ctx->TextureFormatSupported[format] = true;
622
623 /* Re-map some render target formats to make them supported when they
624 * wouldn't be using their format for texturing.
625 */
626 switch (render) {
627 /* For these formats, we just need to read/write the first
628 * channel into R, which is to say that we just treat them as
629 * GL_RED.
630 */
631 case BRW_SURFACEFORMAT_I32_FLOAT:
632 case BRW_SURFACEFORMAT_L32_FLOAT:
633 render = BRW_SURFACEFORMAT_R32_FLOAT;
634 break;
635 case BRW_SURFACEFORMAT_I16_FLOAT:
636 case BRW_SURFACEFORMAT_L16_FLOAT:
637 render = BRW_SURFACEFORMAT_R16_FLOAT;
638 break;
639 case BRW_SURFACEFORMAT_I8_UNORM:
640 case BRW_SURFACEFORMAT_L8_UNORM:
641 render = BRW_SURFACEFORMAT_R8_UNORM;
642 break;
643 case BRW_SURFACEFORMAT_I16_UNORM:
644 case BRW_SURFACEFORMAT_L16_UNORM:
645 render = BRW_SURFACEFORMAT_R16_UNORM;
646 break;
647 case BRW_SURFACEFORMAT_R16G16B16X16_UNORM:
648 render = BRW_SURFACEFORMAT_R16G16B16A16_UNORM;
649 break;
650 case BRW_SURFACEFORMAT_R16G16B16X16_FLOAT:
651 render = BRW_SURFACEFORMAT_R16G16B16A16_FLOAT;
652 break;
653 case BRW_SURFACEFORMAT_B8G8R8X8_UNORM:
654 /* XRGB is handled as ARGB because the chips in this family
655 * cannot render to XRGB targets. This means that we have to
656 * mask writes to alpha (ala glColorMask) and reconfigure the
657 * alpha blending hardware to use GL_ONE (or GL_ZERO) for
658 * cases where GL_DST_ALPHA (or GL_ONE_MINUS_DST_ALPHA) is
659 * used.
660 */
661 render = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
662 break;
663 case BRW_SURFACEFORMAT_R8G8B8X8_UNORM:
664 render = BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
665 break;
666 case BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB:
667 render = BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
668 break;
669 }
670
671 rinfo = &surface_formats[render];
672
673 /* Note that GL_EXT_texture_integer says that blending doesn't occur for
674 * integer, so we don't need hardware support for blending on it. Other
675 * than that, GL in general requires alpha blending for render targets,
676 * even though we don't support it for some formats.
677 */
678 if (gen >= rinfo->render_target &&
679 (gen >= rinfo->alpha_blend || is_integer)) {
680 brw->render_target_format[format] = render;
681 brw->format_supported_as_render_target[format] = true;
682 }
683 }
684
685 /* We will check this table for FBO completeness, but the surface format
686 * table above only covered color rendering.
687 */
688 brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
689 brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
690 brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true;
691 brw->format_supported_as_render_target[MESA_FORMAT_Z_FLOAT32] = true;
692 brw->format_supported_as_render_target[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true;
693 if (brw->gen >= 8)
694 brw->format_supported_as_render_target[MESA_FORMAT_Z_UNORM16] = true;
695
696 /* We remap depth formats to a supported texturing format in
697 * translate_tex_format().
698 */
699 ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
700 ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
701 ctx->TextureFormatSupported[MESA_FORMAT_Z_FLOAT32] = true;
702 ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true;
703
704 /* Benchmarking shows that Z16 is slower than Z24, so there's no reason to
705 * use it unless you're under memory (not memory bandwidth) pressure.
706 *
707 * Apparently, the GPU's depth scoreboarding works on a 32-bit granularity,
708 * which corresponds to one pixel in the depth buffer for Z24 or Z32 formats.
709 * However, it corresponds to two pixels with Z16, which means both need to
710 * hit the early depth case in order for it to happen.
711 *
712 * Other speculation is that we may be hitting increased fragment shader
713 * execution from GL_LEQUAL/GL_EQUAL depth tests at reduced precision.
714 *
715 * With the PMA stall workaround in place, Z16 is faster than Z24, as it
716 * should be.
717 */
718 if (brw->gen >= 8)
719 ctx->TextureFormatSupported[MESA_FORMAT_Z_UNORM16] = true;
720
721 /* On hardware that lacks support for ETC1, we map ETC1 to RGBX
722 * during glCompressedTexImage2D(). See intel_mipmap_tree::wraps_etc1.
723 */
724 ctx->TextureFormatSupported[MESA_FORMAT_ETC1_RGB8] = true;
725
726 /* On hardware that lacks support for ETC2, we map ETC2 to a suitable
727 * MESA_FORMAT during glCompressedTexImage2D().
728 * See intel_mipmap_tree::wraps_etc2.
729 */
730 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_RGB8] = true;
731 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_SRGB8] = true;
732 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_RGBA8_EAC] = true;
733 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC] = true;
734 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_R11_EAC] = true;
735 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_RG11_EAC] = true;
736 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_SIGNED_R11_EAC] = true;
737 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_SIGNED_RG11_EAC] = true;
738 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1] = true;
739 ctx->TextureFormatSupported[MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1] = true;
740 }
741
742 bool
743 brw_render_target_supported(struct brw_context *brw,
744 struct gl_renderbuffer *rb)
745 {
746 mesa_format format = rb->Format;
747
748 /* Many integer formats are promoted to RGBA (like XRGB8888 is), which means
749 * we would consider them renderable even though we don't have surface
750 * support for their alpha behavior and don't have the blending unit
751 * available to fake it like we do for XRGB8888. Force them to being
752 * unsupported.
753 */
754 if (_mesa_is_format_integer_color(format) &&
755 rb->_BaseFormat != GL_RGBA &&
756 rb->_BaseFormat != GL_RG &&
757 rb->_BaseFormat != GL_RED)
758 return false;
759
760 /* Under some conditions, MSAA is not supported for formats whose width is
761 * more than 64 bits.
762 */
763 if (rb->NumSamples > 0 && _mesa_get_format_bytes(format) > 8) {
764 /* Gen6: MSAA on >64 bit formats is unsupported. */
765 if (brw->gen <= 6)
766 return false;
767
768 /* Gen7: 8x MSAA on >64 bit formats is unsupported. */
769 if (rb->NumSamples >= 8)
770 return false;
771 }
772
773 return brw->format_supported_as_render_target[format];
774 }
775
776 /*
777 * True if the underlying hardware format can support lossless color
778 * compression.
779 */
780 bool
781 brw_losslessly_compressible_format(struct brw_context *brw,
782 uint32_t brw_format)
783 {
784 const struct brw_surface_format_info * const sinfo =
785 &surface_formats[brw_format];
786 const int gen = brw->gen * 10;
787
788 assert(brw->gen >= 9);
789
790 if (gen >= sinfo->lossless_compression)
791 return true;
792
793 return false;
794 }
795
796 GLuint
797 translate_tex_format(struct brw_context *brw,
798 mesa_format mesa_format,
799 GLenum srgb_decode)
800 {
801 struct gl_context *ctx = &brw->ctx;
802 if (srgb_decode == GL_SKIP_DECODE_EXT)
803 mesa_format = _mesa_get_srgb_format_linear(mesa_format);
804
805 switch( mesa_format ) {
806
807 case MESA_FORMAT_Z_UNORM16:
808 return BRW_SURFACEFORMAT_R16_UNORM;
809
810 case MESA_FORMAT_Z24_UNORM_S8_UINT:
811 case MESA_FORMAT_Z24_UNORM_X8_UINT:
812 return BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS;
813
814 case MESA_FORMAT_Z_FLOAT32:
815 return BRW_SURFACEFORMAT_R32_FLOAT;
816
817 case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
818 return BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS;
819
820 case MESA_FORMAT_RGBA_FLOAT32:
821 /* The value of this BRW_SURFACEFORMAT is 0, which tricks the
822 * assertion below.
823 */
824 return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT;
825
826 case MESA_FORMAT_SRGB_DXT1:
827 if (brw->gen == 4 && !brw->is_g4x) {
828 /* Work around missing SRGB DXT1 support on original gen4 by just
829 * skipping SRGB decode. It's not worth not supporting sRGB in
830 * general to prevent this.
831 */
832 WARN_ONCE(true, "Demoting sRGB DXT1 texture to non-sRGB\n");
833 mesa_format = MESA_FORMAT_RGB_DXT1;
834 }
835 return brw_format_for_mesa_format(mesa_format);
836
837 case MESA_FORMAT_RGBA_ASTC_4x4:
838 case MESA_FORMAT_RGBA_ASTC_5x4:
839 case MESA_FORMAT_RGBA_ASTC_5x5:
840 case MESA_FORMAT_RGBA_ASTC_6x5:
841 case MESA_FORMAT_RGBA_ASTC_6x6:
842 case MESA_FORMAT_RGBA_ASTC_8x5:
843 case MESA_FORMAT_RGBA_ASTC_8x6:
844 case MESA_FORMAT_RGBA_ASTC_8x8:
845 case MESA_FORMAT_RGBA_ASTC_10x5:
846 case MESA_FORMAT_RGBA_ASTC_10x6:
847 case MESA_FORMAT_RGBA_ASTC_10x8:
848 case MESA_FORMAT_RGBA_ASTC_10x10:
849 case MESA_FORMAT_RGBA_ASTC_12x10:
850 case MESA_FORMAT_RGBA_ASTC_12x12: {
851 GLuint brw_fmt = brw_format_for_mesa_format(mesa_format);
852
853 /**
854 * On Gen9+, it is possible to process these formats using the LDR
855 * Profile or the Full Profile mode of the hardware. Because, it isn't
856 * possible to determine if an HDR or LDR texture is being rendered, we
857 * can't determine which mode to enable in the hardware. Therefore, to
858 * handle all cases, always default to Full profile unless we are
859 * processing sRGBs, which are incompatible with this mode.
860 */
861 if (brw->gen >= 9)
862 brw_fmt |= GEN9_SURFACE_ASTC_HDR_FORMAT_BIT;
863
864 return brw_fmt;
865 }
866
867 default:
868 assert(brw_format_for_mesa_format(mesa_format) != 0);
869 return brw_format_for_mesa_format(mesa_format);
870 }
871 }
872
873 /**
874 * Convert a MESA_FORMAT to the corresponding BRW_DEPTHFORMAT enum.
875 */
876 uint32_t
877 brw_depth_format(struct brw_context *brw, mesa_format format)
878 {
879 switch (format) {
880 case MESA_FORMAT_Z_UNORM16:
881 return BRW_DEPTHFORMAT_D16_UNORM;
882 case MESA_FORMAT_Z_FLOAT32:
883 return BRW_DEPTHFORMAT_D32_FLOAT;
884 case MESA_FORMAT_Z24_UNORM_X8_UINT:
885 if (brw->gen >= 6) {
886 return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
887 } else {
888 /* Use D24_UNORM_S8, not D24_UNORM_X8.
889 *
890 * D24_UNORM_X8 was not introduced until Gen5. (See the Ironlake PRM,
891 * Volume 2, Part 1, Section 8.4.6 "Depth/Stencil Buffer State", Bits
892 * 3DSTATE_DEPTH_BUFFER.Surface_Format).
893 *
894 * However, on Gen5, D24_UNORM_X8 may be used only if separate
895 * stencil is enabled, and we never enable it. From the Ironlake PRM,
896 * same section as above, 3DSTATE_DEPTH_BUFFER's
897 * "Separate Stencil Buffer Enable" bit:
898 *
899 * "If this field is disabled, the Surface Format of the depth
900 * buffer cannot be D24_UNORM_X8_UINT."
901 */
902 return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
903 }
904 case MESA_FORMAT_Z24_UNORM_S8_UINT:
905 return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
906 case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
907 return BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT;
908 default:
909 unreachable("Unexpected depth format.");
910 }
911 }
912
913 mesa_format
914 brw_lower_mesa_image_format(const struct brw_device_info *devinfo,
915 mesa_format format)
916 {
917 switch (format) {
918 /* These are never lowered. Up to BDW we'll have to fall back to untyped
919 * surface access for 128bpp formats.
920 */
921 case MESA_FORMAT_RGBA_UINT32:
922 case MESA_FORMAT_RGBA_SINT32:
923 case MESA_FORMAT_RGBA_FLOAT32:
924 case MESA_FORMAT_R_UINT32:
925 case MESA_FORMAT_R_SINT32:
926 case MESA_FORMAT_R_FLOAT32:
927 return format;
928
929 /* From HSW to BDW the only 64bpp format supported for typed access is
930 * RGBA_UINT16. IVB falls back to untyped.
931 */
932 case MESA_FORMAT_RGBA_UINT16:
933 case MESA_FORMAT_RGBA_SINT16:
934 case MESA_FORMAT_RGBA_FLOAT16:
935 case MESA_FORMAT_RG_UINT32:
936 case MESA_FORMAT_RG_SINT32:
937 case MESA_FORMAT_RG_FLOAT32:
938 return (devinfo->gen >= 9 ? format :
939 devinfo->gen >= 8 || devinfo->is_haswell ?
940 MESA_FORMAT_RGBA_UINT16 : MESA_FORMAT_RG_UINT32);
941
942 /* Up to BDW no SINT or FLOAT formats of less than 32 bits per component
943 * are supported. IVB doesn't support formats with more than one component
944 * for typed access. For 8 and 16 bpp formats IVB relies on the
945 * undocumented behavior that typed reads from R_UINT8 and R_UINT16
946 * surfaces actually do a 32-bit misaligned read. The alternative would be
947 * to use two surface state entries with different formats for each image,
948 * one for reading (using R_UINT32) and another one for writing (using
949 * R_UINT8 or R_UINT16), but that would complicate the shaders we generate
950 * even more.
951 */
952 case MESA_FORMAT_RGBA_UINT8:
953 case MESA_FORMAT_RGBA_SINT8:
954 return (devinfo->gen >= 9 ? format :
955 devinfo->gen >= 8 || devinfo->is_haswell ?
956 MESA_FORMAT_RGBA_UINT8 : MESA_FORMAT_R_UINT32);
957
958 case MESA_FORMAT_RG_UINT16:
959 case MESA_FORMAT_RG_SINT16:
960 case MESA_FORMAT_RG_FLOAT16:
961 return (devinfo->gen >= 9 ? format :
962 devinfo->gen >= 8 || devinfo->is_haswell ?
963 MESA_FORMAT_RG_UINT16 : MESA_FORMAT_R_UINT32);
964
965 case MESA_FORMAT_RG_UINT8:
966 case MESA_FORMAT_RG_SINT8:
967 return (devinfo->gen >= 9 ? format :
968 devinfo->gen >= 8 || devinfo->is_haswell ?
969 MESA_FORMAT_RG_UINT8 : MESA_FORMAT_R_UINT16);
970
971 case MESA_FORMAT_R_UINT16:
972 case MESA_FORMAT_R_FLOAT16:
973 case MESA_FORMAT_R_SINT16:
974 return (devinfo->gen >= 9 ? format : MESA_FORMAT_R_UINT16);
975
976 case MESA_FORMAT_R_UINT8:
977 case MESA_FORMAT_R_SINT8:
978 return (devinfo->gen >= 9 ? format : MESA_FORMAT_R_UINT8);
979
980 /* Neither the 2/10/10/10 nor the 11/11/10 packed formats are supported
981 * by the hardware.
982 */
983 case MESA_FORMAT_R10G10B10A2_UINT:
984 case MESA_FORMAT_R10G10B10A2_UNORM:
985 case MESA_FORMAT_R11G11B10_FLOAT:
986 return MESA_FORMAT_R_UINT32;
987
988 /* No normalized fixed-point formats are supported by the hardware. */
989 case MESA_FORMAT_RGBA_UNORM16:
990 case MESA_FORMAT_RGBA_SNORM16:
991 return (devinfo->gen >= 8 || devinfo->is_haswell ?
992 MESA_FORMAT_RGBA_UINT16 : MESA_FORMAT_RG_UINT32);
993
994 case MESA_FORMAT_R8G8B8A8_UNORM:
995 case MESA_FORMAT_R8G8B8A8_SNORM:
996 return (devinfo->gen >= 8 || devinfo->is_haswell ?
997 MESA_FORMAT_RGBA_UINT8 : MESA_FORMAT_R_UINT32);
998
999 case MESA_FORMAT_R16G16_UNORM:
1000 case MESA_FORMAT_R16G16_SNORM:
1001 return (devinfo->gen >= 8 || devinfo->is_haswell ?
1002 MESA_FORMAT_RG_UINT16 : MESA_FORMAT_R_UINT32);
1003
1004 case MESA_FORMAT_R8G8_UNORM:
1005 case MESA_FORMAT_R8G8_SNORM:
1006 return (devinfo->gen >= 8 || devinfo->is_haswell ?
1007 MESA_FORMAT_RG_UINT8 : MESA_FORMAT_R_UINT16);
1008
1009 case MESA_FORMAT_R_UNORM16:
1010 case MESA_FORMAT_R_SNORM16:
1011 return MESA_FORMAT_R_UINT16;
1012
1013 case MESA_FORMAT_R_UNORM8:
1014 case MESA_FORMAT_R_SNORM8:
1015 return MESA_FORMAT_R_UINT8;
1016
1017 default:
1018 unreachable("Unknown image format");
1019 }
1020 }