src/mesa/drivers/dri/i965/brw_tes.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * \file brw_tes.c
  26  *
  27  * Tessellation evaluation shader state upload code.
  28  */
  29
  30 #include "brw_context.h"
  31 #include "compiler/brw_nir.h"
  32 #include "brw_program.h"
  33 #include "brw_state.h"
  34 #include "program/prog_parameter.h"
  35
  36 static bool
  37 brw_codegen_tes_prog(struct brw_context *brw,
  38                      struct brw_program *tep,
  39                      struct brw_tes_prog_key *key)
  40 {
  41    const struct brw_compiler *compiler = brw->screen->compiler;
  42    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  43    struct brw_stage_state *stage_state = &brw->tes.base;
  44    struct brw_tes_prog_data prog_data;
  45    bool start_busy = false;
  46    double start_time = 0;
  47
  48    memset(&prog_data, 0, sizeof(prog_data));
  49
  50    void *mem_ctx = ralloc_context(NULL);
  51
  52    nir_shader *nir = nir_shader_clone(mem_ctx, tep->program.nir);
  53
  54    brw_assign_common_binding_table_offsets(devinfo, &tep->program,
  55                                            &prog_data.base.base, 0);
  56
  57    brw_nir_setup_glsl_uniforms(mem_ctx, nir, &tep->program,
  58                                &prog_data.base.base,
  59                                compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
  60    brw_nir_analyze_ubo_ranges(compiler, nir, NULL,
  61                               prog_data.base.base.ubo_ranges);
  62
  63    int st_index = -1;
  64    if (unlikely(INTEL_DEBUG & DEBUG_SHADER_TIME))
  65       st_index = brw_get_shader_time_index(brw, &tep->program, ST_TES, true);
  66
  67    if (unlikely(brw->perf_debug)) {
  68       start_busy = brw->batch.last_bo && brw_bo_busy(brw->batch.last_bo);
  69       start_time = get_time();
  70    }
  71
  72    struct brw_vue_map input_vue_map;
  73    brw_compute_tess_vue_map(&input_vue_map, key->inputs_read,
  74                             key->patch_inputs_read);
  75
  76    char *error_str;
  77    const unsigned *program =
  78       brw_compile_tes(compiler, brw, mem_ctx, key, &input_vue_map, &prog_data,
  79                       nir, &tep->program, st_index, &error_str);
  80    if (program == NULL) {
  81       tep->program.sh.data->LinkStatus = LINKING_FAILURE;
  82       ralloc_strcat(&tep->program.sh.data->InfoLog, error_str);
  83
  84       _mesa_problem(NULL, "Failed to compile tessellation evaluation shader: "
  85                     "%s\n", error_str);
  86
  87       ralloc_free(mem_ctx);
  88       return false;
  89    }
  90
  91    if (unlikely(brw->perf_debug)) {
  92       if (tep->compiled_once) {
  93          brw_debug_recompile(brw, MESA_SHADER_TESS_EVAL, tep->program.Id,
  94                              &key->base);
  95       }
  96       if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
  97          perf_debug("TES compile took %.03f ms and stalled the GPU\n",
  98                     (get_time() - start_time) * 1000);
  99       }
 100       tep->compiled_once = true;
 101    }
 102
 103    /* Scratch space is used for register spilling */
 104    brw_alloc_stage_scratch(brw, stage_state,
 105                            prog_data.base.base.total_scratch);
 106
 107    /* The param and pull_param arrays will be freed by the shader cache. */
 108    ralloc_steal(NULL, prog_data.base.base.param);
 109    ralloc_steal(NULL, prog_data.base.base.pull_param);
 110    brw_upload_cache(&brw->cache, BRW_CACHE_TES_PROG,
 111                     key, sizeof(*key),
 112                     program, prog_data.base.base.program_size,
 113                     &prog_data, sizeof(prog_data),
 114                     &stage_state->prog_offset, &brw->tes.base.prog_data);
 115    ralloc_free(mem_ctx);
 116
 117    return true;
 118 }
 119
 120 void
 121 brw_tes_populate_key(struct brw_context *brw,
 122                      struct brw_tes_prog_key *key)
 123 {
 124    struct brw_program *tcp =
 125       (struct brw_program *) brw->programs[MESA_SHADER_TESS_CTRL];
 126    struct brw_program *tep =
 127       (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
 128    struct gl_program *prog = &tep->program;
 129
 130    uint64_t per_vertex_slots = prog->info.inputs_read;
 131    uint32_t per_patch_slots = prog->info.patch_inputs_read;
 132
 133    memset(key, 0, sizeof(*key));
 134
 135    /* _NEW_TEXTURE */
 136    brw_populate_base_prog_key(&brw->ctx, tep, &key->base);
 137
 138    /* The TCS may have additional outputs which aren't read by the
 139     * TES (possibly for cross-thread communication).  These need to
 140     * be stored in the Patch URB Entry as well.
 141     */
 142    if (tcp) {
 143       struct gl_program *tcp_prog = &tcp->program;
 144       per_vertex_slots |= tcp_prog->info.outputs_written &
 145          ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 146       per_patch_slots |= tcp_prog->info.patch_outputs_written;
 147    }
 148
 149    key->inputs_read = per_vertex_slots;
 150    key->patch_inputs_read = per_patch_slots;
 151 }
 152
 153 void
 154 brw_upload_tes_prog(struct brw_context *brw)
 155 {
 156    struct brw_stage_state *stage_state = &brw->tes.base;
 157    struct brw_tes_prog_key key;
 158    /* BRW_NEW_TESS_PROGRAMS */
 159    struct brw_program *tep =
 160       (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
 161
 162    if (!brw_state_dirty(brw,
 163                         _NEW_TEXTURE,
 164                         BRW_NEW_TESS_PROGRAMS))
 165       return;
 166
 167    brw_tes_populate_key(brw, &key);
 168
 169    if (brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG, &key, sizeof(key),
 170                         &stage_state->prog_offset, &brw->tes.base.prog_data,
 171                         true))
 172       return;
 173
 174    if (brw_disk_cache_upload_program(brw, MESA_SHADER_TESS_EVAL))
 175       return;
 176
 177    tep = (struct brw_program *) brw->programs[MESA_SHADER_TESS_EVAL];
 178    tep->id = key.base.program_string_id;
 179
 180    MAYBE_UNUSED bool success = brw_codegen_tes_prog(brw, tep, &key);
 181    assert(success);
 182 }
 183
 184 void
 185 brw_tes_populate_default_key(const struct brw_compiler *compiler,
 186                              struct brw_tes_prog_key *key,
 187                              struct gl_shader_program *sh_prog,
 188                              struct gl_program *prog)
 189 {
 190    const struct gen_device_info *devinfo = compiler->devinfo;
 191    struct brw_program *btep = brw_program(prog);
 192
 193    memset(key, 0, sizeof(*key));
 194
 195    brw_populate_default_base_prog_key(devinfo, btep, &key->base);
 196
 197    key->inputs_read = prog->nir->info.inputs_read;
 198    key->patch_inputs_read = prog->nir->info.patch_inputs_read;
 199
 200    if (sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
 201       struct gl_program *tcp =
 202          sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
 203       key->inputs_read |= tcp->nir->info.outputs_written &
 204          ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 205       key->patch_inputs_read |= tcp->nir->info.patch_outputs_written;
 206    }
 207 }
 208
 209 bool
 210 brw_tes_precompile(struct gl_context *ctx,
 211                    struct gl_shader_program *shader_prog,
 212                    struct gl_program *prog)
 213 {
 214    struct brw_context *brw = brw_context(ctx);
 215    const struct brw_compiler *compiler = brw->screen->compiler;
 216    struct brw_tes_prog_key key;
 217    uint32_t old_prog_offset = brw->tes.base.prog_offset;
 218    struct brw_stage_prog_data *old_prog_data = brw->tes.base.prog_data;
 219    bool success;
 220
 221    struct brw_program *btep = brw_program(prog);
 222
 223    brw_tes_populate_default_key(compiler, &key, shader_prog, prog);
 224
 225    success = brw_codegen_tes_prog(brw, btep, &key);
 226
 227    brw->tes.base.prog_offset = old_prog_offset;
 228    brw->tes.base.prog_data = old_prog_data;
 229
 230    return success;
 231 }