src/mesa/drivers/dri/i965/brw_wm_pass1.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_wm.h"
  35
  36
  37 static GLuint get_tracked_mask(struct brw_wm_compile *c,
  38                                struct brw_wm_instruction *inst)
  39 {
  40    GLuint i;
  41    for (i = 0; i < 4; i++) {
  42       if (inst->writemask & (1<<i)) {
  43          if (!inst->dst[i]->contributes_to_output) {
  44             inst->writemask &= ~(1<<i);
  45             inst->dst[i] = 0;
  46          }
  47       }
  48    }
  49
  50    return inst->writemask;
  51 }
  52
  53 /* Remove a reference from a value's usage chain.
  54  */
  55 static void unlink_ref(struct brw_wm_ref *ref)
  56 {
  57    struct brw_wm_value *value = ref->value;
  58
  59    if (ref == value->lastuse) {
  60       value->lastuse = ref->prevuse;
  61    }
  62    else {
  63       struct brw_wm_ref *i = value->lastuse;
  64       while (i->prevuse != ref) i = i->prevuse;
  65       i->prevuse = ref->prevuse;
  66    }
  67 }
  68
  69 static void track_arg(struct brw_wm_compile *c,
  70                       struct brw_wm_instruction *inst,
  71                       GLuint arg,
  72                       GLuint readmask)
  73 {
  74    GLuint i;
  75
  76    for (i = 0; i < 4; i++) {
  77       struct brw_wm_ref *ref = inst->src[arg][i];
  78       if (ref) {
  79          if (readmask & (1<<i)) {
  80             ref->value->contributes_to_output = 1;
  81          }
  82          else {
  83             unlink_ref(ref);
  84             inst->src[arg][i] = NULL;
  85          }
  86       }
  87    }
  88 }
  89
  90 static GLuint get_texcoord_mask( GLuint tex_idx )
  91 {
  92    switch (tex_idx) {
  93    case TEXTURE_1D_INDEX:
  94       return WRITEMASK_X;
  95    case TEXTURE_2D_INDEX:
  96       return WRITEMASK_XY;
  97    case TEXTURE_3D_INDEX:
  98       return WRITEMASK_XYZ;
  99    case TEXTURE_CUBE_INDEX:
 100       return WRITEMASK_XYZ;
 101    case TEXTURE_RECT_INDEX:
 102       return WRITEMASK_XY;
 103    default: return 0;
 104    }
 105 }
 106
 107
 108 /* Step two: Basically this is dead code elimination.
 109  *
 110  * Iterate backwards over instructions, noting which values
 111  * contribute to the final result.  Adjust writemasks to only
 112  * calculate these values.
 113  */
 114 void brw_wm_pass1( struct brw_wm_compile *c )
 115 {
 116    GLint insn;
 117
 118    for (insn = c->nr_insns-1; insn >= 0; insn--) {
 119       struct brw_wm_instruction *inst = &c->instruction[insn];
 120       GLuint writemask;
 121       GLuint read0, read1, read2;
 122
 123       if (inst->opcode == OPCODE_KIL) {
 124          track_arg(c, inst, 0, WRITEMASK_XYZW); /* All args contribute to final */
 125          continue;
 126       }
 127
 128       if (inst->opcode == WM_FB_WRITE) {
 129          track_arg(c, inst, 0, WRITEMASK_XYZW);
 130          track_arg(c, inst, 1, WRITEMASK_XYZW);
 131          if (c->key.source_depth_to_render_target &&
 132              c->key.computes_depth)
 133             track_arg(c, inst, 2, WRITEMASK_Z);
 134          else
 135             track_arg(c, inst, 2, 0);
 136          continue;
 137       }
 138
 139       /* Lookup all the registers which were written by this
 140        * instruction and get a mask of those that contribute to the output:
 141        */
 142       writemask = get_tracked_mask(c, inst);
 143       if (!writemask) {
 144          GLuint arg;
 145          for (arg = 0; arg < 3; arg++)
 146             track_arg(c, inst, arg, 0);
 147          continue;
 148       }
 149
 150       read0 = 0;
 151       read1 = 0;
 152       read2 = 0;
 153
 154       /* Mark all inputs which contribute to the marked outputs:
 155        */
 156       switch (inst->opcode) {
 157       case OPCODE_ABS:
 158       case OPCODE_FLR:
 159       case OPCODE_FRC:
 160       case OPCODE_MOV:
 161       case OPCODE_SSG:
 162       case OPCODE_SWZ:
 163       case OPCODE_TRUNC:
 164          read0 = writemask;
 165          break;
 166
 167       case OPCODE_SUB:
 168       case OPCODE_SLT:
 169       case OPCODE_SLE:
 170       case OPCODE_SGE:
 171       case OPCODE_SGT:
 172       case OPCODE_SEQ:
 173       case OPCODE_SNE:
 174       case OPCODE_ADD:
 175       case OPCODE_MAX:
 176       case OPCODE_MIN:
 177       case OPCODE_MUL:
 178          read0 = writemask;
 179          read1 = writemask;
 180          break;
 181
 182       case OPCODE_DDX:
 183       case OPCODE_DDY:
 184          read0 = writemask;
 185          break;
 186
 187       case OPCODE_MAD:
 188       case OPCODE_CMP:
 189       case OPCODE_LRP:
 190          read0 = writemask;
 191          read1 = writemask;
 192          read2 = writemask;
 193          break;
 194
 195       case OPCODE_XPD:
 196          if (writemask & WRITEMASK_X) read0 |= WRITEMASK_YZ;
 197          if (writemask & WRITEMASK_Y) read0 |= WRITEMASK_XZ;
 198          if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY;
 199          read1 = read0;
 200          break;
 201
 202       case OPCODE_COS:
 203       case OPCODE_EX2:
 204       case OPCODE_LG2:
 205       case OPCODE_RCP:
 206       case OPCODE_RSQ:
 207       case OPCODE_SIN:
 208       case OPCODE_SCS:
 209       case WM_CINTERP:
 210       case WM_PIXELXY:
 211          read0 = WRITEMASK_X;
 212          break;
 213
 214       case OPCODE_POW:
 215          read0 = WRITEMASK_X;
 216          read1 = WRITEMASK_X;
 217          break;
 218
 219       case OPCODE_TEX:
 220       case OPCODE_TXP:
 221          read0 = get_texcoord_mask(inst->tex_idx);
 222
 223          if (inst->tex_shadow)
 224             read0 |= WRITEMASK_Z;
 225          break;
 226
 227       case OPCODE_TXB:
 228          /* Shadow ignored for txb.
 229           */
 230          read0 = get_texcoord_mask(inst->tex_idx) | WRITEMASK_W;
 231          break;
 232
 233       case WM_WPOSXY:
 234          read0 = writemask & WRITEMASK_XY;
 235          break;
 236
 237       case WM_DELTAXY:
 238          read0 = writemask & WRITEMASK_XY;
 239          read1 = WRITEMASK_X;
 240          break;
 241
 242       case WM_PIXELW:
 243          read0 = WRITEMASK_X;
 244          read1 = WRITEMASK_XY;
 245          break;
 246
 247       case WM_LINTERP:
 248          read0 = WRITEMASK_X;
 249          read1 = WRITEMASK_XY;
 250          break;
 251
 252       case WM_PINTERP:
 253          read0 = WRITEMASK_X; /* interpolant */
 254          read1 = WRITEMASK_XY; /* deltas */
 255          read2 = WRITEMASK_W; /* pixel w */
 256          break;
 257
 258       case OPCODE_DP2:
 259          read0 = WRITEMASK_XY;
 260          read1 = WRITEMASK_XY;
 261          break;
 262
 263       case OPCODE_DP3:
 264          read0 = WRITEMASK_XYZ;
 265          read1 = WRITEMASK_XYZ;
 266          break;
 267
 268       case OPCODE_DPH:
 269          read0 = WRITEMASK_XYZ;
 270          read1 = WRITEMASK_XYZW;
 271          break;
 272
 273       case OPCODE_DP4:
 274          read0 = WRITEMASK_XYZW;
 275          read1 = WRITEMASK_XYZW;
 276          break;
 277
 278       case OPCODE_LIT:
 279          read0 = WRITEMASK_XYW;
 280          break;
 281
 282       case OPCODE_DST:
 283       case WM_FRONTFACING:
 284       case OPCODE_KIL_NV:
 285       default:
 286          break;
 287       }
 288
 289       track_arg(c, inst, 0, read0);
 290       track_arg(c, inst, 1, read1);
 291       track_arg(c, inst, 2, read2);
 292    }
 293
 294    if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
 295       brw_wm_print_program(c, "pass1");
 296    }
 297 }