Merge branch 'lp-offset-twoside'
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_sf_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "brw_util.h"
32 #include "main/macros.h"
33 #include "intel_batchbuffer.h"
34
35 static uint32_t
36 get_attr_override(struct brw_context *brw, int fs_attr)
37 {
38 int attr_index = 0, i, vs_attr;
39
40 if (fs_attr <= FRAG_ATTRIB_TEX7)
41 vs_attr = fs_attr;
42 else if (fs_attr == FRAG_ATTRIB_FACE)
43 vs_attr = 0; /* XXX */
44 else if (fs_attr == FRAG_ATTRIB_PNTC)
45 vs_attr = 0; /* XXX */
46 else {
47 assert(fs_attr >= FRAG_ATTRIB_VAR0);
48 vs_attr = fs_attr - FRAG_ATTRIB_VAR0 + VERT_RESULT_VAR0;
49 }
50
51 /* Find the source index (0 = first attribute after the 4D position)
52 * for this output attribute. attr is currently a VERT_RESULT_* but should
53 * be FRAG_ATTRIB_*.
54 */
55 for (i = 1; i < vs_attr; i++) {
56 if (brw->vs.prog_data->outputs_written & BITFIELD64_BIT(i))
57 attr_index++;
58 }
59
60 return attr_index;
61 }
62
63 static void
64 upload_sf_state(struct brw_context *brw)
65 {
66 struct intel_context *intel = &brw->intel;
67 struct gl_context *ctx = &intel->ctx;
68 /* CACHE_NEW_VS_PROG */
69 uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
70 uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
71 uint32_t dw1, dw2, dw3, dw4, dw16;
72 int i;
73 /* _NEW_BUFFER */
74 GLboolean render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
75 int attr = 0;
76 int urb_start;
77
78 /* _NEW_TRANSFORM */
79 if (ctx->Transform.ClipPlanesEnabled)
80 urb_start = 2;
81 else
82 urb_start = 1;
83
84 dw1 =
85 GEN6_SF_SWIZZLE_ENABLE |
86 num_outputs << GEN6_SF_NUM_OUTPUTS_SHIFT |
87 (num_inputs + 1) / 2 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
88 urb_start << GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT;
89 dw2 = GEN6_SF_VIEWPORT_TRANSFORM_ENABLE |
90 GEN6_SF_STATISTICS_ENABLE;
91 dw3 = 0;
92 dw4 = 0;
93 dw16 = 0;
94
95 /* _NEW_POLYGON */
96 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
97 dw2 |= GEN6_SF_WINDING_CCW;
98
99 if (ctx->Polygon.OffsetFill)
100 dw2 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
101
102 /* _NEW_SCISSOR */
103 if (ctx->Scissor.Enabled)
104 dw3 |= GEN6_SF_SCISSOR_ENABLE;
105
106 /* _NEW_POLYGON */
107 if (ctx->Polygon.CullFlag) {
108 switch (ctx->Polygon.CullFaceMode) {
109 case GL_FRONT:
110 dw3 |= GEN6_SF_CULL_FRONT;
111 break;
112 case GL_BACK:
113 dw3 |= GEN6_SF_CULL_BACK;
114 break;
115 case GL_FRONT_AND_BACK:
116 dw3 |= GEN6_SF_CULL_BOTH;
117 break;
118 default:
119 assert(0);
120 break;
121 }
122 } else {
123 dw3 |= GEN6_SF_CULL_NONE;
124 }
125
126 /* _NEW_LINE */
127 dw3 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
128 GEN6_SF_LINE_WIDTH_SHIFT;
129 if (ctx->Line.SmoothFlag) {
130 dw3 |= GEN6_SF_LINE_AA_ENABLE;
131 dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;
132 dw3 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
133 }
134
135 /* _NEW_POINT */
136 if (!(ctx->VertexProgram.PointSizeEnabled ||
137 ctx->Point._Attenuated))
138 dw4 |= GEN6_SF_USE_STATE_POINT_WIDTH;
139
140 dw4 |= U_FIXED(CLAMP(ctx->Point.Size, 0.125, 225.875), 3) <<
141 GEN6_SF_POINT_WIDTH_SHIFT;
142 if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
143 dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
144
145 /* _NEW_LIGHT */
146 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
147 dw4 |=
148 (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
149 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
150 (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
151 } else {
152 dw4 |=
153 (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
154 }
155
156 if (ctx->Point.PointSprite) {
157 for (i = 0; i < 8; i++) {
158 if (ctx->Point.CoordReplace[i])
159 dw16 |= (1 << i);
160 }
161 }
162
163 BEGIN_BATCH(20);
164 OUT_BATCH(CMD_3D_SF_STATE << 16 | (20 - 2));
165 OUT_BATCH(dw1);
166 OUT_BATCH(dw2);
167 OUT_BATCH(dw3);
168 OUT_BATCH(dw4);
169 OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
170 OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
171 OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
172 for (i = 0; i < 8; i++) {
173 uint32_t attr_overrides = 0;
174
175 for (; attr < 64; attr++) {
176 if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
177 attr_overrides |= get_attr_override(brw, attr);
178 attr++;
179 break;
180 }
181 }
182
183 for (; attr < 64; attr++) {
184 if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
185 attr_overrides |= get_attr_override(brw, attr) << 16;
186 attr++;
187 break;
188 }
189 }
190 OUT_BATCH(attr_overrides);
191 }
192 OUT_BATCH(dw16); /* point sprite texcoord bitmask */
193 OUT_BATCH(0); /* constant interp bitmask */
194 OUT_BATCH(0); /* wrapshortest enables 0-7 */
195 OUT_BATCH(0); /* wrapshortest enables 8-15 */
196 ADVANCE_BATCH();
197 }
198
199 const struct brw_tracked_state gen6_sf_state = {
200 .dirty = {
201 .mesa = (_NEW_LIGHT |
202 _NEW_POLYGON |
203 _NEW_LINE |
204 _NEW_SCISSOR |
205 _NEW_BUFFERS |
206 _NEW_POINT |
207 _NEW_TRANSFORM),
208 .brw = BRW_NEW_CONTEXT,
209 .cache = CACHE_NEW_VS_PROG
210 },
211 .emit = upload_sf_state,
212 };