src/mesa/drivers/dri/i965/gen7_sf_state.c

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_state.h"
  26 #include "brw_defines.h"
  27 #include "brw_util.h"
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30
  31 static void
  32 upload_sbe_state(struct brw_context *brw)
  33 {
  34    struct intel_context *intel = &brw->intel;
  35    struct gl_context *ctx = &intel->ctx;
  36    /* CACHE_NEW_VS_PROG */
  37    uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
  38    /* BRW_NEW_FRAGMENT_PROGRAM */
  39    uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
  40    uint32_t dw1, dw10, dw11;
  41    int i;
  42    int attr = 0, input_index = 0;
  43    /* _NEW_TRANSFORM */
  44    int urb_start = ctx->Transform.ClipPlanesEnabled ? 2 : 1;
  45    /* _NEW_LIGHT */
  46    int two_side_color = (ctx->Light.Enabled && ctx->Light.Model.TwoSide);
  47    uint16_t attr_overrides[FRAG_ATTRIB_MAX];
  48
  49    /* FINISHME: Attribute Swizzle Control Mode? */
  50    dw1 =
  51       GEN7_SBE_SWIZZLE_ENABLE |
  52       num_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT |
  53       (num_inputs + 1) / 2 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT |
  54       urb_start << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
  55
  56    /* _NEW_POINT */
  57    if (ctx->Point.SpriteOrigin == GL_LOWER_LEFT)
  58       dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
  59
  60    dw10 = 0;
  61
  62    /* _NEW_LIGHT (flat shading) */
  63    dw11 = 0;
  64    if (ctx->Light.ShadeModel == GL_FLAT) {
  65        dw11 |= ((brw->fragment_program->Base.InputsRead & (FRAG_BIT_COL0 | FRAG_BIT_COL1)) >>
  66                 ((brw->fragment_program->Base.InputsRead & FRAG_BIT_WPOS) ? 0 : 1));
  67    }
  68
  69    /* Create the mapping from the FS inputs we produce to the VS outputs
  70     * they source from.
  71     */
  72    for (; attr < FRAG_ATTRIB_MAX; attr++) {
  73       if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)))
  74          continue;
  75
  76       if (ctx->Point.PointSprite &&
  77           attr >= FRAG_ATTRIB_TEX0 && attr <= FRAG_ATTRIB_TEX7 &&
  78           ctx->Point.CoordReplace[attr - FRAG_ATTRIB_TEX0]) {
  79          dw10 |= (1 << input_index);
  80       }
  81
  82       if (attr == FRAG_ATTRIB_PNTC)
  83          dw10 |= (1 << input_index);
  84
  85       /* The hardware can only do the overrides on 16 overrides at a
  86        * time, and the other up to 16 have to be lined up so that the
  87        * input index = the output index.  We'll need to do some
  88        * tweaking to make sure that's the case.
  89        */
  90       assert(input_index < 16 || attr == input_index);
  91
  92       attr_overrides[input_index++] = get_attr_override(brw, attr,
  93                                                         two_side_color);
  94    }
  95
  96    for (; attr < FRAG_ATTRIB_MAX; attr++)
  97       attr_overrides[input_index++] = 0;
  98
  99    BEGIN_BATCH(14);
 100    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
 101    OUT_BATCH(dw1);
 102
 103    /* Output dwords 2 through 9 */
 104    for (i = 0; i < 8; i++) {
 105       OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16);
 106    }
 107
 108    OUT_BATCH(dw10); /* point sprite texcoord bitmask */
 109    OUT_BATCH(dw11); /* constant interp bitmask */
 110    OUT_BATCH(0); /* wrapshortest enables 0-7 */
 111    OUT_BATCH(0); /* wrapshortest enables 8-15 */
 112    ADVANCE_BATCH();
 113 }
 114
 115 const struct brw_tracked_state gen7_sbe_state = {
 116    .dirty = {
 117       .mesa  = (_NEW_LIGHT |
 118                 _NEW_POINT |
 119                 _NEW_TRANSFORM),
 120       .brw   = (BRW_NEW_CONTEXT |
 121                 BRW_NEW_FRAGMENT_PROGRAM),
 122       .cache = CACHE_NEW_VS_PROG
 123    },
 124    .emit = upload_sbe_state,
 125 };
 126
 127 static void
 128 upload_sf_state(struct brw_context *brw)
 129 {
 130    struct intel_context *intel = &brw->intel;
 131    struct gl_context *ctx = &intel->ctx;
 132    uint32_t dw1, dw2, dw3;
 133    float point_size;
 134    /* _NEW_BUFFERS */
 135    bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 136
 137    dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 138
 139    /* _NEW_BUFFERS */
 140    dw1 |= (gen7_depth_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
 141
 142    /* _NEW_POLYGON */
 143    if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
 144       dw1 |= GEN6_SF_WINDING_CCW;
 145
 146    if (ctx->Polygon.OffsetFill)
 147        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
 148
 149    if (ctx->Polygon.OffsetLine)
 150        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME;
 151
 152    if (ctx->Polygon.OffsetPoint)
 153        dw1 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT;
 154
 155    switch (ctx->Polygon.FrontMode) {
 156    case GL_FILL:
 157        dw1 |= GEN6_SF_FRONT_SOLID;
 158        break;
 159
 160    case GL_LINE:
 161        dw1 |= GEN6_SF_FRONT_WIREFRAME;
 162        break;
 163
 164    case GL_POINT:
 165        dw1 |= GEN6_SF_FRONT_POINT;
 166        break;
 167
 168    default:
 169        assert(0);
 170        break;
 171    }
 172
 173    switch (ctx->Polygon.BackMode) {
 174    case GL_FILL:
 175        dw1 |= GEN6_SF_BACK_SOLID;
 176        break;
 177
 178    case GL_LINE:
 179        dw1 |= GEN6_SF_BACK_WIREFRAME;
 180        break;
 181
 182    case GL_POINT:
 183        dw1 |= GEN6_SF_BACK_POINT;
 184        break;
 185
 186    default:
 187        assert(0);
 188        break;
 189    }
 190
 191    dw2 = 0;
 192
 193    if (ctx->Polygon.CullFlag) {
 194       switch (ctx->Polygon.CullFaceMode) {
 195       case GL_FRONT:
 196          dw2 |= GEN6_SF_CULL_FRONT;
 197          break;
 198       case GL_BACK:
 199          dw2 |= GEN6_SF_CULL_BACK;
 200          break;
 201       case GL_FRONT_AND_BACK:
 202          dw2 |= GEN6_SF_CULL_BOTH;
 203          break;
 204       default:
 205          assert(0);
 206          break;
 207       }
 208    } else {
 209       dw2 |= GEN6_SF_CULL_NONE;
 210    }
 211
 212    /* _NEW_SCISSOR */
 213    if (ctx->Scissor.Enabled)
 214       dw2 |= GEN6_SF_SCISSOR_ENABLE;
 215
 216    /* _NEW_LINE */
 217    dw2 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
 218       GEN6_SF_LINE_WIDTH_SHIFT;
 219    if (ctx->Line.SmoothFlag) {
 220       dw2 |= GEN6_SF_LINE_AA_ENABLE;
 221       dw2 |= GEN6_SF_LINE_AA_MODE_TRUE;
 222       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
 223    }
 224
 225    /* FINISHME: Last Pixel Enable?  Vertex Sub Pixel Precision Select?
 226     * FINISHME: AA Line Distance Mode?
 227     */
 228
 229    dw3 = 0;
 230
 231    /* _NEW_POINT */
 232    if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated))
 233       dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH;
 234
 235    /* Clamp to ARB_point_parameters user limits */
 236    point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize);
 237
 238    /* Clamp to the hardware limits and convert to fixed point */
 239    dw3 |= U_FIXED(CLAMP(point_size, 0.125, 255.875), 3);
 240
 241    /* _NEW_LIGHT */
 242    if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
 243       dw3 |=
 244          (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
 245          (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
 246          (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
 247    } else {
 248       dw3 |= (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
 249    }
 250
 251    BEGIN_BATCH(7);
 252    OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2));
 253    OUT_BATCH(dw1);
 254    OUT_BATCH(dw2);
 255    OUT_BATCH(dw3);
 256    OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant.  copied from gen4 */
 257    OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
 258    OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
 259    ADVANCE_BATCH();
 260 }
 261
 262 const struct brw_tracked_state gen7_sf_state = {
 263    .dirty = {
 264       .mesa  = (_NEW_LIGHT |
 265                 _NEW_POLYGON |
 266                 _NEW_LINE |
 267                 _NEW_SCISSOR |
 268                 _NEW_BUFFERS |
 269                 _NEW_POINT),
 270       .brw   = (BRW_NEW_CONTEXT),
 271       .cache = CACHE_NEW_VS_PROG
 272    },
 273    .emit = upload_sf_state,
 274 };