Merge branch 'xa_branch'
[mesa.git] / src / mesa / drivers / dri / intel / intel_batchbuffer.h
1 #ifndef INTEL_BATCHBUFFER_H
2 #define INTEL_BATCHBUFFER_H
3
4 #include "main/mtypes.h"
5
6 #include "intel_context.h"
7 #include "intel_bufmgr.h"
8 #include "intel_reg.h"
9
10 #define BATCH_RESERVED 16
11
12 void intel_batchbuffer_init(struct intel_context *intel);
13 void intel_batchbuffer_reset(struct intel_context *intel);
14 void intel_batchbuffer_free(struct intel_context *intel);
15
16 void _intel_batchbuffer_flush(struct intel_context *intel,
17 const char *file, int line);
18
19 #define intel_batchbuffer_flush(intel) \
20 _intel_batchbuffer_flush(intel, __FILE__, __LINE__)
21
22
23
24 /* Unlike bmBufferData, this currently requires the buffer be mapped.
25 * Consider it a convenience function wrapping multple
26 * intel_buffer_dword() calls.
27 */
28 void intel_batchbuffer_data(struct intel_context *intel,
29 const void *data, GLuint bytes, bool is_blit);
30
31 GLboolean intel_batchbuffer_emit_reloc(struct intel_context *intel,
32 drm_intel_bo *buffer,
33 uint32_t read_domains,
34 uint32_t write_domain,
35 uint32_t offset);
36 GLboolean intel_batchbuffer_emit_reloc_fenced(struct intel_context *intel,
37 drm_intel_bo *buffer,
38 uint32_t read_domains,
39 uint32_t write_domain,
40 uint32_t offset);
41 void intel_batchbuffer_emit_mi_flush(struct intel_context *intel);
42 void intel_emit_post_sync_nonzero_flush(struct intel_context *intel);
43
44 static INLINE uint32_t float_as_int(float f)
45 {
46 union {
47 float f;
48 uint32_t d;
49 } fi;
50
51 fi.f = f;
52 return fi.d;
53 }
54
55 /* Inline functions - might actually be better off with these
56 * non-inlined. Certainly better off switching all command packets to
57 * be passed as structs rather than dwords, but that's a little bit of
58 * work...
59 */
60 static INLINE GLint
61 intel_batchbuffer_space(struct intel_context *intel)
62 {
63 return (intel->batch.state_batch_offset - intel->batch.reserved_space) - intel->batch.used*4;
64 }
65
66
67 static INLINE void
68 intel_batchbuffer_emit_dword(struct intel_context *intel, GLuint dword)
69 {
70 #ifdef DEBUG
71 assert(intel_batchbuffer_space(intel) >= 4);
72 #endif
73 intel->batch.map[intel->batch.used++] = dword;
74 }
75
76 static INLINE void
77 intel_batchbuffer_emit_float(struct intel_context *intel, float f)
78 {
79 intel_batchbuffer_emit_dword(intel, float_as_int(f));
80 }
81
82 static INLINE void
83 intel_batchbuffer_require_space(struct intel_context *intel,
84 GLuint sz, int is_blit)
85 {
86
87 if (intel->gen >= 6 &&
88 intel->batch.is_blit != is_blit && intel->batch.used) {
89 intel_batchbuffer_flush(intel);
90 }
91
92 intel->batch.is_blit = is_blit;
93
94 #ifdef DEBUG
95 assert(sz < sizeof(intel->batch.map) - BATCH_RESERVED);
96 #endif
97 if (intel_batchbuffer_space(intel) < sz)
98 intel_batchbuffer_flush(intel);
99 }
100
101 static INLINE void
102 intel_batchbuffer_begin(struct intel_context *intel, int n, bool is_blit)
103 {
104 intel_batchbuffer_require_space(intel, n * 4, is_blit);
105
106 intel->batch.emit = intel->batch.used;
107 #ifdef DEBUG
108 intel->batch.total = n;
109 #endif
110 }
111
112 static INLINE void
113 intel_batchbuffer_advance(struct intel_context *intel)
114 {
115 #ifdef DEBUG
116 struct intel_batchbuffer *batch = &intel->batch;
117 unsigned int _n = batch->used - batch->emit;
118 assert(batch->total != 0);
119 if (_n != batch->total) {
120 fprintf(stderr, "ADVANCE_BATCH: %d of %d dwords emitted\n",
121 _n, batch->total);
122 abort();
123 }
124 batch->total = 0;
125 #endif
126 }
127
128 void intel_batchbuffer_cached_advance(struct intel_context *intel);
129
130 /* Here are the crusty old macros, to be removed:
131 */
132 #define BATCH_LOCALS
133
134 #define BEGIN_BATCH(n) intel_batchbuffer_begin(intel, n, false)
135 #define BEGIN_BATCH_BLT(n) intel_batchbuffer_begin(intel, n, true)
136 #define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel, d)
137 #define OUT_BATCH_F(f) intel_batchbuffer_emit_float(intel,f)
138 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
139 intel_batchbuffer_emit_reloc(intel, buf, \
140 read_domains, write_domain, delta); \
141 } while (0)
142 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
143 intel_batchbuffer_emit_reloc_fenced(intel, buf, \
144 read_domains, write_domain, delta); \
145 } while (0)
146
147 #define ADVANCE_BATCH() intel_batchbuffer_advance(intel);
148 #define CACHED_BATCH() intel_batchbuffer_cached_advance(intel);
149
150 #endif