src/mesa/drivers/dri/intel/intel_clear.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * Copyright 2009 Intel Corporation.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #include "main/glheader.h"
  30 #include "main/mtypes.h"
  31 #include "swrast/swrast.h"
  32 #include "drivers/common/meta.h"
  33
  34 #include "intel_context.h"
  35 #include "intel_blit.h"
  36 #include "intel_clear.h"
  37 #include "intel_fbo.h"
  38 #include "intel_regions.h"
  39
  40 #define FILE_DEBUG_FLAG DEBUG_BLIT
  41
  42 static const char *buffer_names[] = {
  43    [BUFFER_FRONT_LEFT] = "front",
  44    [BUFFER_BACK_LEFT] = "back",
  45    [BUFFER_FRONT_RIGHT] = "front right",
  46    [BUFFER_BACK_RIGHT] = "back right",
  47    [BUFFER_DEPTH] = "depth",
  48    [BUFFER_STENCIL] = "stencil",
  49    [BUFFER_ACCUM] = "accum",
  50    [BUFFER_AUX0] = "aux0",
  51    [BUFFER_COLOR0] = "color0",
  52    [BUFFER_COLOR1] = "color1",
  53    [BUFFER_COLOR2] = "color2",
  54    [BUFFER_COLOR3] = "color3",
  55    [BUFFER_COLOR4] = "color4",
  56    [BUFFER_COLOR5] = "color5",
  57    [BUFFER_COLOR6] = "color6",
  58    [BUFFER_COLOR7] = "color7",
  59 };
  60
  61 static void
  62 debug_mask(const char *name, GLbitfield mask)
  63 {
  64    GLuint i;
  65
  66    if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) {
  67       DBG("%s clear:", name);
  68       for (i = 0; i < BUFFER_COUNT; i++) {
  69          if (mask & (1 << i))
  70             DBG(" %s", buffer_names[i]);
  71       }
  72       DBG("\n");
  73    }
  74 }
  75
  76 /**
  77  * Called by ctx->Driver.Clear.
  78  */
  79 static void
  80 intelClear(struct gl_context *ctx, GLbitfield mask)
  81 {
  82    struct intel_context *intel = intel_context(ctx);
  83    const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]);
  84    GLbitfield tri_mask = 0;
  85    GLbitfield blit_mask = 0;
  86    GLbitfield swrast_mask = 0;
  87    struct gl_framebuffer *fb = ctx->DrawBuffer;
  88
  89    if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
  90       intel->front_buffer_dirty = GL_TRUE;
  91    }
  92
  93    if (0)
  94       fprintf(stderr, "%s\n", __FUNCTION__);
  95
  96    /* HW color buffers (front, back, aux, generic FBO, etc) */
  97    if (colorMask == ~0) {
  98       /* clear all R,G,B,A */
  99       /* XXX FBO: need to check if colorbuffers are software RBOs! */
 100       blit_mask |= (mask & BUFFER_BITS_COLOR);
 101    }
 102    else {
 103       /* glColorMask in effect */
 104       tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
 105    }
 106
 107    /* Make sure we have up to date buffers before we start looking at
 108     * the tiling bits to determine how to clear. */
 109    intel_prepare_render(intel);
 110
 111    /* HW stencil */
 112    if (mask & BUFFER_BIT_STENCIL) {
 113       const struct intel_region *stencilRegion
 114          = intel_get_rb_region(fb, BUFFER_STENCIL);
 115       if (stencilRegion) {
 116          /* have hw stencil */
 117          if (stencilRegion->tiling == I915_TILING_Y ||
 118              (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
 119             /* We have to use the 3D engine if we're clearing a partial mask
 120              * of the stencil buffer, or if we're on a 965 which has a tiled
 121              * depth/stencil buffer in a layout we can't blit to.
 122              */
 123             tri_mask |= BUFFER_BIT_STENCIL;
 124          }
 125          else {
 126             /* clearing all stencil bits, use blitting */
 127             blit_mask |= BUFFER_BIT_STENCIL;
 128          }
 129       }
 130    }
 131
 132    /* HW depth */
 133    if (mask & BUFFER_BIT_DEPTH) {
 134       const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH);
 135
 136       /* clear depth with whatever method is used for stencil (see above) */
 137       if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL)
 138          tri_mask |= BUFFER_BIT_DEPTH;
 139       else
 140          blit_mask |= BUFFER_BIT_DEPTH;
 141    }
 142
 143    /* If we're doing a tri pass for depth/stencil, include a likely color
 144     * buffer with it.
 145     */
 146    if (mask & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) {
 147       int color_bit = _mesa_ffs(mask & BUFFER_BITS_COLOR);
 148       if (color_bit != 0) {
 149          tri_mask |= blit_mask & (1 << (color_bit - 1));
 150          blit_mask &= ~(1 << (color_bit - 1));
 151       }
 152    }
 153
 154    if (intel->gen >= 6) {
 155       /* Blits are in a different ringbuffer so we don't use them. */
 156       tri_mask |= blit_mask;
 157       blit_mask = 0;
 158    }
 159
 160    /* SW fallback clearing */
 161    swrast_mask = mask & ~tri_mask & ~blit_mask;
 162
 163    {
 164       /* look for non-Intel renderbuffers (clear them with swrast) */
 165       GLbitfield blit_or_tri = blit_mask | tri_mask;
 166       while (blit_or_tri) {
 167          GLuint i = _mesa_ffs(blit_or_tri) - 1;
 168          GLbitfield bufBit = 1 << i;
 169          if (!fb->Attachment[i].Renderbuffer->ClassID) {
 170             blit_mask &= ~bufBit;
 171             tri_mask &= ~bufBit;
 172             swrast_mask |= bufBit;
 173          }
 174          blit_or_tri ^= bufBit;
 175       }
 176    }
 177
 178    if (blit_mask) {
 179       debug_mask("blit", blit_mask);
 180       intelClearWithBlit(ctx, blit_mask);
 181    }
 182
 183    if (tri_mask) {
 184       debug_mask("tri", tri_mask);
 185       _mesa_meta_Clear(&intel->ctx, tri_mask);
 186    }
 187
 188    if (swrast_mask) {
 189       debug_mask("swrast", swrast_mask);
 190       _swrast_Clear(ctx, swrast_mask);
 191    }
 192 }
 193
 194
 195 void
 196 intelInitClearFuncs(struct dd_function_table *functions)
 197 {
 198    functions->Clear = intelClear;
 199 }