src/mesa/drivers/dri/intel/intel_context.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef INTELCONTEXT_INC
  29 #define INTELCONTEXT_INC
  30
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/mm.h"
  35 #include "texmem.h"
  36 #include "dri_metaops.h"
  37 #include "drm.h"
  38 #include "intel_bufmgr.h"
  39
  40 #include "intel_screen.h"
  41 #include "intel_tex_obj.h"
  42 #include "i915_drm.h"
  43 #include "tnl/t_vertex.h"
  44
  45 #define TAG(x) intel##x
  46 #include "tnl_dd/t_dd_vertex.h"
  47 #undef TAG
  48
  49 #define DV_PF_555  (1<<8)
  50 #define DV_PF_565  (2<<8)
  51 #define DV_PF_8888 (3<<8)
  52 #define DV_PF_4444 (8<<8)
  53 #define DV_PF_1555 (9<<8)
  54
  55 struct intel_region;
  56 struct intel_context;
  57
  58 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
  59                                 intelVertex *, intelVertex *);
  60 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
  61                                  intelVertex *);
  62 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
  63
  64 /**
  65  * Bits for intel->Fallback field
  66  */
  67 /*@{*/
  68 #define INTEL_FALLBACK_DRAW_BUFFER       0x1
  69 #define INTEL_FALLBACK_READ_BUFFER       0x2
  70 #define INTEL_FALLBACK_DEPTH_BUFFER      0x4
  71 #define INTEL_FALLBACK_STENCIL_BUFFER    0x8
  72 #define INTEL_FALLBACK_USER              0x10
  73 #define INTEL_FALLBACK_RENDERMODE        0x20
  74 #define INTEL_FALLBACK_TEXTURE           0x40
  75 #define INTEL_FALLBACK_DRIVER            0x1000  /**< first for drivers */
  76 /*@}*/
  77
  78 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
  79                           GLboolean mode);
  80 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
  81
  82
  83 #define INTEL_WRITE_PART  0x1
  84 #define INTEL_WRITE_FULL  0x2
  85 #define INTEL_READ        0x4
  86
  87 #define INTEL_MAX_FIXUP 64
  88
  89 struct intel_sync_object {
  90    struct gl_sync_object Base;
  91
  92    /** Batch associated with this sync object */
  93    drm_intel_bo *bo;
  94 };
  95
  96 /**
  97  * intel_context is derived from Mesa's context class: GLcontext.
  98  */
  99 struct intel_context
 100 {
 101    GLcontext ctx;  /**< base class, must be first field */
 102
 103    struct
 104    {
 105       void (*destroy) (struct intel_context * intel);
 106       void (*emit_state) (struct intel_context * intel);
 107       void (*finish_batch) (struct intel_context * intel);
 108       void (*new_batch) (struct intel_context * intel);
 109       void (*emit_invarient_state) (struct intel_context * intel);
 110       void (*note_fence) (struct intel_context *intel, GLuint fence);
 111       void (*update_texture_state) (struct intel_context * intel);
 112
 113       void (*render_start) (struct intel_context * intel);
 114       void (*render_prevalidate) (struct intel_context * intel);
 115       void (*set_draw_region) (struct intel_context * intel,
 116                                struct intel_region * draw_regions[],
 117                                struct intel_region * depth_region,
 118                                GLuint num_regions);
 119
 120       void (*reduced_primitive_state) (struct intel_context * intel,
 121                                        GLenum rprim);
 122
 123       GLboolean (*check_vertex_size) (struct intel_context * intel,
 124                                       GLuint expected);
 125       void (*invalidate_state) (struct intel_context *intel,
 126                                 GLuint new_state);
 127
 128
 129       /* Metaops:
 130        */
 131       void (*install_meta_state) (struct intel_context * intel);
 132       void (*leave_meta_state) (struct intel_context * intel);
 133
 134       void (*meta_draw_region) (struct intel_context * intel,
 135                                 struct intel_region * draw_region,
 136                                 struct intel_region * depth_region);
 137
 138       void (*meta_color_mask) (struct intel_context * intel, GLboolean);
 139
 140       void (*meta_stencil_replace) (struct intel_context * intel,
 141                                     GLuint mask, GLuint clear);
 142
 143       void (*meta_depth_replace) (struct intel_context * intel);
 144
 145       void (*meta_texture_blend_replace) (struct intel_context * intel);
 146
 147       void (*meta_no_stencil_write) (struct intel_context * intel);
 148       void (*meta_no_depth_write) (struct intel_context * intel);
 149       void (*meta_no_texture) (struct intel_context * intel);
 150
 151       void (*meta_import_pixel_state) (struct intel_context * intel);
 152       void (*meta_frame_buffer_texture) (struct intel_context *intel,
 153                                          GLint xoff, GLint yoff);
 154
 155       GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
 156                                         dri_bo * buffer,
 157                                         GLuint offset,
 158                                         GLuint pitch,
 159                                         GLuint height,
 160                                         GLenum format, GLenum type);
 161
 162       void (*assert_not_dirty) (struct intel_context *intel);
 163
 164       void (*debug_batch)(struct intel_context *intel);
 165    } vtbl;
 166
 167    struct dri_metaops meta;
 168
 169    GLbitfield Fallback;  /**< mask of INTEL_FALLBACK_x bits */
 170    GLuint NewGLState;
 171
 172    dri_bufmgr *bufmgr;
 173    unsigned int maxBatchSize;
 174
 175    /**
 176     * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
 177     */
 178    int gen;
 179    GLboolean needs_ff_sync;
 180    GLboolean is_ironlake;
 181    GLboolean is_g4x;
 182    GLboolean is_945;
 183    GLboolean has_luminance_srgb;
 184
 185    int urb_size;
 186
 187    struct intel_region *front_region;
 188    struct intel_region *back_region;
 189    struct intel_region *depth_region;
 190
 191    struct intel_batchbuffer *batch;
 192    drm_intel_bo *first_post_swapbuffers_batch;
 193    GLboolean no_batch_wrap;
 194
 195    struct
 196    {
 197       GLuint id;
 198       uint32_t primitive;       /**< Current hardware primitive type */
 199       void (*flush) (struct intel_context *);
 200       GLubyte *start_ptr; /**< for i8xx */
 201       dri_bo *vb_bo;
 202       uint8_t *vb;
 203       unsigned int start_offset; /**< Byte offset of primitive sequence */
 204       unsigned int current_offset; /**< Byte offset of next vertex */
 205       unsigned int count;       /**< Number of vertices in current primitive */
 206    } prim;
 207
 208    GLuint stats_wm;
 209    GLboolean locked;
 210    char *prevLockFile;
 211    int prevLockLine;
 212
 213    /* Offsets of fields within the current vertex:
 214     */
 215    GLuint coloroffset;
 216    GLuint specoffset;
 217    GLuint wpos_offset;
 218    GLuint wpos_size;
 219
 220    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 221    GLuint vertex_attr_count;
 222
 223    GLfloat polygon_offset_scale;        /* dependent on depth_scale, bpp */
 224
 225    GLboolean hw_stencil;
 226    GLboolean hw_stipple;
 227    GLboolean depth_buffer_is_float;
 228    GLboolean no_rast;
 229    GLboolean no_hw;
 230    GLboolean always_flush_batch;
 231    GLboolean always_flush_cache;
 232
 233    /* 0 - nonconformant, best performance;
 234     * 1 - fallback to sw for known conformance bugs
 235     * 2 - always fallback to sw
 236     */
 237    GLuint conformance_mode;
 238
 239    /* State for intelvb.c and inteltris.c.
 240     */
 241    GLuint RenderIndex;
 242    GLmatrix ViewportMatrix;
 243    GLenum render_primitive;
 244    GLenum reduced_primitive;
 245    GLuint vertex_size;
 246    GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
 247
 248    /* Fallback rasterization functions
 249     */
 250    intel_point_func draw_point;
 251    intel_line_func draw_line;
 252    intel_tri_func draw_tri;
 253
 254    /**
 255     * Set to true if a single constant cliprect should be used in the
 256     * batchbuffer.  Otherwise, cliprects must be calculated at batchbuffer
 257     * flush time while the lock is held.
 258     */
 259    GLboolean constant_cliprect;
 260
 261    /**
 262     * In !constant_cliprect mode, set to true if the front cliprects should be
 263     * used instead of back.
 264     */
 265    GLboolean front_cliprects;
 266
 267    /**
 268     * Set if rendering has occured to the drawable's front buffer.
 269     *
 270     * This is used in the DRI2 case to detect that glFlush should also copy
 271     * the contents of the fake front buffer to the real front buffer.
 272     */
 273    GLboolean front_buffer_dirty;
 274
 275    /**
 276     * Track whether front-buffer rendering is currently enabled
 277     *
 278     * A separate flag is used to track this in order to support MRT more
 279     * easily.
 280     */
 281    GLboolean is_front_buffer_rendering;
 282    /**
 283     * Track whether front-buffer is the current read target.
 284     *
 285     * This is closely associated with is_front_buffer_rendering, but may
 286     * be set separately.  The DRI2 fake front buffer must be referenced
 287     * either way.
 288     */
 289    GLboolean is_front_buffer_reading;
 290
 291    GLboolean use_texture_tiling;
 292    GLboolean use_early_z;
 293    drm_clip_rect_t fboRect;     /**< cliprect for FBO rendering */
 294
 295    drm_clip_rect_t draw_rect;
 296    drm_clip_rect_t scissor_rect;
 297
 298    drm_context_t hHWContext;
 299    drmLock *driHwLock;
 300    int driFd;
 301
 302    __DRIcontextPrivate *driContext;
 303    __DRIdrawablePrivate *driDrawable;
 304    __DRIdrawablePrivate *driReadDrawable;
 305    __DRIscreenPrivate *driScreen;
 306    intelScreenPrivate *intelScreen;
 307    volatile drm_i915_sarea_t *sarea;
 308
 309    GLuint lastStamp;
 310
 311    /**
 312     * Configuration cache
 313     */
 314    driOptionCache optionCache;
 315
 316    int64_t swap_ust;
 317    int64_t swap_missed_ust;
 318
 319    GLuint swap_count;
 320    GLuint swap_missed_count;
 321 };
 322
 323 /* These are functions now:
 324  */
 325 void LOCK_HARDWARE( struct intel_context *intel );
 326 void UNLOCK_HARDWARE( struct intel_context *intel );
 327
 328 extern char *__progname;
 329
 330
 331 #define SUBPIXEL_X 0.125
 332 #define SUBPIXEL_Y 0.125
 333
 334 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 335 #define ALIGN(value, alignment)  ((value + alignment - 1) & ~(alignment - 1))
 336 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
 337
 338 static INLINE uint32_t
 339 U_FIXED(float value, uint32_t frac_bits)
 340 {
 341    value *= (1 << frac_bits);
 342    return value < 0 ? 0 : value;
 343 }
 344
 345 static INLINE uint32_t
 346 S_FIXED(float value, uint32_t frac_bits)
 347 {
 348    return value * (1 << frac_bits);
 349 }
 350
 351 #define INTEL_FIREVERTICES(intel)               \
 352 do {                                            \
 353    if ((intel)->prim.flush)                     \
 354       (intel)->prim.flush(intel);               \
 355 } while (0)
 356
 357 /* ================================================================
 358  * From linux kernel i386 header files, copes with odd sizes better
 359  * than COPY_DWORDS would:
 360  * XXX Put this in src/mesa/main/imports.h ???
 361  */
 362 #if defined(i386) || defined(__i386__)
 363 static INLINE void * __memcpy(void * to, const void * from, size_t n)
 364 {
 365    int d0, d1, d2;
 366    __asm__ __volatile__(
 367       "rep ; movsl\n\t"
 368       "testb $2,%b4\n\t"
 369       "je 1f\n\t"
 370       "movsw\n"
 371       "1:\ttestb $1,%b4\n\t"
 372       "je 2f\n\t"
 373       "movsb\n"
 374       "2:"
 375       : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 376       :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
 377       : "memory");
 378    return (to);
 379 }
 380 #else
 381 #define __memcpy(a,b,c) memcpy(a,b,c)
 382 #endif
 383
 384
 385 /* ================================================================
 386  * Debugging:
 387  */
 388 extern int INTEL_DEBUG;
 389
 390 #define DEBUG_TEXTURE   0x1
 391 #define DEBUG_STATE     0x2
 392 #define DEBUG_IOCTL     0x4
 393 #define DEBUG_BLIT      0x8
 394 #define DEBUG_MIPTREE   0x10
 395 #define DEBUG_FALLBACKS 0x20
 396 #define DEBUG_VERBOSE   0x40
 397 #define DEBUG_BATCH     0x80
 398 #define DEBUG_PIXEL     0x100
 399 #define DEBUG_BUFMGR    0x200
 400 #define DEBUG_REGION    0x400
 401 #define DEBUG_FBO       0x800
 402 #define DEBUG_LOCK      0x1000
 403 #define DEBUG_SYNC      0x2000
 404 #define DEBUG_PRIMS     0x4000
 405 #define DEBUG_VERTS     0x8000
 406 #define DEBUG_DRI       0x10000
 407 #define DEBUG_DMA       0x20000
 408 #define DEBUG_SANITY    0x40000
 409 #define DEBUG_SLEEP     0x80000
 410 #define DEBUG_STATS     0x100000
 411 #define DEBUG_TILE      0x200000
 412 #define DEBUG_SINGLE_THREAD   0x400000
 413 #define DEBUG_WM        0x800000
 414 #define DEBUG_URB       0x1000000
 415 #define DEBUG_VS        0x2000000
 416
 417 #define DBG(...) do {                                           \
 418         if (INTEL_DEBUG & FILE_DEBUG_FLAG)                      \
 419                 _mesa_printf(__VA_ARGS__);                      \
 420 } while(0)
 421
 422 #define PCI_CHIP_845_G                  0x2562
 423 #define PCI_CHIP_I830_M                 0x3577
 424 #define PCI_CHIP_I855_GM                0x3582
 425 #define PCI_CHIP_I865_G                 0x2572
 426 #define PCI_CHIP_I915_G                 0x2582
 427 #define PCI_CHIP_I915_GM                0x2592
 428 #define PCI_CHIP_I945_G                 0x2772
 429 #define PCI_CHIP_I945_GM                0x27A2
 430 #define PCI_CHIP_I945_GME               0x27AE
 431 #define PCI_CHIP_G33_G                  0x29C2
 432 #define PCI_CHIP_Q35_G                  0x29B2
 433 #define PCI_CHIP_Q33_G                  0x29D2
 434
 435
 436 /* ================================================================
 437  * intel_context.c:
 438  */
 439
 440 extern GLboolean intelInitContext(struct intel_context *intel,
 441                                   const __GLcontextModes * mesaVis,
 442                                   __DRIcontextPrivate * driContextPriv,
 443                                   void *sharedContextPrivate,
 444                                   struct dd_function_table *functions);
 445
 446 extern void intelGetLock(struct intel_context *intel, GLuint flags);
 447
 448 extern void intelFinish(GLcontext * ctx);
 449 extern void intelFlush(GLcontext * ctx);
 450
 451 extern void intelInitDriverFunctions(struct dd_function_table *functions);
 452
 453 void intel_init_syncobj_functions(struct dd_function_table *functions);
 454
 455
 456 /* ================================================================
 457  * intel_state.c:
 458  */
 459 extern void intelInitStateFuncs(struct dd_function_table *functions);
 460
 461 #define COMPAREFUNC_ALWAYS              0
 462 #define COMPAREFUNC_NEVER               0x1
 463 #define COMPAREFUNC_LESS                0x2
 464 #define COMPAREFUNC_EQUAL               0x3
 465 #define COMPAREFUNC_LEQUAL              0x4
 466 #define COMPAREFUNC_GREATER             0x5
 467 #define COMPAREFUNC_NOTEQUAL            0x6
 468 #define COMPAREFUNC_GEQUAL              0x7
 469
 470 #define STENCILOP_KEEP                  0
 471 #define STENCILOP_ZERO                  0x1
 472 #define STENCILOP_REPLACE               0x2
 473 #define STENCILOP_INCRSAT               0x3
 474 #define STENCILOP_DECRSAT               0x4
 475 #define STENCILOP_INCR                  0x5
 476 #define STENCILOP_DECR                  0x6
 477 #define STENCILOP_INVERT                0x7
 478
 479 #define LOGICOP_CLEAR                   0
 480 #define LOGICOP_NOR                     0x1
 481 #define LOGICOP_AND_INV                 0x2
 482 #define LOGICOP_COPY_INV                0x3
 483 #define LOGICOP_AND_RVRSE               0x4
 484 #define LOGICOP_INV                     0x5
 485 #define LOGICOP_XOR                     0x6
 486 #define LOGICOP_NAND                    0x7
 487 #define LOGICOP_AND                     0x8
 488 #define LOGICOP_EQUIV                   0x9
 489 #define LOGICOP_NOOP                    0xa
 490 #define LOGICOP_OR_INV                  0xb
 491 #define LOGICOP_COPY                    0xc
 492 #define LOGICOP_OR_RVRSE                0xd
 493 #define LOGICOP_OR                      0xe
 494 #define LOGICOP_SET                     0xf
 495
 496 #define BLENDFACT_ZERO                  0x01
 497 #define BLENDFACT_ONE                   0x02
 498 #define BLENDFACT_SRC_COLR              0x03
 499 #define BLENDFACT_INV_SRC_COLR          0x04
 500 #define BLENDFACT_SRC_ALPHA             0x05
 501 #define BLENDFACT_INV_SRC_ALPHA         0x06
 502 #define BLENDFACT_DST_ALPHA             0x07
 503 #define BLENDFACT_INV_DST_ALPHA         0x08
 504 #define BLENDFACT_DST_COLR              0x09
 505 #define BLENDFACT_INV_DST_COLR          0x0a
 506 #define BLENDFACT_SRC_ALPHA_SATURATE    0x0b
 507 #define BLENDFACT_CONST_COLOR           0x0c
 508 #define BLENDFACT_INV_CONST_COLOR       0x0d
 509 #define BLENDFACT_CONST_ALPHA           0x0e
 510 #define BLENDFACT_INV_CONST_ALPHA       0x0f
 511 #define BLENDFACT_MASK                  0x0f
 512
 513 enum {
 514    DRI_CONF_BO_REUSE_DISABLED,
 515    DRI_CONF_BO_REUSE_ALL
 516 };
 517
 518 extern int intel_translate_shadow_compare_func(GLenum func);
 519 extern int intel_translate_compare_func(GLenum func);
 520 extern int intel_translate_stencil_op(GLenum op);
 521 extern int intel_translate_blend_factor(GLenum factor);
 522 extern int intel_translate_logic_op(GLenum opcode);
 523
 524 void intel_viewport(GLcontext * ctx, GLint x, GLint y,
 525                     GLsizei width, GLsizei height);
 526
 527 void intel_update_renderbuffers(__DRIcontext *context,
 528                                 __DRIdrawable *drawable);
 529
 530 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
 531                                   uint32_t buffer_id);
 532
 533 /*======================================================================
 534  * Inline conversion functions.
 535  * These are better-typed than the macros used previously:
 536  */
 537 static INLINE struct intel_context *
 538 intel_context(GLcontext * ctx)
 539 {
 540    return (struct intel_context *) ctx;
 541 }
 542
 543 static INLINE GLboolean
 544 is_power_of_two(uint32_t value)
 545 {
 546    return (value & (value - 1)) == 0;
 547 }
 548
 549 static INLINE void
 550 intel_bo_map_gtt_preferred(struct intel_context *intel,
 551                            drm_intel_bo *bo,
 552                            GLboolean write)
 553 {
 554    if (intel->intelScreen->kernel_exec_fencing)
 555       drm_intel_gem_bo_map_gtt(bo);
 556    else
 557       drm_intel_bo_map(bo, write);
 558 }
 559
 560 static INLINE void
 561 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
 562                              drm_intel_bo *bo)
 563 {
 564    if (intel->intelScreen->kernel_exec_fencing)
 565       drm_intel_gem_bo_unmap_gtt(bo);
 566    else
 567       drm_intel_bo_unmap(bo);
 568 }
 569
 570 #endif