Merge branch 'gallium-polygon-stipple'
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intel_flush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->pbo)
119 intel_region_cow(intel, region);
120
121 if (region->tiling != I915_TILING_NONE)
122 drm_intel_gem_bo_map_gtt(region->buffer);
123 else
124 drm_intel_bo_map(region->buffer, GL_TRUE);
125 region->map = region->buffer->virtual;
126 }
127
128 return region->map;
129 }
130
131 void
132 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
133 {
134 _DBG("%s %p\n", __FUNCTION__, region);
135 if (!--region->map_refcount) {
136 if (region->tiling != I915_TILING_NONE)
137 drm_intel_gem_bo_unmap_gtt(region->buffer);
138 else
139 drm_intel_bo_unmap(region->buffer);
140 region->map = NULL;
141 }
142 }
143
144 static struct intel_region *
145 intel_region_alloc_internal(struct intel_screen *screen,
146 GLuint cpp,
147 GLuint width, GLuint height, GLuint pitch,
148 uint32_t tiling, drm_intel_bo *buffer)
149 {
150 struct intel_region *region;
151
152 region = calloc(sizeof(*region), 1);
153 if (region == NULL)
154 return region;
155
156 region->cpp = cpp;
157 region->width = width;
158 region->height = height;
159 region->pitch = pitch;
160 region->refcount = 1;
161 region->buffer = buffer;
162 region->tiling = tiling;
163 region->screen = screen;
164
165 _DBG("%s <-- %p\n", __FUNCTION__, region);
166 return region;
167 }
168
169 struct intel_region *
170 intel_region_alloc(struct intel_screen *screen,
171 uint32_t tiling,
172 GLuint cpp, GLuint width, GLuint height,
173 GLboolean expect_accelerated_upload)
174 {
175 drm_intel_bo *buffer;
176 unsigned long flags = 0;
177 unsigned long aligned_pitch;
178 struct intel_region *region;
179
180 if (expect_accelerated_upload)
181 flags |= BO_ALLOC_FOR_RENDER;
182
183 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "region",
184 width, height, cpp,
185 &tiling, &aligned_pitch, flags);
186 if (buffer == NULL)
187 return NULL;
188
189 region = intel_region_alloc_internal(screen, cpp, width, height,
190 aligned_pitch / cpp, tiling, buffer);
191 if (region == NULL) {
192 drm_intel_bo_unreference(buffer);
193 return NULL;
194 }
195
196 return region;
197 }
198
199 GLboolean
200 intel_region_flink(struct intel_region *region, uint32_t *name)
201 {
202 if (region->name == 0) {
203 if (drm_intel_bo_flink(region->buffer, &region->name))
204 return GL_FALSE;
205
206 _mesa_HashInsert(region->screen->named_regions,
207 region->name, region);
208 }
209
210 *name = region->name;
211
212 return GL_TRUE;
213 }
214
215 struct intel_region *
216 intel_region_alloc_for_handle(struct intel_screen *screen,
217 GLuint cpp,
218 GLuint width, GLuint height, GLuint pitch,
219 GLuint handle, const char *name)
220 {
221 struct intel_region *region, *dummy;
222 drm_intel_bo *buffer;
223 int ret;
224 uint32_t bit_6_swizzle, tiling;
225
226 region = _mesa_HashLookup(screen->named_regions, handle);
227 if (region != NULL) {
228 dummy = NULL;
229 if (region->width != width || region->height != height ||
230 region->cpp != cpp || region->pitch != pitch) {
231 fprintf(stderr,
232 "Region for name %d already exists but is not compatible\n",
233 handle);
234 return NULL;
235 }
236 intel_region_reference(&dummy, region);
237 return dummy;
238 }
239
240 buffer = intel_bo_gem_create_from_name(screen->bufmgr, name, handle);
241 if (buffer == NULL)
242 return NULL;
243 ret = drm_intel_bo_get_tiling(buffer, &tiling, &bit_6_swizzle);
244 if (ret != 0) {
245 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
246 handle, name, strerror(-ret));
247 drm_intel_bo_unreference(buffer);
248 return NULL;
249 }
250
251 region = intel_region_alloc_internal(screen, cpp,
252 width, height, pitch, tiling, buffer);
253 if (region == NULL) {
254 drm_intel_bo_unreference(buffer);
255 return NULL;
256 }
257
258 region->name = handle;
259 _mesa_HashInsert(screen->named_regions, handle, region);
260
261 return region;
262 }
263
264 void
265 intel_region_reference(struct intel_region **dst, struct intel_region *src)
266 {
267 _DBG("%s: %p(%d) -> %p(%d)\n", __FUNCTION__,
268 *dst, *dst ? (*dst)->refcount : 0, src, src ? src->refcount : 0);
269
270 if (src != *dst) {
271 if (*dst)
272 intel_region_release(dst);
273
274 if (src)
275 src->refcount++;
276 *dst = src;
277 }
278 }
279
280 void
281 intel_region_release(struct intel_region **region_handle)
282 {
283 struct intel_region *region = *region_handle;
284
285 if (region == NULL) {
286 _DBG("%s NULL\n", __FUNCTION__);
287 return;
288 }
289
290 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
291
292 ASSERT(region->refcount > 0);
293 region->refcount--;
294
295 if (region->refcount == 0) {
296 assert(region->map_refcount == 0);
297
298 if (region->pbo)
299 region->pbo->region = NULL;
300 region->pbo = NULL;
301 drm_intel_bo_unreference(region->buffer);
302
303 if (region->name > 0)
304 _mesa_HashRemove(region->screen->named_regions, region->name);
305
306 free(region);
307 }
308 *region_handle = NULL;
309 }
310
311 /*
312 * XXX Move this into core Mesa?
313 */
314 void
315 _mesa_copy_rect(GLubyte * dst,
316 GLuint cpp,
317 GLuint dst_pitch,
318 GLuint dst_x,
319 GLuint dst_y,
320 GLuint width,
321 GLuint height,
322 const GLubyte * src,
323 GLuint src_pitch, GLuint src_x, GLuint src_y)
324 {
325 GLuint i;
326
327 dst_pitch *= cpp;
328 src_pitch *= cpp;
329 dst += dst_x * cpp;
330 src += src_x * cpp;
331 dst += dst_y * dst_pitch;
332 src += src_y * src_pitch;
333 width *= cpp;
334
335 if (width == dst_pitch && width == src_pitch)
336 memcpy(dst, src, height * width);
337 else {
338 for (i = 0; i < height; i++) {
339 memcpy(dst, src, width);
340 dst += dst_pitch;
341 src += src_pitch;
342 }
343 }
344 }
345
346
347 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
348 *
349 * - memcpy by span to current destination
350 * - upload data as new buffer and blit
351 *
352 * Currently always memcpy.
353 */
354 void
355 intel_region_data(struct intel_context *intel,
356 struct intel_region *dst,
357 GLuint dst_offset,
358 GLuint dstx, GLuint dsty,
359 const void *src, GLuint src_pitch,
360 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
361 {
362 _DBG("%s\n", __FUNCTION__);
363
364 if (intel == NULL)
365 return;
366
367 if (dst->pbo) {
368 if (dstx == 0 &&
369 dsty == 0 && width == dst->pitch && height == dst->height)
370 intel_region_release_pbo(intel, dst);
371 else
372 intel_region_cow(intel, dst);
373 }
374
375 intel_prepare_render(intel);
376
377 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
378 dst->cpp,
379 dst->pitch,
380 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
381
382 intel_region_unmap(intel, dst);
383 }
384
385 /* Copy rectangular sub-regions. Need better logic about when to
386 * push buffers into AGP - will currently do so whenever possible.
387 */
388 GLboolean
389 intel_region_copy(struct intel_context *intel,
390 struct intel_region *dst,
391 GLuint dst_offset,
392 GLuint dstx, GLuint dsty,
393 struct intel_region *src,
394 GLuint src_offset,
395 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
396 GLboolean flip,
397 GLenum logicop)
398 {
399 uint32_t src_pitch = src->pitch;
400
401 _DBG("%s\n", __FUNCTION__);
402
403 if (intel == NULL)
404 return GL_FALSE;
405
406 if (dst->pbo) {
407 if (dstx == 0 &&
408 dsty == 0 && width == dst->pitch && height == dst->height)
409 intel_region_release_pbo(intel, dst);
410 else
411 intel_region_cow(intel, dst);
412 }
413
414 assert(src->cpp == dst->cpp);
415
416 if (flip)
417 src_pitch = -src_pitch;
418
419 return intelEmitCopyBlit(intel,
420 dst->cpp,
421 src_pitch, src->buffer, src_offset, src->tiling,
422 dst->pitch, dst->buffer, dst_offset, dst->tiling,
423 srcx, srcy, dstx, dsty, width, height,
424 logicop);
425 }
426
427 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
428 * the pbo's data.
429 */
430 void
431 intel_region_attach_pbo(struct intel_context *intel,
432 struct intel_region *region,
433 struct intel_buffer_object *pbo)
434 {
435 drm_intel_bo *buffer;
436
437 if (region->pbo == pbo)
438 return;
439
440 _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
441
442 /* If there is already a pbo attached, break the cow tie now.
443 * Don't call intel_region_release_pbo() as that would
444 * unnecessarily allocate a new buffer we would have to immediately
445 * discard.
446 */
447 if (region->pbo) {
448 region->pbo->region = NULL;
449 region->pbo = NULL;
450 }
451
452 if (region->buffer) {
453 drm_intel_bo_unreference(region->buffer);
454 region->buffer = NULL;
455 }
456
457 /* make sure pbo has a buffer of its own */
458 buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
459
460 region->pbo = pbo;
461 region->pbo->region = region;
462 drm_intel_bo_reference(buffer);
463 region->buffer = buffer;
464 region->tiling = I915_TILING_NONE;
465 }
466
467
468 /* Break the COW tie to the pbo and allocate a new buffer.
469 * The pbo gets to keep the data.
470 */
471 void
472 intel_region_release_pbo(struct intel_context *intel,
473 struct intel_region *region)
474 {
475 _DBG("%s %p\n", __FUNCTION__, region);
476 assert(region->buffer == region->pbo->buffer);
477 region->pbo->region = NULL;
478 region->pbo = NULL;
479 drm_intel_bo_unreference(region->buffer);
480 region->buffer = NULL;
481
482 region->buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
483 region->pitch * region->cpp *
484 region->height,
485 64);
486 }
487
488 /* Break the COW tie to the pbo. Both the pbo and the region end up
489 * with a copy of the data.
490 */
491 void
492 intel_region_cow(struct intel_context *intel, struct intel_region *region)
493 {
494 struct intel_buffer_object *pbo = region->pbo;
495 GLboolean ok;
496
497 intel_region_release_pbo(intel, region);
498
499 assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
500
501 _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, (int)pbo->Base.Size);
502
503 /* Now blit from the texture buffer to the new buffer:
504 */
505
506 intel_prepare_render(intel);
507 ok = intelEmitCopyBlit(intel,
508 region->cpp,
509 region->pitch, pbo->buffer, 0, region->tiling,
510 region->pitch, region->buffer, 0, region->tiling,
511 0, 0, 0, 0,
512 region->pitch, region->height,
513 GL_COPY);
514 assert(ok);
515 }
516
517 drm_intel_bo *
518 intel_region_buffer(struct intel_context *intel,
519 struct intel_region *region, GLuint flag)
520 {
521 if (region->pbo) {
522 if (flag == INTEL_WRITE_PART)
523 intel_region_cow(intel, region);
524 else if (flag == INTEL_WRITE_FULL)
525 intel_region_release_pbo(intel, region);
526 }
527
528 return region->buffer;
529 }