Merge branch '7.8'
[mesa.git] / src / mesa / drivers / dri / intel / intel_regions.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Provide additional functionality on top of bufmgr buffers:
29 * - 2d semantics and blit operations
30 * - refcounting of buffers for multiple images in a buffer.
31 * - refcounting of buffer mappings.
32 * - some logic for moving the buffers to the best memory pools for
33 * given operations.
34 *
35 * Most of this is to make it easier to implement the fixed-layout
36 * mipmap tree required by intel hardware in the face of GL's
37 * programming interface where each image can be specifed in random
38 * order and it isn't clear what layout the tree should have until the
39 * last moment.
40 */
41
42 #include <sys/ioctl.h>
43 #include <errno.h>
44
45 #include "main/hash.h"
46 #include "intel_context.h"
47 #include "intel_regions.h"
48 #include "intel_blit.h"
49 #include "intel_buffer_objects.h"
50 #include "intel_bufmgr.h"
51 #include "intel_batchbuffer.h"
52
53 #define FILE_DEBUG_FLAG DEBUG_REGION
54
55 /* This should be set to the maximum backtrace size desired.
56 * Set it to 0 to disable backtrace debugging.
57 */
58 #define DEBUG_BACKTRACE_SIZE 0
59
60 #if DEBUG_BACKTRACE_SIZE == 0
61 /* Use the standard debug output */
62 #define _DBG(...) DBG(__VA_ARGS__)
63 #else
64 /* Use backtracing debug output */
65 #define _DBG(...) {debug_backtrace(); DBG(__VA_ARGS__);}
66
67 /* Backtracing debug support */
68 #include <execinfo.h>
69
70 static void
71 debug_backtrace(void)
72 {
73 void *trace[DEBUG_BACKTRACE_SIZE];
74 char **strings = NULL;
75 int traceSize;
76 register int i;
77
78 traceSize = backtrace(trace, DEBUG_BACKTRACE_SIZE);
79 strings = backtrace_symbols(trace, traceSize);
80 if (strings == NULL) {
81 DBG("no backtrace:");
82 return;
83 }
84
85 /* Spit out all the strings with a colon separator. Ignore
86 * the first, since we don't really care about the call
87 * to debug_backtrace() itself. Skip until the final "/" in
88 * the trace to avoid really long lines.
89 */
90 for (i = 1; i < traceSize; i++) {
91 char *p = strings[i], *slash = strings[i];
92 while (*p) {
93 if (*p++ == '/') {
94 slash = p;
95 }
96 }
97
98 DBG("%s:", slash);
99 }
100
101 /* Free up the memory, and we're done */
102 free(strings);
103 }
104
105 #endif
106
107
108
109 /* XXX: Thread safety?
110 */
111 GLubyte *
112 intel_region_map(struct intel_context *intel, struct intel_region *region)
113 {
114 intelFlush(&intel->ctx);
115
116 _DBG("%s %p\n", __FUNCTION__, region);
117 if (!region->map_refcount++) {
118 if (region->pbo)
119 intel_region_cow(intel, region);
120
121 if (region->tiling != I915_TILING_NONE)
122 drm_intel_gem_bo_map_gtt(region->buffer);
123 else
124 dri_bo_map(region->buffer, GL_TRUE);
125 region->map = region->buffer->virtual;
126 }
127
128 return region->map;
129 }
130
131 void
132 intel_region_unmap(struct intel_context *intel, struct intel_region *region)
133 {
134 _DBG("%s %p\n", __FUNCTION__, region);
135 if (!--region->map_refcount) {
136 if (region->tiling != I915_TILING_NONE)
137 drm_intel_gem_bo_unmap_gtt(region->buffer);
138 else
139 dri_bo_unmap(region->buffer);
140 region->map = NULL;
141 }
142 }
143
144 static struct intel_region *
145 intel_region_alloc_internal(struct intel_context *intel,
146 GLuint cpp,
147 GLuint width, GLuint height, GLuint pitch,
148 dri_bo *buffer)
149 {
150 struct intel_region *region;
151
152 if (buffer == NULL) {
153 _DBG("%s <-- NULL\n", __FUNCTION__);
154 return NULL;
155 }
156
157 region = calloc(sizeof(*region), 1);
158 region->cpp = cpp;
159 region->width = width;
160 region->height = height;
161 region->pitch = pitch;
162 region->refcount = 1;
163 region->buffer = buffer;
164
165 /* Default to no tiling */
166 region->tiling = I915_TILING_NONE;
167 region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
168
169 _DBG("%s <-- %p\n", __FUNCTION__, region);
170 return region;
171 }
172
173 struct intel_region *
174 intel_region_alloc(struct intel_context *intel,
175 uint32_t tiling,
176 GLuint cpp, GLuint width, GLuint height, GLuint pitch,
177 GLboolean expect_accelerated_upload)
178 {
179 dri_bo *buffer;
180 struct intel_region *region;
181 unsigned long flags = 0;
182 unsigned long aligned_pitch;
183
184 if (expect_accelerated_upload)
185 flags |= BO_ALLOC_FOR_RENDER;
186
187 buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
188 width, height, cpp,
189 &tiling, &aligned_pitch, flags);
190 /* We've already chosen a pitch as part of miptree layout. It had
191 * better be the same.
192 */
193 assert(aligned_pitch == pitch * cpp);
194
195 region = intel_region_alloc_internal(intel, cpp, width, height,
196 pitch, buffer);
197
198 if (tiling != I915_TILING_NONE) {
199 assert(((pitch * cpp) & 127) == 0);
200 drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp);
201 drm_intel_bo_get_tiling(buffer, &region->tiling, &region->bit_6_swizzle);
202 }
203
204 return region;
205 }
206
207 struct intel_region *
208 intel_region_alloc_for_handle(struct intel_context *intel,
209 GLuint cpp,
210 GLuint width, GLuint height, GLuint pitch,
211 GLuint handle, const char *name)
212 {
213 struct intel_region *region, *dummy;
214 dri_bo *buffer;
215 int ret;
216
217 region = _mesa_HashLookup(intel->intelScreen->named_regions, handle);
218 if (region != NULL) {
219 dummy = NULL;
220 if (region->width != width || region->height != height ||
221 region->cpp != cpp || region->pitch != pitch) {
222 fprintf(stderr,
223 "Region for name %d already exists but is not compatible\n",
224 handle);
225 return NULL;
226 }
227 intel_region_reference(&dummy, region);
228 return dummy;
229 }
230
231 buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
232
233 region = intel_region_alloc_internal(intel, cpp,
234 width, height, pitch, buffer);
235 if (region == NULL)
236 return region;
237
238 ret = dri_bo_get_tiling(region->buffer, &region->tiling,
239 &region->bit_6_swizzle);
240 if (ret != 0) {
241 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
242 handle, name, strerror(-ret));
243 intel_region_release(&region);
244 return NULL;
245 }
246
247 region->name = handle;
248 region->screen = intel->intelScreen;
249 _mesa_HashInsert(intel->intelScreen->named_regions, handle, region);
250
251 return region;
252 }
253
254 void
255 intel_region_reference(struct intel_region **dst, struct intel_region *src)
256 {
257 if (src)
258 _DBG("%s %p %d\n", __FUNCTION__, src, src->refcount);
259
260 assert(*dst == NULL);
261 if (src) {
262 src->refcount++;
263 *dst = src;
264 }
265 }
266
267 void
268 intel_region_release(struct intel_region **region_handle)
269 {
270 struct intel_region *region = *region_handle;
271
272 if (region == NULL) {
273 _DBG("%s NULL\n", __FUNCTION__);
274 return;
275 }
276
277 _DBG("%s %p %d\n", __FUNCTION__, region, region->refcount - 1);
278
279 ASSERT(region->refcount > 0);
280 region->refcount--;
281
282 if (region->refcount == 0) {
283 assert(region->map_refcount == 0);
284
285 if (region->pbo)
286 region->pbo->region = NULL;
287 region->pbo = NULL;
288 dri_bo_unreference(region->buffer);
289
290 if (region->name > 0)
291 _mesa_HashRemove(region->screen->named_regions, region->name);
292
293 free(region);
294 }
295 *region_handle = NULL;
296 }
297
298 /*
299 * XXX Move this into core Mesa?
300 */
301 void
302 _mesa_copy_rect(GLubyte * dst,
303 GLuint cpp,
304 GLuint dst_pitch,
305 GLuint dst_x,
306 GLuint dst_y,
307 GLuint width,
308 GLuint height,
309 const GLubyte * src,
310 GLuint src_pitch, GLuint src_x, GLuint src_y)
311 {
312 GLuint i;
313
314 dst_pitch *= cpp;
315 src_pitch *= cpp;
316 dst += dst_x * cpp;
317 src += src_x * cpp;
318 dst += dst_y * dst_pitch;
319 src += src_y * dst_pitch;
320 width *= cpp;
321
322 if (width == dst_pitch && width == src_pitch)
323 memcpy(dst, src, height * width);
324 else {
325 for (i = 0; i < height; i++) {
326 memcpy(dst, src, width);
327 dst += dst_pitch;
328 src += src_pitch;
329 }
330 }
331 }
332
333
334 /* Upload data to a rectangular sub-region. Lots of choices how to do this:
335 *
336 * - memcpy by span to current destination
337 * - upload data as new buffer and blit
338 *
339 * Currently always memcpy.
340 */
341 void
342 intel_region_data(struct intel_context *intel,
343 struct intel_region *dst,
344 GLuint dst_offset,
345 GLuint dstx, GLuint dsty,
346 const void *src, GLuint src_pitch,
347 GLuint srcx, GLuint srcy, GLuint width, GLuint height)
348 {
349 _DBG("%s\n", __FUNCTION__);
350
351 if (intel == NULL)
352 return;
353
354 if (dst->pbo) {
355 if (dstx == 0 &&
356 dsty == 0 && width == dst->pitch && height == dst->height)
357 intel_region_release_pbo(intel, dst);
358 else
359 intel_region_cow(intel, dst);
360 }
361
362 intel_prepare_render(intel);
363
364 _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
365 dst->cpp,
366 dst->pitch,
367 dstx, dsty, width, height, src, src_pitch, srcx, srcy);
368
369 intel_region_unmap(intel, dst);
370 }
371
372 /* Copy rectangular sub-regions. Need better logic about when to
373 * push buffers into AGP - will currently do so whenever possible.
374 */
375 GLboolean
376 intel_region_copy(struct intel_context *intel,
377 struct intel_region *dst,
378 GLuint dst_offset,
379 GLuint dstx, GLuint dsty,
380 struct intel_region *src,
381 GLuint src_offset,
382 GLuint srcx, GLuint srcy, GLuint width, GLuint height,
383 GLboolean flip,
384 GLenum logicop)
385 {
386 uint32_t src_pitch = src->pitch;
387
388 _DBG("%s\n", __FUNCTION__);
389
390 if (intel == NULL)
391 return GL_FALSE;
392
393 if (dst->pbo) {
394 if (dstx == 0 &&
395 dsty == 0 && width == dst->pitch && height == dst->height)
396 intel_region_release_pbo(intel, dst);
397 else
398 intel_region_cow(intel, dst);
399 }
400
401 assert(src->cpp == dst->cpp);
402
403 if (flip)
404 src_pitch = -src_pitch;
405
406 return intelEmitCopyBlit(intel,
407 dst->cpp,
408 src_pitch, src->buffer, src_offset, src->tiling,
409 dst->pitch, dst->buffer, dst_offset, dst->tiling,
410 srcx, srcy, dstx, dsty, width, height,
411 logicop);
412 }
413
414 /* Attach to a pbo, discarding our data. Effectively zero-copy upload
415 * the pbo's data.
416 */
417 void
418 intel_region_attach_pbo(struct intel_context *intel,
419 struct intel_region *region,
420 struct intel_buffer_object *pbo)
421 {
422 dri_bo *buffer;
423
424 if (region->pbo == pbo)
425 return;
426
427 _DBG("%s %p %p\n", __FUNCTION__, region, pbo);
428
429 /* If there is already a pbo attached, break the cow tie now.
430 * Don't call intel_region_release_pbo() as that would
431 * unnecessarily allocate a new buffer we would have to immediately
432 * discard.
433 */
434 if (region->pbo) {
435 region->pbo->region = NULL;
436 region->pbo = NULL;
437 }
438
439 if (region->buffer) {
440 dri_bo_unreference(region->buffer);
441 region->buffer = NULL;
442 }
443
444 /* make sure pbo has a buffer of its own */
445 buffer = intel_bufferobj_buffer(intel, pbo, INTEL_WRITE_FULL);
446
447 region->pbo = pbo;
448 region->pbo->region = region;
449 dri_bo_reference(buffer);
450 region->buffer = buffer;
451 region->tiling = I915_TILING_NONE;
452 }
453
454
455 /* Break the COW tie to the pbo and allocate a new buffer.
456 * The pbo gets to keep the data.
457 */
458 void
459 intel_region_release_pbo(struct intel_context *intel,
460 struct intel_region *region)
461 {
462 _DBG("%s %p\n", __FUNCTION__, region);
463 assert(region->buffer == region->pbo->buffer);
464 region->pbo->region = NULL;
465 region->pbo = NULL;
466 dri_bo_unreference(region->buffer);
467 region->buffer = NULL;
468
469 region->buffer = dri_bo_alloc(intel->bufmgr, "region",
470 region->pitch * region->cpp * region->height,
471 64);
472 }
473
474 /* Break the COW tie to the pbo. Both the pbo and the region end up
475 * with a copy of the data.
476 */
477 void
478 intel_region_cow(struct intel_context *intel, struct intel_region *region)
479 {
480 struct intel_buffer_object *pbo = region->pbo;
481 GLboolean ok;
482
483 intel_region_release_pbo(intel, region);
484
485 assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
486
487 _DBG("%s %p (%d bytes)\n", __FUNCTION__, region, pbo->Base.Size);
488
489 /* Now blit from the texture buffer to the new buffer:
490 */
491
492 intel_prepare_render(intel);
493 ok = intelEmitCopyBlit(intel,
494 region->cpp,
495 region->pitch, pbo->buffer, 0, region->tiling,
496 region->pitch, region->buffer, 0, region->tiling,
497 0, 0, 0, 0,
498 region->pitch, region->height,
499 GL_COPY);
500 assert(ok);
501 }
502
503 dri_bo *
504 intel_region_buffer(struct intel_context *intel,
505 struct intel_region *region, GLuint flag)
506 {
507 if (region->pbo) {
508 if (flag == INTEL_WRITE_PART)
509 intel_region_cow(intel, region);
510 else if (flag == INTEL_WRITE_FULL)
511 intel_region_release_pbo(intel, region);
512 }
513
514 return region->buffer;
515 }