src/mesa/drivers/dri/nouveau/nv10_context.c

   1 /*
   2  * Copyright (C) 2009-2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "main/state.h"
  28 #include "nouveau_driver.h"
  29 #include "nouveau_context.h"
  30 #include "nouveau_fbo.h"
  31 #include "nouveau_util.h"
  32 #include "nouveau_class.h"
  33 #include "nv04_driver.h"
  34 #include "nv10_driver.h"
  35
  36 static const struct dri_extension nv10_extensions[] = {
  37         { "GL_ARB_texture_env_crossbar", NULL },
  38         { "GL_EXT_texture_rectangle",   NULL },
  39         { "GL_ARB_texture_env_combine", NULL },
  40         { "GL_ARB_texture_env_dot3",    NULL },
  41         { NULL,                         NULL }
  42 };
  43
  44 static GLboolean
  45 use_fast_zclear(struct gl_context *ctx, GLbitfield buffers)
  46 {
  47         struct nouveau_context *nctx = to_nouveau_context(ctx);
  48         struct gl_framebuffer *fb = ctx->DrawBuffer;
  49
  50         if (buffers & BUFFER_BIT_STENCIL) {
  51                 /*
  52                  * The stencil test is bypassed when fast Z clears are
  53                  * enabled.
  54                  */
  55                 nctx->hierz.clear_blocked = GL_TRUE;
  56                 context_dirty(ctx, ZCLEAR);
  57                 return GL_FALSE;
  58         }
  59
  60         return !nctx->hierz.clear_blocked &&
  61                 fb->_Xmax == fb->Width && fb->_Xmin == 0 &&
  62                 fb->_Ymax == fb->Height && fb->_Ymin == 0;
  63 }
  64
  65 GLboolean
  66 nv10_use_viewport_zclear(struct gl_context *ctx)
  67 {
  68         struct nouveau_context *nctx = to_nouveau_context(ctx);
  69         struct gl_framebuffer *fb = ctx->DrawBuffer;
  70
  71         return context_chipset(ctx) < 0x17 &&
  72                 !nctx->hierz.clear_blocked && fb->_DepthBuffer &&
  73                 (_mesa_get_format_bits(fb->_DepthBuffer->Format,
  74                                        GL_DEPTH_BITS) >= 24);
  75 }
  76
  77 float
  78 nv10_transform_depth(struct gl_context *ctx, float z)
  79 {
  80         struct nouveau_context *nctx = to_nouveau_context(ctx);
  81
  82         if (nv10_use_viewport_zclear(ctx))
  83                 return 2097152.0 * (z + (nctx->hierz.clear_seq & 7));
  84         else
  85                 return ctx->DrawBuffer->_DepthMaxF * z;
  86 }
  87
  88 static void
  89 nv10_zclear(struct gl_context *ctx, GLbitfield *buffers)
  90 {
  91         /*
  92          * Pre-nv17 cards don't have native support for fast Z clears,
  93          * but in some cases we can still "clear" the Z buffer without
  94          * actually blitting to it if we're willing to sacrifice a few
  95          * bits of depth precision.
  96          *
  97          * Each time a clear is requested we modify the viewport
  98          * transform in such a way that the old contents of the depth
  99          * buffer are clamped to the requested clear value when
 100          * they're read by the GPU.
 101          */
 102         struct nouveau_context *nctx = to_nouveau_context(ctx);
 103         struct gl_framebuffer *fb = ctx->DrawBuffer;
 104         struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb);
 105         struct nouveau_surface *s = &to_nouveau_renderbuffer(
 106                 fb->_DepthBuffer->Wrapped)->surface;
 107
 108         if (nv10_use_viewport_zclear(ctx)) {
 109                 int x, y, w, h;
 110                 float z = ctx->Depth.Clear;
 111                 uint32_t value = pack_zs_f(s->format, z, 0);
 112
 113                 get_scissors(fb, &x, &y, &w, &h);
 114                 *buffers &= ~BUFFER_BIT_DEPTH;
 115
 116                 if (use_fast_zclear(ctx, *buffers)) {
 117                         if (nfb->hierz.clear_value != value) {
 118                                 /* Don't fast clear if we're changing
 119                                  * the depth value. */
 120                                 nfb->hierz.clear_value = value;
 121
 122                         } else if (z == 0.0) {
 123                                 nctx->hierz.clear_seq++;
 124                                 context_dirty(ctx, ZCLEAR);
 125
 126                                 if ((nctx->hierz.clear_seq & 7) != 0 &&
 127                                     nctx->hierz.clear_seq != 1)
 128                                         /* We didn't wrap around -- no need to
 129                                          * clear the depth buffer for real. */
 130                                         return;
 131
 132                         } else if (z == 1.0) {
 133                                 nctx->hierz.clear_seq--;
 134                                 context_dirty(ctx, ZCLEAR);
 135
 136                                 if ((nctx->hierz.clear_seq & 7) != 7)
 137                                         /* No wrap around */
 138                                         return;
 139                         }
 140                 }
 141
 142                 value = pack_zs_f(s->format,
 143                                   (z + (nctx->hierz.clear_seq & 7)) / 8, 0);
 144                 context_drv(ctx)->surface_fill(ctx, s, ~0, value, x, y, w, h);
 145         }
 146 }
 147
 148 static void
 149 nv17_zclear(struct gl_context *ctx, GLbitfield *buffers)
 150 {
 151         struct nouveau_context *nctx = to_nouveau_context(ctx);
 152         struct nouveau_channel *chan = context_chan(ctx);
 153         struct nouveau_grobj *celsius = context_eng3d(ctx);
 154         struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(
 155                 ctx->DrawBuffer);
 156         struct nouveau_surface *s = &to_nouveau_renderbuffer(
 157                 nfb->base._DepthBuffer->Wrapped)->surface;
 158
 159         /* Clear the hierarchical depth buffer */
 160         BEGIN_RING(chan, celsius, NV17TCL_LMA_DEPTH_FILL_VALUE, 1);
 161         OUT_RING(chan, pack_zs_f(s->format, ctx->Depth.Clear, 0));
 162         BEGIN_RING(chan, celsius, NV17TCL_LMA_DEPTH_BUFFER_CLEAR, 1);
 163         OUT_RING(chan, 1);
 164
 165         /* Mark the depth buffer as cleared */
 166         if (use_fast_zclear(ctx, *buffers)) {
 167                 if (nctx->hierz.clear_seq)
 168                         *buffers &= ~BUFFER_BIT_DEPTH;
 169
 170                 nfb->hierz.clear_value =
 171                         pack_zs_f(s->format, ctx->Depth.Clear, 0);
 172                 nctx->hierz.clear_seq++;
 173
 174                 context_dirty(ctx, ZCLEAR);
 175         }
 176 }
 177
 178 static void
 179 nv10_clear(struct gl_context *ctx, GLbitfield buffers)
 180 {
 181         nouveau_validate_framebuffer(ctx);
 182
 183         if ((buffers & BUFFER_BIT_DEPTH) && ctx->Depth.Mask) {
 184                 if (context_chipset(ctx) >= 0x17)
 185                         nv17_zclear(ctx, &buffers);
 186                 else
 187                         nv10_zclear(ctx, &buffers);
 188
 189                 /* Emit the zclear state if it's dirty */
 190                 _mesa_update_state(ctx);
 191         }
 192
 193         nouveau_clear(ctx, buffers);
 194 }
 195
 196 static void
 197 nv10_hwctx_init(struct gl_context *ctx)
 198 {
 199         struct nouveau_channel *chan = context_chan(ctx);
 200         struct nouveau_grobj *celsius = context_eng3d(ctx);
 201         struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
 202         int i;
 203
 204         BEGIN_RING(chan, celsius, NV10TCL_DMA_NOTIFY, 1);
 205         OUT_RING(chan, hw->ntfy->handle);
 206
 207         BEGIN_RING(chan, celsius, NV10TCL_DMA_IN_MEMORY0, 3);
 208         OUT_RING(chan, chan->vram->handle);
 209         OUT_RING(chan, chan->gart->handle);
 210         OUT_RING(chan, chan->gart->handle);
 211         BEGIN_RING(chan, celsius, NV10TCL_DMA_IN_MEMORY2, 2);
 212         OUT_RING(chan, chan->vram->handle);
 213         OUT_RING(chan, chan->vram->handle);
 214
 215         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 216         OUT_RING(chan, 0);
 217
 218         BEGIN_RING(chan, celsius, NV10TCL_RT_HORIZ, 2);
 219         OUT_RING(chan, 0);
 220         OUT_RING(chan, 0);
 221
 222         BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
 223         OUT_RING(chan, 0x7ff << 16 | 0x800);
 224         BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
 225         OUT_RING(chan, 0x7ff << 16 | 0x800);
 226
 227         for (i = 1; i < 8; i++) {
 228                 BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(i), 1);
 229                 OUT_RING(chan, 0);
 230                 BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_VERT(i), 1);
 231                 OUT_RING(chan, 0);
 232         }
 233
 234         BEGIN_RING(chan, celsius, 0x290, 1);
 235         OUT_RING(chan, 0x10 << 16 | 1);
 236         BEGIN_RING(chan, celsius, 0x3f4, 1);
 237         OUT_RING(chan, 0);
 238
 239         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 240         OUT_RING(chan, 0);
 241
 242         if (context_chipset(ctx) >= 0x17) {
 243                 BEGIN_RING(chan, celsius, NV17TCL_DMA_IN_MEMORY4, 2);
 244                 OUT_RING(chan, chan->vram->handle);
 245                 OUT_RING(chan, chan->vram->handle);
 246
 247                 BEGIN_RING(chan, celsius, 0xd84, 1);
 248                 OUT_RING(chan, 0x3);
 249
 250                 BEGIN_RING(chan, celsius, NV17TCL_COLOR_MASK_ENABLE, 1);
 251                 OUT_RING(chan, 1);
 252         }
 253
 254         if (context_chipset(ctx) >= 0x11) {
 255                 BEGIN_RING(chan, celsius, 0x120, 3);
 256                 OUT_RING(chan, 0);
 257                 OUT_RING(chan, 1);
 258                 OUT_RING(chan, 2);
 259
 260                 BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 261                 OUT_RING(chan, 0);
 262         }
 263
 264         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 265         OUT_RING(chan, 0);
 266
 267         /* Set state */
 268         BEGIN_RING(chan, celsius, NV10TCL_FOG_ENABLE, 1);
 269         OUT_RING(chan, 0);
 270         BEGIN_RING(chan, celsius, NV10TCL_ALPHA_FUNC_ENABLE, 1);
 271         OUT_RING(chan, 0);
 272         BEGIN_RING(chan, celsius, NV10TCL_ALPHA_FUNC_FUNC, 2);
 273         OUT_RING(chan, 0x207);
 274         OUT_RING(chan, 0);
 275         BEGIN_RING(chan, celsius, NV10TCL_TX_ENABLE(0), 2);
 276         OUT_RING(chan, 0);
 277         OUT_RING(chan, 0);
 278
 279         BEGIN_RING(chan, celsius, NV10TCL_BLEND_FUNC_ENABLE, 1);
 280         OUT_RING(chan, 0);
 281         BEGIN_RING(chan, celsius, NV10TCL_DITHER_ENABLE, 2);
 282         OUT_RING(chan, 1);
 283         OUT_RING(chan, 0);
 284         BEGIN_RING(chan, celsius, NV10TCL_LINE_SMOOTH_ENABLE, 1);
 285         OUT_RING(chan, 0);
 286         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_WEIGHT_ENABLE, 2);
 287         OUT_RING(chan, 0);
 288         OUT_RING(chan, 0);
 289         BEGIN_RING(chan, celsius, NV10TCL_BLEND_FUNC_SRC, 4);
 290         OUT_RING(chan, 1);
 291         OUT_RING(chan, 0);
 292         OUT_RING(chan, 0);
 293         OUT_RING(chan, 0x8006);
 294         BEGIN_RING(chan, celsius, NV10TCL_STENCIL_MASK, 8);
 295         OUT_RING(chan, 0xff);
 296         OUT_RING(chan, 0x207);
 297         OUT_RING(chan, 0);
 298         OUT_RING(chan, 0xff);
 299         OUT_RING(chan, 0x1e00);
 300         OUT_RING(chan, 0x1e00);
 301         OUT_RING(chan, 0x1e00);
 302         OUT_RING(chan, 0x1d01);
 303         BEGIN_RING(chan, celsius, NV10TCL_NORMALIZE_ENABLE, 1);
 304         OUT_RING(chan, 0);
 305         BEGIN_RING(chan, celsius, NV10TCL_FOG_ENABLE, 2);
 306         OUT_RING(chan, 0);
 307         OUT_RING(chan, 0);
 308         BEGIN_RING(chan, celsius, NV10TCL_LIGHT_MODEL, 1);
 309         OUT_RING(chan, 0);
 310         BEGIN_RING(chan, celsius, NV10TCL_SEPARATE_SPECULAR_ENABLE, 1);
 311         OUT_RING(chan, 0);
 312         BEGIN_RING(chan, celsius, NV10TCL_ENABLED_LIGHTS, 1);
 313         OUT_RING(chan, 0);
 314         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
 315         OUT_RING(chan, 0);
 316         OUT_RING(chan, 0);
 317         OUT_RING(chan, 0);
 318         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_FUNC, 1);
 319         OUT_RING(chan, 0x201);
 320         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_WRITE_ENABLE, 1);
 321         OUT_RING(chan, 0);
 322         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_TEST_ENABLE, 1);
 323         OUT_RING(chan, 0);
 324         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_OFFSET_FACTOR, 2);
 325         OUT_RING(chan, 0);
 326         OUT_RING(chan, 0);
 327         BEGIN_RING(chan, celsius, NV10TCL_POINT_SIZE, 1);
 328         OUT_RING(chan, 8);
 329         BEGIN_RING(chan, celsius, NV10TCL_POINT_PARAMETERS_ENABLE, 2);
 330         OUT_RING(chan, 0);
 331         OUT_RING(chan, 0);
 332         BEGIN_RING(chan, celsius, NV10TCL_LINE_WIDTH, 1);
 333         OUT_RING(chan, 8);
 334         BEGIN_RING(chan, celsius, NV10TCL_LINE_SMOOTH_ENABLE, 1);
 335         OUT_RING(chan, 0);
 336         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_MODE_FRONT, 2);
 337         OUT_RING(chan, 0x1b02);
 338         OUT_RING(chan, 0x1b02);
 339         BEGIN_RING(chan, celsius, NV10TCL_CULL_FACE, 2);
 340         OUT_RING(chan, 0x405);
 341         OUT_RING(chan, 0x901);
 342         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_SMOOTH_ENABLE, 1);
 343         OUT_RING(chan, 0);
 344         BEGIN_RING(chan, celsius, NV10TCL_CULL_FACE_ENABLE, 1);
 345         OUT_RING(chan, 0);
 346         BEGIN_RING(chan, celsius, NV10TCL_TX_GEN_MODE_S(0), 8);
 347         for (i = 0; i < 8; i++)
 348                 OUT_RING(chan, 0);
 349
 350         BEGIN_RING(chan, celsius, NV10TCL_TX_MATRIX_ENABLE(0), 2);
 351         OUT_RING(chan, 0);
 352         OUT_RING(chan, 0);
 353         BEGIN_RING(chan, celsius, NV10TCL_FOG_EQUATION_CONSTANT, 3);
 354         OUT_RING(chan, 0x3fc00000);     /* -1.50 */
 355         OUT_RING(chan, 0xbdb8aa0a);     /* -0.09 */
 356         OUT_RING(chan, 0);              /*  0.00 */
 357
 358         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 359         OUT_RING(chan, 0);
 360
 361         BEGIN_RING(chan, celsius, NV10TCL_FOG_MODE, 2);
 362         OUT_RING(chan, 0x802);
 363         OUT_RING(chan, 2);
 364         /* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when
 365          * using texturing, except when using the texture matrix
 366          */
 367         BEGIN_RING(chan, celsius, NV10TCL_VIEW_MATRIX_ENABLE, 1);
 368         OUT_RING(chan, 6);
 369         BEGIN_RING(chan, celsius, NV10TCL_COLOR_MASK, 1);
 370         OUT_RING(chan, 0x01010101);
 371
 372         /* Set vertex component */
 373         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_COL_4F_R, 4);
 374         OUT_RINGf(chan, 1.0);
 375         OUT_RINGf(chan, 0.0);
 376         OUT_RINGf(chan, 0.0);
 377         OUT_RINGf(chan, 1.0);
 378         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_COL2_3F_R, 3);
 379         OUT_RING(chan, 0);
 380         OUT_RING(chan, 0);
 381         OUT_RING(chan, 0);
 382         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_NOR_3F_X, 3);
 383         OUT_RING(chan, 0);
 384         OUT_RING(chan, 0);
 385         OUT_RINGf(chan, 1.0);
 386         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_TX0_4F_S, 4);
 387         OUT_RINGf(chan, 0.0);
 388         OUT_RINGf(chan, 0.0);
 389         OUT_RINGf(chan, 0.0);
 390         OUT_RINGf(chan, 1.0);
 391         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_TX1_4F_S, 4);
 392         OUT_RINGf(chan, 0.0);
 393         OUT_RINGf(chan, 0.0);
 394         OUT_RINGf(chan, 0.0);
 395         OUT_RINGf(chan, 1.0);
 396         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_FOG_1F, 1);
 397         OUT_RINGf(chan, 0.0);
 398         BEGIN_RING(chan, celsius, NV10TCL_EDGEFLAG_ENABLE, 1);
 399         OUT_RING(chan, 1);
 400
 401         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_RANGE_NEAR, 2);
 402         OUT_RINGf(chan, 0.0);
 403         OUT_RINGf(chan, 16777216.0);
 404
 405         FIRE_RING(chan);
 406 }
 407
 408 static void
 409 nv10_context_destroy(struct gl_context *ctx)
 410 {
 411         struct nouveau_context *nctx = to_nouveau_context(ctx);
 412
 413         nv04_surface_takedown(ctx);
 414         nv10_swtnl_destroy(ctx);
 415         nv10_vbo_destroy(ctx);
 416
 417         nouveau_grobj_free(&nctx->hw.eng3d);
 418
 419         nouveau_context_deinit(ctx);
 420         FREE(ctx);
 421 }
 422
 423 static struct gl_context *
 424 nv10_context_create(struct nouveau_screen *screen, const struct gl_config *visual,
 425                     struct gl_context *share_ctx)
 426 {
 427         struct nouveau_context *nctx;
 428         struct gl_context *ctx;
 429         unsigned celsius_class;
 430         int ret;
 431
 432         nctx = CALLOC_STRUCT(nouveau_context);
 433         if (!nctx)
 434                 return NULL;
 435
 436         ctx = &nctx->base;
 437
 438         if (!nouveau_context_init(ctx, screen, visual, share_ctx))
 439                 goto fail;
 440
 441         driInitExtensions(ctx, nv10_extensions, GL_FALSE);
 442
 443         /* GL constants. */
 444         ctx->Const.MaxTextureLevels = 12;
 445         ctx->Const.MaxTextureCoordUnits = NV10_TEXTURE_UNITS;
 446         ctx->Const.MaxTextureImageUnits = NV10_TEXTURE_UNITS;
 447         ctx->Const.MaxTextureUnits = NV10_TEXTURE_UNITS;
 448         ctx->Const.MaxTextureMaxAnisotropy = 2;
 449         ctx->Const.MaxTextureLodBias = 15;
 450         ctx->Driver.Clear = nv10_clear;
 451
 452         /* 2D engine. */
 453         ret = nv04_surface_init(ctx);
 454         if (!ret)
 455                 goto fail;
 456
 457         /* 3D engine. */
 458         if (context_chipset(ctx) >= 0x17)
 459                 celsius_class = NV17TCL;
 460         else if (context_chipset(ctx) >= 0x11)
 461                 celsius_class = NV11TCL;
 462         else
 463                 celsius_class = NV10TCL;
 464
 465         ret = nouveau_grobj_alloc(context_chan(ctx), 0xbeef0001, celsius_class,
 466                                   &nctx->hw.eng3d);
 467         if (ret)
 468                 goto fail;
 469
 470         nv10_hwctx_init(ctx);
 471         nv10_vbo_init(ctx);
 472         nv10_swtnl_init(ctx);
 473
 474         return ctx;
 475
 476 fail:
 477         nv10_context_destroy(ctx);
 478         return NULL;
 479 }
 480
 481 const struct nouveau_driver nv10_driver = {
 482         .context_create = nv10_context_create,
 483         .context_destroy = nv10_context_destroy,
 484         .surface_copy = nv04_surface_copy,
 485         .surface_fill = nv04_surface_fill,
 486         .emit = (nouveau_state_func[]) {
 487                 nv10_emit_alpha_func,
 488                 nv10_emit_blend_color,
 489                 nv10_emit_blend_equation,
 490                 nv10_emit_blend_func,
 491                 nv10_emit_clip_plane,
 492                 nv10_emit_clip_plane,
 493                 nv10_emit_clip_plane,
 494                 nv10_emit_clip_plane,
 495                 nv10_emit_clip_plane,
 496                 nv10_emit_clip_plane,
 497                 nv10_emit_color_mask,
 498                 nv10_emit_color_material,
 499                 nv10_emit_cull_face,
 500                 nv10_emit_front_face,
 501                 nv10_emit_depth,
 502                 nv10_emit_dither,
 503                 nv10_emit_frag,
 504                 nv10_emit_framebuffer,
 505                 nv10_emit_fog,
 506                 nv10_emit_light_enable,
 507                 nv10_emit_light_model,
 508                 nv10_emit_light_source,
 509                 nv10_emit_light_source,
 510                 nv10_emit_light_source,
 511                 nv10_emit_light_source,
 512                 nv10_emit_light_source,
 513                 nv10_emit_light_source,
 514                 nv10_emit_light_source,
 515                 nv10_emit_light_source,
 516                 nv10_emit_line_stipple,
 517                 nv10_emit_line_mode,
 518                 nv10_emit_logic_opcode,
 519                 nv10_emit_material_ambient,
 520                 nouveau_emit_nothing,
 521                 nv10_emit_material_diffuse,
 522                 nouveau_emit_nothing,
 523                 nv10_emit_material_specular,
 524                 nouveau_emit_nothing,
 525                 nv10_emit_material_shininess,
 526                 nouveau_emit_nothing,
 527                 nv10_emit_modelview,
 528                 nv10_emit_point_mode,
 529                 nv10_emit_point_parameter,
 530                 nv10_emit_polygon_mode,
 531                 nv10_emit_polygon_offset,
 532                 nv10_emit_polygon_stipple,
 533                 nv10_emit_projection,
 534                 nv10_emit_render_mode,
 535                 nv10_emit_scissor,
 536                 nv10_emit_shade_model,
 537                 nv10_emit_stencil_func,
 538                 nv10_emit_stencil_mask,
 539                 nv10_emit_stencil_op,
 540                 nv10_emit_tex_env,
 541                 nv10_emit_tex_env,
 542                 nouveau_emit_nothing,
 543                 nouveau_emit_nothing,
 544                 nv10_emit_tex_gen,
 545                 nv10_emit_tex_gen,
 546                 nouveau_emit_nothing,
 547                 nouveau_emit_nothing,
 548                 nv10_emit_tex_mat,
 549                 nv10_emit_tex_mat,
 550                 nouveau_emit_nothing,
 551                 nouveau_emit_nothing,
 552                 nv10_emit_tex_obj,
 553                 nv10_emit_tex_obj,
 554                 nouveau_emit_nothing,
 555                 nouveau_emit_nothing,
 556                 nv10_emit_viewport,
 557                 nv10_emit_zclear
 558         },
 559         .num_emit = NUM_NV10_STATE,
 560 };