Merge branch '7.8'
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/api_arrayelt.h"
37 #include "main/context.h"
38 #include "main/simple_list.h"
39 #include "main/imports.h"
40 #include "main/extensions.h"
41
42 #include "swrast/swrast.h"
43 #include "swrast_setup/swrast_setup.h"
44 #include "vbo/vbo.h"
45
46 #include "tnl/tnl.h"
47 #include "tnl/t_pipeline.h"
48
49 #include "drivers/common/driverfuncs.h"
50
51 #include "r200_context.h"
52 #include "r200_ioctl.h"
53 #include "r200_state.h"
54 #include "r200_tex.h"
55 #include "r200_swtcl.h"
56 #include "r200_tcl.h"
57 #include "r200_vertprog.h"
58 #include "radeon_queryobj.h"
59 #include "r200_blit.h"
60
61 #include "radeon_span.h"
62
63 #define need_GL_ARB_occlusion_query
64 #define need_GL_ARB_vertex_program
65 #define need_GL_ATI_fragment_shader
66 #define need_GL_EXT_blend_minmax
67 #define need_GL_EXT_fog_coord
68 #define need_GL_EXT_secondary_color
69 #define need_GL_EXT_blend_equation_separate
70 #define need_GL_EXT_blend_func_separate
71 #define need_GL_NV_vertex_program
72 #define need_GL_ARB_point_parameters
73 #define need_GL_EXT_framebuffer_object
74 #include "main/remap_helper.h"
75
76 #define DRIVER_DATE "20060602"
77
78 #include "utils.h"
79 #include "xmlpool.h" /* for symbolic values of enum-type options */
80
81 /* Return various strings for glGetString().
82 */
83 static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
84 {
85 r200ContextPtr rmesa = R200_CONTEXT(ctx);
86 static char buffer[128];
87 unsigned offset;
88 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
89 rmesa->radeon.radeonScreen->AGPMode;
90
91 switch ( name ) {
92 case GL_VENDOR:
93 return (GLubyte *)"Tungsten Graphics, Inc.";
94
95 case GL_RENDERER:
96 offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
97 agp_mode );
98
99 sprintf( & buffer[ offset ], " %sTCL",
100 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
101 ? "" : "NO-" );
102
103 return (GLubyte *)buffer;
104
105 default:
106 return NULL;
107 }
108 }
109
110
111 /* Extension strings exported by the R200 driver.
112 */
113 static const struct dri_extension card_extensions[] =
114 {
115 { "GL_ARB_multitexture", NULL },
116 { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
117 { "GL_ARB_texture_border_clamp", NULL },
118 { "GL_ARB_texture_env_add", NULL },
119 { "GL_ARB_texture_env_combine", NULL },
120 { "GL_ARB_texture_env_dot3", NULL },
121 { "GL_ARB_texture_env_crossbar", NULL },
122 { "GL_ARB_texture_mirrored_repeat", NULL },
123 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
124 { "GL_EXT_blend_subtract", NULL },
125 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
126 { "GL_EXT_packed_depth_stencil", NULL},
127 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
128 { "GL_EXT_stencil_wrap", NULL },
129 { "GL_EXT_texture_edge_clamp", NULL },
130 { "GL_EXT_texture_env_combine", NULL },
131 { "GL_EXT_texture_env_dot3", NULL },
132 { "GL_EXT_texture_filter_anisotropic", NULL },
133 { "GL_EXT_texture_lod_bias", NULL },
134 { "GL_EXT_texture_mirror_clamp", NULL },
135 { "GL_EXT_texture_rectangle", NULL },
136 { "GL_ATI_texture_env_combine3", NULL },
137 { "GL_ATI_texture_mirror_once", NULL },
138 { "GL_MESA_pack_invert", NULL },
139 { "GL_NV_blend_square", NULL },
140 { "GL_SGIS_generate_mipmap", NULL },
141 { NULL, NULL }
142 };
143
144 static const struct dri_extension blend_extensions[] = {
145 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
146 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
147 { NULL, NULL }
148 };
149
150 static const struct dri_extension ARB_vp_extension[] = {
151 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }
152 };
153
154 static const struct dri_extension NV_vp_extension[] = {
155 { "GL_NV_vertex_program", GL_NV_vertex_program_functions }
156 };
157
158 static const struct dri_extension ATI_fs_extension[] = {
159 { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions }
160 };
161
162 static const struct dri_extension point_extensions[] = {
163 { "GL_ARB_point_sprite", NULL },
164 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
165 { NULL, NULL }
166 };
167
168 static const struct dri_extension mm_extensions[] = {
169 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
170 { NULL, NULL }
171 };
172
173 extern const struct tnl_pipeline_stage _r200_render_stage;
174 extern const struct tnl_pipeline_stage _r200_tcl_stage;
175
176 static const struct tnl_pipeline_stage *r200_pipeline[] = {
177
178 /* Try and go straight to t&l
179 */
180 &_r200_tcl_stage,
181
182 /* Catch any t&l fallbacks
183 */
184 &_tnl_vertex_transform_stage,
185 &_tnl_normal_transform_stage,
186 &_tnl_lighting_stage,
187 &_tnl_fog_coordinate_stage,
188 &_tnl_texgen_stage,
189 &_tnl_texture_transform_stage,
190 &_tnl_point_attenuation_stage,
191 &_tnl_vertex_program_stage,
192 /* Try again to go to tcl?
193 * - no good for asymmetric-twoside (do with multipass)
194 * - no good for asymmetric-unfilled (do with multipass)
195 * - good for material
196 * - good for texgen
197 * - need to manipulate a bit of state
198 *
199 * - worth it/not worth it?
200 */
201
202 /* Else do them here.
203 */
204 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
205 &_tnl_render_stage, /* FALLBACK: */
206 NULL,
207 };
208
209
210
211 /* Initialize the driver's misc functions.
212 */
213 static void r200InitDriverFuncs( struct dd_function_table *functions )
214 {
215 functions->GetBufferSize = NULL; /* OBSOLETE */
216 functions->GetString = r200GetString;
217 }
218
219
220 static void r200_get_lock(radeonContextPtr radeon)
221 {
222 r200ContextPtr rmesa = (r200ContextPtr)radeon;
223 drm_radeon_sarea_t *sarea = radeon->sarea;
224
225 R200_STATECHANGE( rmesa, ctx );
226 if (rmesa->radeon.sarea->tiling_enabled) {
227 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
228 }
229 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
230
231 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
232 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
233 if (!radeon->radeonScreen->kernel_mm)
234 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
235 }
236
237 }
238
239 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
240 {
241 }
242
243 static void r200_emit_query_finish(radeonContextPtr radeon)
244 {
245 BATCH_LOCALS(radeon);
246 struct radeon_query_object *query = radeon->query.current;
247
248 BEGIN_BATCH_NO_AUTOSTATE(4);
249 OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
250 OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
251 END_BATCH();
252 query->curr_offset += sizeof(uint32_t);
253 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
254 query->emitted_begin = GL_FALSE;
255 }
256
257 static void r200_init_vtbl(radeonContextPtr radeon)
258 {
259 radeon->vtbl.get_lock = r200_get_lock;
260 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
261 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
262 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
263 radeon->vtbl.fallback = r200Fallback;
264 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
265 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
266 radeon->vtbl.check_blit = r200_check_blit;
267 radeon->vtbl.blit = r200_blit;
268 radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
269 }
270
271
272 /* Create the device specific rendering context.
273 */
274 GLboolean r200CreateContext( const __GLcontextModes *glVisual,
275 __DRIcontext *driContextPriv,
276 void *sharedContextPrivate)
277 {
278 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
279 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
280 struct dd_function_table functions;
281 r200ContextPtr rmesa;
282 GLcontext *ctx;
283 int i;
284 int tcl_mode;
285
286 assert(glVisual);
287 assert(driContextPriv);
288 assert(screen);
289
290 /* Allocate the R200 context */
291 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
292 if ( !rmesa )
293 return GL_FALSE;
294
295 rmesa->radeon.radeonScreen = screen;
296 r200_init_vtbl(&rmesa->radeon);
297 /* init exp fog table data */
298 r200InitStaticFogData();
299
300 /* Parse configuration files.
301 * Do this here so that initialMaxAnisotropy is set before we create
302 * the default textures.
303 */
304 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
305 screen->driScreen->myNum, "r200");
306 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
307 "def_max_anisotropy");
308
309 if ( sPriv->drm_version.major == 1
310 && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
311 if ( sPriv->drm_version.minor < 13 )
312 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
313 "disabling.\n", sPriv->drm_version.minor );
314 else
315 rmesa->using_hyperz = GL_TRUE;
316 }
317
318 if ( sPriv->drm_version.minor >= 15 )
319 rmesa->texmicrotile = GL_TRUE;
320
321 /* Init default driver functions then plug in our R200-specific functions
322 * (the texture functions are especially important)
323 */
324 _mesa_init_driver_functions(&functions);
325 r200InitDriverFuncs(&functions);
326 r200InitIoctlFuncs(&functions);
327 r200InitStateFuncs(&rmesa->radeon, &functions);
328 r200InitTextureFuncs(&rmesa->radeon, &functions);
329 r200InitShaderFuncs(&functions);
330 radeonInitQueryObjFunctions(&functions);
331
332 if (!radeonInitContext(&rmesa->radeon, &functions,
333 glVisual, driContextPriv,
334 sharedContextPrivate)) {
335 FREE(rmesa);
336 return GL_FALSE;
337 }
338
339 rmesa->radeon.swtcl.RenderIndex = ~0;
340 rmesa->radeon.hw.all_dirty = 1;
341
342 /* Set the maximum texture size small enough that we can guarentee that
343 * all texture units can bind a maximal texture and have all of them in
344 * texturable memory at once. Depending on the allow_large_textures driconf
345 * setting allow larger textures.
346 */
347
348 ctx = rmesa->radeon.glCtx;
349 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
350 "texture_units");
351 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
352 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
353
354 ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
355
356 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
357
358 /* FIXME: When no memory manager is available we should set this
359 * to some reasonable value based on texture memory pool size */
360 ctx->Const.MaxTextureLevels = 12;
361 ctx->Const.Max3DTextureLevels = 9;
362 ctx->Const.MaxCubeTextureLevels = 12;
363 ctx->Const.MaxTextureRectSize = 2048;
364 ctx->Const.MaxRenderbufferSize = 2048;
365
366 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
367
368 /* No wide AA points.
369 */
370 ctx->Const.MinPointSize = 1.0;
371 ctx->Const.MinPointSizeAA = 1.0;
372 ctx->Const.MaxPointSizeAA = 1.0;
373 ctx->Const.PointSizeGranularity = 0.0625;
374 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
375 ctx->Const.MaxPointSize = 2047.0;
376 else
377 ctx->Const.MaxPointSize = 1.0;
378
379 /* mesa initialization problem - _mesa_init_point was already called */
380 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
381
382 ctx->Const.MinLineWidth = 1.0;
383 ctx->Const.MinLineWidthAA = 1.0;
384 ctx->Const.MaxLineWidth = 10.0;
385 ctx->Const.MaxLineWidthAA = 10.0;
386 ctx->Const.LineWidthGranularity = 0.0625;
387
388 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
389 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
390 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
391 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
392 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
393
394 ctx->Const.MaxDrawBuffers = 1;
395 ctx->Const.MaxColorAttachments = 1;
396
397 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
398
399 /* Initialize the software rasterizer and helper modules.
400 */
401 _swrast_CreateContext( ctx );
402 _vbo_CreateContext( ctx );
403 _tnl_CreateContext( ctx );
404 _swsetup_CreateContext( ctx );
405 _ae_create_context( ctx );
406
407 /* Install the customized pipeline:
408 */
409 _tnl_destroy_pipeline( ctx );
410 _tnl_install_pipeline( ctx, r200_pipeline );
411
412 /* Try and keep materials and vertices separate:
413 */
414 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
415
416
417 /* Configure swrast and TNL to match hardware characteristics:
418 */
419 _swrast_allow_pixel_fog( ctx, GL_FALSE );
420 _swrast_allow_vertex_fog( ctx, GL_TRUE );
421 _tnl_allow_pixel_fog( ctx, GL_FALSE );
422 _tnl_allow_vertex_fog( ctx, GL_TRUE );
423
424
425 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
426 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
427 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
428 }
429 _math_matrix_ctr( &rmesa->tmpmat );
430 _math_matrix_set_identity( &rmesa->tmpmat );
431
432 driInitExtensions( ctx, card_extensions, GL_TRUE );
433
434 if (rmesa->radeon.radeonScreen->kernel_mm)
435 driInitExtensions(ctx, mm_extensions, GL_FALSE);
436 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
437 /* yuv textures don't work with some chips - R200 / rv280 okay so far
438 others get the bit ordering right but don't actually do YUV-RGB conversion */
439 _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
440 }
441 if (rmesa->radeon.glCtx->Mesa_DXTn) {
442 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
443 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
444 }
445 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
446 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
447 }
448
449 if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
450 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
451 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
452 driInitExtensions( ctx, blend_extensions, GL_FALSE );
453 }
454 if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
455 driInitSingleExtension( ctx, ARB_vp_extension );
456 if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
457 driInitSingleExtension( ctx, NV_vp_extension );
458
459 if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
460 driInitSingleExtension( ctx, ATI_fs_extension );
461 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
462 driInitExtensions( ctx, point_extensions, GL_FALSE );
463
464 if (!rmesa->radeon.radeonScreen->kernel_mm)
465 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
466 #if 0
467 r200InitDriverFuncs( ctx );
468 r200InitIoctlFuncs( ctx );
469 r200InitStateFuncs( ctx );
470 r200InitTextureFuncs( ctx );
471 #endif
472 /* plug in a few more device driver functions */
473 /* XXX these should really go right after _mesa_init_driver_functions() */
474 radeon_fbo_init(&rmesa->radeon);
475 radeonInitSpanFuncs( ctx );
476 r200InitTnlFuncs( ctx );
477 r200InitState( rmesa );
478 r200InitSwtcl( ctx );
479
480 rmesa->prefer_gart_client_texturing =
481 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
482
483 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
484 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
485 fprintf(stderr, "disabling 3D acceleration\n");
486 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
487 }
488 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
489 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
490 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
491 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
492 fprintf(stderr, "Disabling HW TCL support\n");
493 }
494 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
495 }
496
497 return GL_TRUE;
498 }
499
500
501 void r200DestroyContext( __DRIcontext *driContextPriv )
502 {
503 int i;
504 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
505 if (rmesa)
506 {
507 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
508 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
509 }
510 }
511 radeonDestroyContext(driContextPriv);
512 }