src/mesa/drivers/dri/r200/r200_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "main/glheader.h"
  36 #include "main/api_arrayelt.h"
  37 #include "main/context.h"
  38 #include "main/simple_list.h"
  39 #include "main/imports.h"
  40 #include "main/extensions.h"
  41
  42 #include "swrast/swrast.h"
  43 #include "swrast_setup/swrast_setup.h"
  44 #include "vbo/vbo.h"
  45
  46 #include "tnl/tnl.h"
  47 #include "tnl/t_pipeline.h"
  48
  49 #include "drivers/common/driverfuncs.h"
  50
  51 #include "r200_context.h"
  52 #include "r200_ioctl.h"
  53 #include "r200_state.h"
  54 #include "r200_tex.h"
  55 #include "r200_swtcl.h"
  56 #include "r200_tcl.h"
  57 #include "r200_vertprog.h"
  58 #include "radeon_queryobj.h"
  59 #include "r200_blit.h"
  60
  61 #include "radeon_span.h"
  62
  63 #define need_GL_ARB_occlusion_query
  64 #define need_GL_ARB_vertex_program
  65 #define need_GL_ATI_fragment_shader
  66 #define need_GL_EXT_blend_minmax
  67 #define need_GL_EXT_fog_coord
  68 #define need_GL_EXT_secondary_color
  69 #define need_GL_EXT_blend_equation_separate
  70 #define need_GL_EXT_blend_func_separate
  71 #define need_GL_NV_vertex_program
  72 #define need_GL_ARB_point_parameters
  73 #define need_GL_EXT_framebuffer_object
  74 #define need_GL_OES_EGL_image
  75
  76 #include "main/remap_helper.h"
  77
  78 #define DRIVER_DATE     "20060602"
  79
  80 #include "utils.h"
  81 #include "xmlpool.h" /* for symbolic values of enum-type options */
  82
  83 /* Return various strings for glGetString().
  84  */
  85 static const GLubyte *r200GetString( struct gl_context *ctx, GLenum name )
  86 {
  87    r200ContextPtr rmesa = R200_CONTEXT(ctx);
  88    static char buffer[128];
  89    unsigned   offset;
  90    GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
  91       rmesa->radeon.radeonScreen->AGPMode;
  92
  93    switch ( name ) {
  94    case GL_VENDOR:
  95       return (GLubyte *)"Tungsten Graphics, Inc.";
  96
  97    case GL_RENDERER:
  98       offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
  99                                      agp_mode );
 100
 101       sprintf( & buffer[ offset ], " %sTCL",
 102                !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
 103                ? "" : "NO-" );
 104
 105       return (GLubyte *)buffer;
 106
 107    default:
 108       return NULL;
 109    }
 110 }
 111
 112
 113 /* Extension strings exported by the R200 driver.
 114  */
 115 static const struct dri_extension card_extensions[] =
 116 {
 117     { "GL_ARB_multitexture",               NULL },
 118     { "GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
 119     { "GL_ARB_texture_border_clamp",       NULL },
 120     { "GL_ARB_texture_env_add",            NULL },
 121     { "GL_ARB_texture_env_combine",        NULL },
 122     { "GL_ARB_texture_env_dot3",           NULL },
 123     { "GL_ARB_texture_env_crossbar",       NULL },
 124     { "GL_ARB_texture_mirrored_repeat",    NULL },
 125     { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
 126     { "GL_EXT_blend_subtract",             NULL },
 127     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 128     { "GL_EXT_packed_depth_stencil",       NULL},
 129     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
 130     { "GL_EXT_stencil_wrap",               NULL },
 131     { "GL_EXT_texture_edge_clamp",         NULL },
 132     { "GL_EXT_texture_env_combine",        NULL },
 133     { "GL_EXT_texture_env_dot3",           NULL },
 134     { "GL_EXT_texture_filter_anisotropic", NULL },
 135     { "GL_EXT_texture_lod_bias",           NULL },
 136     { "GL_EXT_texture_mirror_clamp",       NULL },
 137     { "GL_EXT_texture_rectangle",          NULL },
 138     { "GL_ATI_texture_env_combine3",       NULL },
 139     { "GL_ATI_texture_mirror_once",        NULL },
 140     { "GL_MESA_pack_invert",               NULL },
 141     { "GL_NV_blend_square",                NULL },
 142 #if FEATURE_OES_EGL_image
 143     { "GL_OES_EGL_image",                  GL_OES_EGL_image_functions },
 144 #endif
 145     { NULL,                                NULL }
 146 };
 147
 148 static const struct dri_extension blend_extensions[] = {
 149     { "GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions },
 150     { "GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions },
 151     { NULL,                                NULL }
 152 };
 153
 154 static const struct dri_extension ARB_vp_extension[] = {
 155     { "GL_ARB_vertex_program",             GL_ARB_vertex_program_functions }
 156 };
 157
 158 static const struct dri_extension NV_vp_extension[] = {
 159     { "GL_NV_vertex_program",              GL_NV_vertex_program_functions }
 160 };
 161
 162 static const struct dri_extension ATI_fs_extension[] = {
 163     { "GL_ATI_fragment_shader",            GL_ATI_fragment_shader_functions }
 164 };
 165
 166 static const struct dri_extension point_extensions[] = {
 167     { "GL_ARB_point_sprite",               NULL },
 168     { "GL_ARB_point_parameters",           GL_ARB_point_parameters_functions },
 169     { NULL,                                NULL }
 170 };
 171
 172 static const struct dri_extension mm_extensions[] = {
 173   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 174   { NULL, NULL }
 175 };
 176
 177 extern const struct tnl_pipeline_stage _r200_render_stage;
 178 extern const struct tnl_pipeline_stage _r200_tcl_stage;
 179
 180 static const struct tnl_pipeline_stage *r200_pipeline[] = {
 181
 182    /* Try and go straight to t&l
 183     */
 184    &_r200_tcl_stage,
 185
 186    /* Catch any t&l fallbacks
 187     */
 188    &_tnl_vertex_transform_stage,
 189    &_tnl_normal_transform_stage,
 190    &_tnl_lighting_stage,
 191    &_tnl_fog_coordinate_stage,
 192    &_tnl_texgen_stage,
 193    &_tnl_texture_transform_stage,
 194    &_tnl_point_attenuation_stage,
 195    &_tnl_vertex_program_stage,
 196    /* Try again to go to tcl?
 197     *     - no good for asymmetric-twoside (do with multipass)
 198     *     - no good for asymmetric-unfilled (do with multipass)
 199     *     - good for material
 200     *     - good for texgen
 201     *     - need to manipulate a bit of state
 202     *
 203     * - worth it/not worth it?
 204     */
 205
 206    /* Else do them here.
 207     */
 208 /*    &_r200_render_stage,  */ /* FIXME: bugs with ut2003 */
 209    &_tnl_render_stage,          /* FALLBACK:  */
 210    NULL,
 211 };
 212
 213
 214
 215 /* Initialize the driver's misc functions.
 216  */
 217 static void r200InitDriverFuncs( struct dd_function_table *functions )
 218 {
 219     functions->GetBufferSize            = NULL; /* OBSOLETE */
 220     functions->GetString                = r200GetString;
 221 }
 222
 223
 224 static void r200_get_lock(radeonContextPtr radeon)
 225 {
 226    r200ContextPtr rmesa = (r200ContextPtr)radeon;
 227    drm_radeon_sarea_t *sarea = radeon->sarea;
 228
 229    R200_STATECHANGE( rmesa, ctx );
 230    if (rmesa->radeon.sarea->tiling_enabled) {
 231       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
 232    }
 233    else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
 234
 235    if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
 236       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 237       if (!radeon->radeonScreen->kernel_mm)
 238          radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
 239    }
 240
 241 }
 242
 243 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 244 {
 245 }
 246
 247 static void r200_emit_query_finish(radeonContextPtr radeon)
 248 {
 249    BATCH_LOCALS(radeon);
 250    struct radeon_query_object *query = radeon->query.current;
 251
 252    BEGIN_BATCH_NO_AUTOSTATE(4);
 253    OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
 254    OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
 255    END_BATCH();
 256    query->curr_offset += sizeof(uint32_t);
 257    assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 258    query->emitted_begin = GL_FALSE;
 259 }
 260
 261 static void r200_init_vtbl(radeonContextPtr radeon)
 262 {
 263    radeon->vtbl.get_lock = r200_get_lock;
 264    radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
 265    radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
 266    radeon->vtbl.swtcl_flush = r200_swtcl_flush;
 267    radeon->vtbl.fallback = r200Fallback;
 268    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
 269    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
 270    radeon->vtbl.check_blit = r200_check_blit;
 271    radeon->vtbl.blit = r200_blit;
 272    radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
 273 }
 274
 275
 276 /* Create the device specific rendering context.
 277  */
 278 GLboolean r200CreateContext( gl_api api,
 279                              const struct gl_config *glVisual,
 280                              __DRIcontext *driContextPriv,
 281                              void *sharedContextPrivate)
 282 {
 283    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 284    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
 285    struct dd_function_table functions;
 286    r200ContextPtr rmesa;
 287    struct gl_context *ctx;
 288    int i;
 289    int tcl_mode;
 290
 291    assert(glVisual);
 292    assert(driContextPriv);
 293    assert(screen);
 294
 295    /* Allocate the R200 context */
 296    rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
 297    if ( !rmesa )
 298       return GL_FALSE;
 299
 300    rmesa->radeon.radeonScreen = screen;
 301    r200_init_vtbl(&rmesa->radeon);
 302    /* init exp fog table data */
 303    r200InitStaticFogData();
 304
 305    /* Parse configuration files.
 306     * Do this here so that initialMaxAnisotropy is set before we create
 307     * the default textures.
 308     */
 309    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 310                         screen->driScreen->myNum, "r200");
 311    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 312                                                         "def_max_anisotropy");
 313
 314    if ( sPriv->drm_version.major == 1
 315        && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 316       if ( sPriv->drm_version.minor < 13 )
 317          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 318                           "disabling.\n", sPriv->drm_version.minor );
 319       else
 320          rmesa->using_hyperz = GL_TRUE;
 321    }
 322
 323    if ( sPriv->drm_version.minor >= 15 )
 324       rmesa->texmicrotile = GL_TRUE;
 325
 326    /* Init default driver functions then plug in our R200-specific functions
 327     * (the texture functions are especially important)
 328     */
 329    _mesa_init_driver_functions(&functions);
 330    r200InitDriverFuncs(&functions);
 331    r200InitIoctlFuncs(&functions);
 332    r200InitStateFuncs(&rmesa->radeon, &functions);
 333    r200InitTextureFuncs(&rmesa->radeon, &functions);
 334    r200InitShaderFuncs(&functions);
 335    radeonInitQueryObjFunctions(&functions);
 336
 337    if (!radeonInitContext(&rmesa->radeon, &functions,
 338                           glVisual, driContextPriv,
 339                           sharedContextPrivate)) {
 340      FREE(rmesa);
 341      return GL_FALSE;
 342    }
 343
 344    rmesa->radeon.swtcl.RenderIndex = ~0;
 345    rmesa->radeon.hw.all_dirty = 1;
 346
 347    /* Set the maximum texture size small enough that we can guarentee that
 348     * all texture units can bind a maximal texture and have all of them in
 349     * texturable memory at once. Depending on the allow_large_textures driconf
 350     * setting allow larger textures.
 351     */
 352
 353    ctx = rmesa->radeon.glCtx;
 354    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 355                                                  "texture_units");
 356    ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 357    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 358
 359    ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
 360
 361    i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
 362
 363    /* FIXME: When no memory manager is available we should set this
 364     * to some reasonable value based on texture memory pool size */
 365    ctx->Const.MaxTextureLevels = 12;
 366    ctx->Const.Max3DTextureLevels = 9;
 367    ctx->Const.MaxCubeTextureLevels = 12;
 368    ctx->Const.MaxTextureRectSize = 2048;
 369    ctx->Const.MaxRenderbufferSize = 2048;
 370
 371    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 372
 373    /* No wide AA points.
 374     */
 375    ctx->Const.MinPointSize = 1.0;
 376    ctx->Const.MinPointSizeAA = 1.0;
 377    ctx->Const.MaxPointSizeAA = 1.0;
 378    ctx->Const.PointSizeGranularity = 0.0625;
 379    if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
 380       ctx->Const.MaxPointSize = 2047.0;
 381    else
 382       ctx->Const.MaxPointSize = 1.0;
 383
 384    /* mesa initialization problem - _mesa_init_point was already called */
 385    ctx->Point.MaxSize = ctx->Const.MaxPointSize;
 386
 387    ctx->Const.MinLineWidth = 1.0;
 388    ctx->Const.MinLineWidthAA = 1.0;
 389    ctx->Const.MaxLineWidth = 10.0;
 390    ctx->Const.MaxLineWidthAA = 10.0;
 391    ctx->Const.LineWidthGranularity = 0.0625;
 392
 393    ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
 394    ctx->Const.VertexProgram.MaxNativeAttribs = 12;
 395    ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
 396    ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
 397    ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 398
 399    ctx->Const.MaxDrawBuffers = 1;
 400    ctx->Const.MaxColorAttachments = 1;
 401
 402    _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 403
 404    /* Initialize the software rasterizer and helper modules.
 405     */
 406    _swrast_CreateContext( ctx );
 407    _vbo_CreateContext( ctx );
 408    _tnl_CreateContext( ctx );
 409    _swsetup_CreateContext( ctx );
 410    _ae_create_context( ctx );
 411
 412    /* Install the customized pipeline:
 413     */
 414    _tnl_destroy_pipeline( ctx );
 415    _tnl_install_pipeline( ctx, r200_pipeline );
 416
 417    /* Try and keep materials and vertices separate:
 418     */
 419 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 420
 421
 422    /* Configure swrast and TNL to match hardware characteristics:
 423     */
 424    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 425    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 426    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 427    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 428
 429
 430    for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
 431       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 432       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 433    }
 434    _math_matrix_ctr( &rmesa->tmpmat );
 435    _math_matrix_set_identity( &rmesa->tmpmat );
 436
 437    driInitExtensions( ctx, card_extensions, GL_TRUE );
 438
 439    if (rmesa->radeon.radeonScreen->kernel_mm)
 440      driInitExtensions(ctx, mm_extensions, GL_FALSE);
 441    if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
 442      /* yuv textures don't work with some chips - R200 / rv280 okay so far
 443         others get the bit ordering right but don't actually do YUV-RGB conversion */
 444       _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
 445    }
 446    if (rmesa->radeon.glCtx->Mesa_DXTn) {
 447       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 448       _mesa_enable_extension( ctx, "GL_S3_s3tc" );
 449    }
 450    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 451       _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
 452    }
 453
 454    if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
 455       _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
 456    if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
 457        driInitExtensions( ctx, blend_extensions, GL_FALSE );
 458    }
 459    if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
 460       driInitSingleExtension( ctx, ARB_vp_extension );
 461    if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
 462       driInitSingleExtension( ctx, NV_vp_extension );
 463
 464    if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
 465       driInitSingleExtension( ctx, ATI_fs_extension );
 466    if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
 467       driInitExtensions( ctx, point_extensions, GL_FALSE );
 468
 469    if (!rmesa->radeon.radeonScreen->kernel_mm)
 470       _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 471 #if 0
 472    r200InitDriverFuncs( ctx );
 473    r200InitIoctlFuncs( ctx );
 474    r200InitStateFuncs( ctx );
 475    r200InitTextureFuncs( ctx );
 476 #endif
 477    /* plug in a few more device driver functions */
 478    /* XXX these should really go right after _mesa_init_driver_functions() */
 479    radeon_fbo_init(&rmesa->radeon);
 480    radeonInitSpanFuncs( ctx );
 481    r200InitTnlFuncs( ctx );
 482    r200InitState( rmesa );
 483    r200InitSwtcl( ctx );
 484
 485    rmesa->prefer_gart_client_texturing =
 486       (getenv("R200_GART_CLIENT_TEXTURES") != 0);
 487
 488    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 489    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 490       fprintf(stderr, "disabling 3D acceleration\n");
 491       FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
 492    }
 493    else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
 494             !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 495       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 496          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 497          fprintf(stderr, "Disabling HW TCL support\n");
 498       }
 499       TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
 500    }
 501
 502    return GL_TRUE;
 503 }
 504
 505
 506 void r200DestroyContext( __DRIcontext *driContextPriv )
 507 {
 508         int i;
 509         r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
 510         if (rmesa)
 511         {
 512                 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
 513                         _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
 514                 }
 515         }
 516         radeonDestroyContext(driContextPriv);
 517 }