2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "r500_fragprog.h"
32 #include "../r300_reg.h"
34 static struct rc_src_register
shadow_ambient(struct radeon_compiler
* c
, int tmu
)
36 struct rc_src_register reg
= { 0, };
38 reg
.File
= RC_FILE_CONSTANT
;
39 reg
.Index
= rc_constants_add_state(&c
->Program
.Constants
, RC_STATE_SHADOW_AMBIENT
, tmu
);
40 reg
.Swizzle
= RC_SWIZZLE_WWWW
;
45 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
46 * - implement texture compare (shadow extensions)
47 * - extract non-native source / destination operands
49 int r500_transform_TEX(
50 struct radeon_compiler
* c
,
51 struct rc_instruction
* inst
,
54 struct r300_fragment_program_compiler
*compiler
=
55 (struct r300_fragment_program_compiler
*)data
;
57 if (inst
->U
.I
.Opcode
!= RC_OPCODE_TEX
&&
58 inst
->U
.I
.Opcode
!= RC_OPCODE_TXB
&&
59 inst
->U
.I
.Opcode
!= RC_OPCODE_TXP
&&
60 inst
->U
.I
.Opcode
!= RC_OPCODE_KIL
)
63 /* ARB_shadow & EXT_shadow_funcs */
64 if (inst
->U
.I
.Opcode
!= RC_OPCODE_KIL
&&
65 c
->Program
.ShadowSamplers
& (1 << inst
->U
.I
.TexSrcUnit
)) {
66 rc_compare_func comparefunc
= compiler
->state
.unit
[inst
->U
.I
.TexSrcUnit
].texture_compare_func
;
68 if (comparefunc
== RC_COMPARE_FUNC_NEVER
|| comparefunc
== RC_COMPARE_FUNC_ALWAYS
) {
69 inst
->U
.I
.Opcode
= RC_OPCODE_MOV
;
71 if (comparefunc
== RC_COMPARE_FUNC_ALWAYS
) {
72 inst
->U
.I
.SrcReg
[0].File
= RC_FILE_NONE
;
73 inst
->U
.I
.SrcReg
[0].Swizzle
= RC_SWIZZLE_1111
;
75 inst
->U
.I
.SrcReg
[0] = shadow_ambient(c
, inst
->U
.I
.TexSrcUnit
);
80 rc_compare_func comparefunc
= compiler
->state
.unit
[inst
->U
.I
.TexSrcUnit
].texture_compare_func
;
81 unsigned int depthmode
= compiler
->state
.unit
[inst
->U
.I
.TexSrcUnit
].depth_texture_mode
;
82 struct rc_instruction
* inst_rcp
= rc_insert_new_instruction(c
, inst
);
83 struct rc_instruction
* inst_mad
= rc_insert_new_instruction(c
, inst_rcp
);
84 struct rc_instruction
* inst_cmp
= rc_insert_new_instruction(c
, inst_mad
);
87 inst_rcp
->U
.I
.Opcode
= RC_OPCODE_RCP
;
88 inst_rcp
->U
.I
.DstReg
.File
= RC_FILE_TEMPORARY
;
89 inst_rcp
->U
.I
.DstReg
.Index
= rc_find_free_temporary(c
);
90 inst_rcp
->U
.I
.DstReg
.WriteMask
= RC_MASK_W
;
91 inst_rcp
->U
.I
.SrcReg
[0] = inst
->U
.I
.SrcReg
[0];
92 inst_rcp
->U
.I
.SrcReg
[0].Swizzle
= RC_SWIZZLE_WWWW
;
94 inst_cmp
->U
.I
.DstReg
= inst
->U
.I
.DstReg
;
95 inst
->U
.I
.DstReg
.File
= RC_FILE_TEMPORARY
;
96 inst
->U
.I
.DstReg
.Index
= rc_find_free_temporary(c
);
97 inst
->U
.I
.DstReg
.WriteMask
= RC_MASK_XYZW
;
99 inst_mad
->U
.I
.Opcode
= RC_OPCODE_MAD
;
100 inst_mad
->U
.I
.DstReg
.File
= RC_FILE_TEMPORARY
;
101 inst_mad
->U
.I
.DstReg
.Index
= rc_find_free_temporary(c
);
102 inst_mad
->U
.I
.SrcReg
[0] = inst
->U
.I
.SrcReg
[0];
103 inst_mad
->U
.I
.SrcReg
[0].Swizzle
= RC_SWIZZLE_ZZZZ
;
104 inst_mad
->U
.I
.SrcReg
[1].File
= RC_FILE_TEMPORARY
;
105 inst_mad
->U
.I
.SrcReg
[1].Index
= inst_rcp
->U
.I
.DstReg
.Index
;
106 inst_mad
->U
.I
.SrcReg
[1].Swizzle
= RC_SWIZZLE_WWWW
;
107 inst_mad
->U
.I
.SrcReg
[2].File
= RC_FILE_TEMPORARY
;
108 inst_mad
->U
.I
.SrcReg
[2].Index
= inst
->U
.I
.DstReg
.Index
;
109 if (depthmode
== 0) /* GL_LUMINANCE */
110 inst_mad
->U
.I
.SrcReg
[2].Swizzle
= RC_MAKE_SWIZZLE(RC_SWIZZLE_X
, RC_SWIZZLE_Y
, RC_SWIZZLE_Z
, RC_SWIZZLE_Z
);
111 else if (depthmode
== 2) /* GL_ALPHA */
112 inst_mad
->U
.I
.SrcReg
[2].Swizzle
= RC_SWIZZLE_WWWW
;
114 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
115 * r < tex <=> -tex+r < 0
116 * r >= tex <=> not (-tex+r < 0 */
117 if (comparefunc
== RC_COMPARE_FUNC_LESS
|| comparefunc
== RC_COMPARE_FUNC_GEQUAL
)
118 inst_mad
->U
.I
.SrcReg
[2].Negate
= inst_mad
->U
.I
.SrcReg
[2].Negate
^ RC_MASK_XYZW
;
120 inst_mad
->U
.I
.SrcReg
[0].Negate
= inst_mad
->U
.I
.SrcReg
[0].Negate
^ RC_MASK_XYZW
;
122 inst_cmp
->U
.I
.Opcode
= RC_OPCODE_CMP
;
123 /* DstReg has been filled out above */
124 inst_cmp
->U
.I
.SrcReg
[0].File
= RC_FILE_TEMPORARY
;
125 inst_cmp
->U
.I
.SrcReg
[0].Index
= inst_mad
->U
.I
.DstReg
.Index
;
127 if (comparefunc
== RC_COMPARE_FUNC_LESS
|| comparefunc
== RC_COMPARE_FUNC_GREATER
) {
135 inst_cmp
->U
.I
.SrcReg
[pass
].File
= RC_FILE_NONE
;
136 inst_cmp
->U
.I
.SrcReg
[pass
].Swizzle
= RC_SWIZZLE_1111
;
137 inst_cmp
->U
.I
.SrcReg
[fail
] = shadow_ambient(c
, inst
->U
.I
.TexSrcUnit
);
141 /* Cannot write texture to output registers */
142 if (inst
->U
.I
.Opcode
!= RC_OPCODE_KIL
&& inst
->U
.I
.DstReg
.File
!= RC_FILE_TEMPORARY
) {
143 struct rc_instruction
* inst_mov
= rc_insert_new_instruction(c
, inst
);
145 inst_mov
->U
.I
.Opcode
= RC_OPCODE_MOV
;
146 inst_mov
->U
.I
.DstReg
= inst
->U
.I
.DstReg
;
147 inst_mov
->U
.I
.SrcReg
[0].File
= RC_FILE_TEMPORARY
;
148 inst_mov
->U
.I
.SrcReg
[0].Index
= rc_find_free_temporary(c
);
150 inst
->U
.I
.DstReg
.File
= RC_FILE_TEMPORARY
;
151 inst
->U
.I
.DstReg
.Index
= inst_mov
->U
.I
.SrcReg
[0].Index
;
152 inst
->U
.I
.DstReg
.WriteMask
= RC_MASK_XYZW
;
155 /* Cannot read texture coordinate from constants file */
156 if (inst
->U
.I
.SrcReg
[0].File
!= RC_FILE_TEMPORARY
&& inst
->U
.I
.SrcReg
[0].File
!= RC_FILE_INPUT
) {
157 struct rc_instruction
* inst_mov
= rc_insert_new_instruction(c
, inst
->Prev
);
159 inst_mov
->U
.I
.Opcode
= RC_OPCODE_MOV
;
160 inst_mov
->U
.I
.DstReg
.File
= RC_FILE_TEMPORARY
;
161 inst_mov
->U
.I
.DstReg
.Index
= rc_find_free_temporary(c
);
162 inst_mov
->U
.I
.SrcReg
[0] = inst
->U
.I
.SrcReg
[0];
164 reset_srcreg(&inst
->U
.I
.SrcReg
[0]);
165 inst
->U
.I
.SrcReg
[0].File
= RC_FILE_TEMPORARY
;
166 inst
->U
.I
.SrcReg
[0].Index
= inst_mov
->U
.I
.DstReg
.Index
;
173 * Rewrite IF instructions to use the ALU result special register.
175 int r500_transform_IF(
176 struct radeon_compiler
* c
,
177 struct rc_instruction
* inst
,
180 if (inst
->U
.I
.Opcode
!= RC_OPCODE_IF
)
183 struct rc_instruction
* inst_mov
= rc_insert_new_instruction(c
, inst
->Prev
);
184 inst_mov
->U
.I
.Opcode
= RC_OPCODE_MOV
;
185 inst_mov
->U
.I
.DstReg
.WriteMask
= 0;
186 inst_mov
->U
.I
.WriteALUResult
= RC_ALURESULT_W
;
187 inst_mov
->U
.I
.ALUResultCompare
= RC_COMPARE_FUNC_NOTEQUAL
;
188 inst_mov
->U
.I
.SrcReg
[0] = inst
->U
.I
.SrcReg
[0];
189 inst_mov
->U
.I
.SrcReg
[0].Swizzle
= combine_swizzles4(inst_mov
->U
.I
.SrcReg
[0].Swizzle
,
190 RC_SWIZZLE_UNUSED
, RC_SWIZZLE_UNUSED
, RC_SWIZZLE_UNUSED
, RC_SWIZZLE_X
);
192 inst
->U
.I
.SrcReg
[0].File
= RC_FILE_SPECIAL
;
193 inst
->U
.I
.SrcReg
[0].Index
= RC_SPECIAL_ALU_RESULT
;
194 inst
->U
.I
.SrcReg
[0].Swizzle
= RC_SWIZZLE_XYZW
;
195 inst
->U
.I
.SrcReg
[0].Negate
= 0;
200 static int r500_swizzle_is_native(rc_opcode opcode
, struct rc_src_register reg
)
202 unsigned int relevant
;
205 if (opcode
== RC_OPCODE_TEX
||
206 opcode
== RC_OPCODE_TXB
||
207 opcode
== RC_OPCODE_TXP
||
208 opcode
== RC_OPCODE_KIL
) {
212 if (opcode
== RC_OPCODE_KIL
&& (reg
.Swizzle
!= RC_SWIZZLE_XYZW
|| reg
.Negate
!= RC_MASK_NONE
))
216 reg
.Negate
^= RC_MASK_XYZW
;
218 for(i
= 0; i
< 4; ++i
) {
219 unsigned int swz
= GET_SWZ(reg
.Swizzle
, i
);
220 if (swz
== RC_SWIZZLE_UNUSED
) {
221 reg
.Negate
&= ~(1 << i
);
232 } else if (opcode
== RC_OPCODE_DDX
|| opcode
== RC_OPCODE_DDY
) {
233 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
234 * if it doesn't fit perfectly into a .xyzw case... */
235 if (reg
.Swizzle
== RC_SWIZZLE_XYZW
&& !reg
.Abs
&& !reg
.Negate
)
240 /* ALU instructions support almost everything */
245 for(i
= 0; i
< 3; ++i
) {
246 unsigned int swz
= GET_SWZ(reg
.Swizzle
, i
);
247 if (swz
!= RC_SWIZZLE_UNUSED
&& swz
!= RC_SWIZZLE_ZERO
)
250 if ((reg
.Negate
& relevant
) && ((reg
.Negate
& relevant
) != relevant
))
258 * Split source register access.
260 * The only thing we *cannot* do in an ALU instruction is per-component
263 static void r500_swizzle_split(struct rc_src_register src
, unsigned int usemask
,
264 struct rc_swizzle_split
* split
)
266 unsigned int negatebase
[2] = { 0, 0 };
269 for(i
= 0; i
< 4; ++i
) {
270 unsigned int swz
= GET_SWZ(src
.Swizzle
, i
);
271 if (swz
== RC_SWIZZLE_UNUSED
|| !GET_BIT(usemask
, i
))
273 negatebase
[GET_BIT(src
.Negate
, i
)] |= 1 << i
;
276 split
->NumPhases
= 0;
278 for(i
= 0; i
<= 1; ++i
) {
282 split
->Phase
[split
->NumPhases
++] = negatebase
[i
];
286 struct rc_swizzle_caps r500_swizzle_caps
= {
287 .IsNative
= r500_swizzle_is_native
,
288 .Split
= r500_swizzle_split
291 static char *toswiz(int swiz_val
) {
305 static char *toop(int op_val
)
309 case 0: str
= "MAD"; break;
310 case 1: str
= "DP3"; break;
311 case 2: str
= "DP4"; break;
312 case 3: str
= "D2A"; break;
313 case 4: str
= "MIN"; break;
314 case 5: str
= "MAX"; break;
315 case 6: str
= "Reserved"; break;
316 case 7: str
= "CND"; break;
317 case 8: str
= "CMP"; break;
318 case 9: str
= "FRC"; break;
319 case 10: str
= "SOP"; break;
320 case 11: str
= "MDH"; break;
321 case 12: str
= "MDV"; break;
326 static char *to_alpha_op(int op_val
)
330 case 0: str
= "MAD"; break;
331 case 1: str
= "DP"; break;
332 case 2: str
= "MIN"; break;
333 case 3: str
= "MAX"; break;
334 case 4: str
= "Reserved"; break;
335 case 5: str
= "CND"; break;
336 case 6: str
= "CMP"; break;
337 case 7: str
= "FRC"; break;
338 case 8: str
= "EX2"; break;
339 case 9: str
= "LN2"; break;
340 case 10: str
= "RCP"; break;
341 case 11: str
= "RSQ"; break;
342 case 12: str
= "SIN"; break;
343 case 13: str
= "COS"; break;
344 case 14: str
= "MDH"; break;
345 case 15: str
= "MDV"; break;
350 static char *to_mask(int val
)
354 case 0: str
= "NONE"; break;
355 case 1: str
= "R"; break;
356 case 2: str
= "G"; break;
357 case 3: str
= "RG"; break;
358 case 4: str
= "B"; break;
359 case 5: str
= "RB"; break;
360 case 6: str
= "GB"; break;
361 case 7: str
= "RGB"; break;
362 case 8: str
= "A"; break;
363 case 9: str
= "AR"; break;
364 case 10: str
= "AG"; break;
365 case 11: str
= "ARG"; break;
366 case 12: str
= "AB"; break;
367 case 13: str
= "ARB"; break;
368 case 14: str
= "AGB"; break;
369 case 15: str
= "ARGB"; break;
374 static char *to_texop(int val
)
377 case 0: return "NOP";
379 case 2: return "TEXKILL";
380 case 3: return "PROJ";
381 case 4: return "LODBIAS";
382 case 5: return "LOD";
383 case 6: return "DXDY";
388 void r500FragmentProgramDump(struct rX00_fragment_program_code
*c
)
390 struct r500_fragment_program_code
*code
= &c
->code
.r500
;
391 fprintf(stderr
, "R500 Fragment Program:\n--------\n");
398 for (n
= 0; n
< code
->inst_end
+1; n
++) {
399 inst0
= inst
= code
->inst
[n
].inst0
;
400 fprintf(stderr
,"%d\t0:CMN_INST 0x%08x:", n
, inst
);
402 case R500_INST_TYPE_ALU
: str
= "ALU"; break;
403 case R500_INST_TYPE_OUT
: str
= "OUT"; break;
404 case R500_INST_TYPE_FC
: str
= "FC"; break;
405 case R500_INST_TYPE_TEX
: str
= "TEX"; break;
407 fprintf(stderr
,"%s %s %s %s %s ", str
,
408 inst
& R500_INST_TEX_SEM_WAIT
? "TEX_WAIT" : "",
409 inst
& R500_INST_LAST
? "LAST" : "",
410 inst
& R500_INST_NOP
? "NOP" : "",
411 inst
& R500_INST_ALU_WAIT
? "ALU WAIT" : "");
412 fprintf(stderr
,"wmask: %s omask: %s\n", to_mask((inst
>> 11) & 0xf),
413 to_mask((inst
>> 15) & 0xf));
415 switch(inst0
& 0x3) {
418 fprintf(stderr
,"\t1:RGB_ADDR 0x%08x:", code
->inst
[n
].inst1
);
419 inst
= code
->inst
[n
].inst1
;
421 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
422 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
423 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
424 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
427 fprintf(stderr
,"\t2:ALPHA_ADDR 0x%08x:", code
->inst
[n
].inst2
);
428 inst
= code
->inst
[n
].inst2
;
429 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
430 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
431 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
432 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
434 fprintf(stderr
,"\t3 RGB_INST: 0x%08x:", code
->inst
[n
].inst3
);
435 inst
= code
->inst
[n
].inst3
;
436 fprintf(stderr
,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
437 (inst
) & 0x3, toswiz((inst
>> 2) & 0x7), toswiz((inst
>> 5) & 0x7), toswiz((inst
>> 8) & 0x7),
439 (inst
>> 13) & 0x3, toswiz((inst
>> 15) & 0x7), toswiz((inst
>> 18) & 0x7), toswiz((inst
>> 21) & 0x7),
440 (inst
>> 24) & 0x3, (inst
>> 29) & 0x3);
443 fprintf(stderr
,"\t4 ALPHA_INST:0x%08x:", code
->inst
[n
].inst4
);
444 inst
= code
->inst
[n
].inst4
;
445 fprintf(stderr
,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst
& 0xf),
446 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
447 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), (inst
>> 17) & 0x3,
448 (inst
>> 19) & 0x3, toswiz((inst
>> 21) & 0x7), (inst
>> 24) & 0x3,
452 fprintf(stderr
,"\t5 RGBA_INST: 0x%08x:", code
->inst
[n
].inst5
);
453 inst
= code
->inst
[n
].inst5
;
454 fprintf(stderr
,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst
& 0xf),
455 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
456 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), toswiz((inst
>> 17) & 0x7), toswiz((inst
>> 20) & 0x7),
458 (inst
>> 25) & 0x3, toswiz((inst
>> 27) & 0x7), (inst
>> 30) & 0x3);
463 inst
= code
->inst
[n
].inst1
;
464 fprintf(stderr
,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst
, (inst
>> 16) & 0xf,
465 to_texop((inst
>> 22) & 0x7), (inst
& (1<<25)) ? "ACQ" : "",
466 (inst
& (1<<26)) ? "IGNUNC" : "", (inst
& (1<<27)) ? "UNSCALED" : "SCALED");
467 inst
= code
->inst
[n
].inst2
;
468 fprintf(stderr
,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst
,
469 inst
& 127, inst
& (1<<7) ? "(rel)" : "",
470 toswiz((inst
>> 8) & 0x3), toswiz((inst
>> 10) & 0x3),
471 toswiz((inst
>> 12) & 0x3), toswiz((inst
>> 14) & 0x3),
472 (inst
>> 16) & 127, inst
& (1<<23) ? "(rel)" : "",
473 toswiz((inst
>> 24) & 0x3), toswiz((inst
>> 26) & 0x3),
474 toswiz((inst
>> 28) & 0x3), toswiz((inst
>> 30) & 0x3));
476 fprintf(stderr
,"\t3:TEX_DXDY: 0x%08x\n", code
->inst
[n
].inst3
);
479 fprintf(stderr
,"\n");