Merge remote branch 'origin/master' into pipe-video
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / radeon_optimize.c
1 /*
2 * Copyright (C) 2009 Nicolai Haehnle.
3 * Copyright 2010 Tom Stellard <tstellar@gmail.com>
4 *
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sublicense, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28
29 #include "radeon_dataflow.h"
30
31 #include "radeon_compiler.h"
32 #include "radeon_compiler_util.h"
33 #include "radeon_swizzle.h"
34
35 struct src_clobbered_reads_cb_data {
36 rc_register_file File;
37 unsigned int Index;
38 unsigned int Mask;
39 struct rc_reader_data * ReaderData;
40 };
41
42 typedef void (*rc_presub_replace_fn)(struct rc_instruction *,
43 struct rc_instruction *,
44 unsigned int);
45
46 static struct rc_src_register chain_srcregs(struct rc_src_register outer, struct rc_src_register inner)
47 {
48 struct rc_src_register combine;
49 combine.File = inner.File;
50 combine.Index = inner.Index;
51 combine.RelAddr = inner.RelAddr;
52 if (outer.Abs) {
53 combine.Abs = 1;
54 combine.Negate = outer.Negate;
55 } else {
56 combine.Abs = inner.Abs;
57 combine.Negate = 0;
58 for(unsigned int chan = 0; chan < 4; ++chan) {
59 unsigned int swz = GET_SWZ(outer.Swizzle, chan);
60 if (swz < 4)
61 combine.Negate |= GET_BIT(inner.Negate, swz) << chan;
62 }
63 combine.Negate ^= outer.Negate;
64 }
65 combine.Swizzle = combine_swizzles(inner.Swizzle, outer.Swizzle);
66 return combine;
67 }
68
69 static void copy_propagate_scan_read(void * data, struct rc_instruction * inst,
70 struct rc_src_register * src)
71 {
72 rc_register_file file = src->File;
73 struct rc_reader_data * reader_data = data;
74 const struct rc_opcode_info * info = rc_get_opcode_info(inst->U.I.Opcode);
75
76 /* It is possible to do copy propigation in this situation,
77 * just not right now, see peephole_add_presub_inv() */
78 if (reader_data->Writer->U.I.PreSub.Opcode != RC_PRESUB_NONE &&
79 (info->NumSrcRegs > 2 || info->HasTexture)) {
80 reader_data->Abort = 1;
81 return;
82 }
83
84 /* XXX This could probably be handled better. */
85 if (file == RC_FILE_ADDRESS) {
86 reader_data->Abort = 1;
87 return;
88 }
89
90 /* These instructions cannot read from the constants file.
91 * see radeonTransformTEX()
92 */
93 if(reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_TEMPORARY &&
94 reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_INPUT &&
95 (inst->U.I.Opcode == RC_OPCODE_TEX ||
96 inst->U.I.Opcode == RC_OPCODE_TXB ||
97 inst->U.I.Opcode == RC_OPCODE_TXP ||
98 inst->U.I.Opcode == RC_OPCODE_KIL)){
99 reader_data->Abort = 1;
100 return;
101 }
102 }
103
104 static void src_clobbered_reads_cb(
105 void * data,
106 struct rc_instruction * inst,
107 struct rc_src_register * src)
108 {
109 struct src_clobbered_reads_cb_data * sc_data = data;
110
111 if (src->File == sc_data->File
112 && src->Index == sc_data->Index
113 && (rc_swizzle_to_writemask(src->Swizzle) & sc_data->Mask)) {
114
115 sc_data->ReaderData->AbortOnRead = 1;
116 }
117
118 if (src->RelAddr && sc_data->File == RC_FILE_ADDRESS) {
119 sc_data->ReaderData->AbortOnRead = 1;
120 }
121 }
122
123 static void is_src_clobbered_scan_write(
124 void * data,
125 struct rc_instruction * inst,
126 rc_register_file file,
127 unsigned int index,
128 unsigned int mask)
129 {
130 struct src_clobbered_reads_cb_data sc_data;
131 struct rc_reader_data * reader_data = data;
132 sc_data.File = file;
133 sc_data.Index = index;
134 sc_data.Mask = mask;
135 sc_data.ReaderData = reader_data;
136 rc_for_all_reads_src(reader_data->Writer,
137 src_clobbered_reads_cb, &sc_data);
138 }
139
140 static void copy_propagate(struct radeon_compiler * c, struct rc_instruction * inst_mov)
141 {
142 struct rc_reader_data reader_data;
143 unsigned int i;
144
145 if (inst_mov->U.I.DstReg.File != RC_FILE_TEMPORARY ||
146 inst_mov->U.I.DstReg.RelAddr ||
147 inst_mov->U.I.WriteALUResult ||
148 inst_mov->U.I.SaturateMode)
149 return;
150
151 /* Get a list of all the readers of this MOV instruction. */
152 rc_get_readers_normal(c, inst_mov, &reader_data,
153 copy_propagate_scan_read, is_src_clobbered_scan_write);
154
155 if (reader_data.Abort || reader_data.ReaderCount == 0)
156 return;
157
158 /* Propagate the MOV instruction. */
159 for (i = 0; i < reader_data.ReaderCount; i++) {
160 struct rc_instruction * inst = reader_data.Readers[i].Inst;
161 *reader_data.Readers[i].Src = chain_srcregs(*reader_data.Readers[i].Src, inst_mov->U.I.SrcReg[0]);
162
163 if (inst_mov->U.I.SrcReg[0].File == RC_FILE_PRESUB)
164 inst->U.I.PreSub = inst_mov->U.I.PreSub;
165 }
166
167 /* Finally, remove the original MOV instruction */
168 rc_remove_instruction(inst_mov);
169 }
170
171 /**
172 * Check if a source register is actually always the same
173 * swizzle constant.
174 */
175 static int is_src_uniform_constant(struct rc_src_register src,
176 rc_swizzle * pswz, unsigned int * pnegate)
177 {
178 int have_used = 0;
179
180 if (src.File != RC_FILE_NONE) {
181 *pswz = 0;
182 return 0;
183 }
184
185 for(unsigned int chan = 0; chan < 4; ++chan) {
186 unsigned int swz = GET_SWZ(src.Swizzle, chan);
187 if (swz < 4) {
188 *pswz = 0;
189 return 0;
190 }
191 if (swz == RC_SWIZZLE_UNUSED)
192 continue;
193
194 if (!have_used) {
195 *pswz = swz;
196 *pnegate = GET_BIT(src.Negate, chan);
197 have_used = 1;
198 } else {
199 if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
200 *pswz = 0;
201 return 0;
202 }
203 }
204 }
205
206 return 1;
207 }
208
209 static void constant_folding_mad(struct rc_instruction * inst)
210 {
211 rc_swizzle swz = 0;
212 unsigned int negate= 0;
213
214 if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) {
215 if (swz == RC_SWIZZLE_ZERO) {
216 inst->U.I.Opcode = RC_OPCODE_MUL;
217 return;
218 }
219 }
220
221 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
222 if (swz == RC_SWIZZLE_ONE) {
223 inst->U.I.Opcode = RC_OPCODE_ADD;
224 if (negate)
225 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
226 inst->U.I.SrcReg[1] = inst->U.I.SrcReg[2];
227 return;
228 } else if (swz == RC_SWIZZLE_ZERO) {
229 inst->U.I.Opcode = RC_OPCODE_MOV;
230 inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
231 return;
232 }
233 }
234
235 if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
236 if (swz == RC_SWIZZLE_ONE) {
237 inst->U.I.Opcode = RC_OPCODE_ADD;
238 if (negate)
239 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
240 inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
241 return;
242 } else if (swz == RC_SWIZZLE_ZERO) {
243 inst->U.I.Opcode = RC_OPCODE_MOV;
244 inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
245 return;
246 }
247 }
248 }
249
250 static void constant_folding_mul(struct rc_instruction * inst)
251 {
252 rc_swizzle swz = 0;
253 unsigned int negate = 0;
254
255 if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
256 if (swz == RC_SWIZZLE_ONE) {
257 inst->U.I.Opcode = RC_OPCODE_MOV;
258 inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
259 if (negate)
260 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
261 return;
262 } else if (swz == RC_SWIZZLE_ZERO) {
263 inst->U.I.Opcode = RC_OPCODE_MOV;
264 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
265 return;
266 }
267 }
268
269 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
270 if (swz == RC_SWIZZLE_ONE) {
271 inst->U.I.Opcode = RC_OPCODE_MOV;
272 if (negate)
273 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
274 return;
275 } else if (swz == RC_SWIZZLE_ZERO) {
276 inst->U.I.Opcode = RC_OPCODE_MOV;
277 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
278 return;
279 }
280 }
281 }
282
283 static void constant_folding_add(struct rc_instruction * inst)
284 {
285 rc_swizzle swz = 0;
286 unsigned int negate = 0;
287
288 if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
289 if (swz == RC_SWIZZLE_ZERO) {
290 inst->U.I.Opcode = RC_OPCODE_MOV;
291 inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
292 return;
293 }
294 }
295
296 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
297 if (swz == RC_SWIZZLE_ZERO) {
298 inst->U.I.Opcode = RC_OPCODE_MOV;
299 return;
300 }
301 }
302 }
303
304 /**
305 * Replace 0.0, 1.0 and 0.5 immediate constants by their
306 * respective swizzles. Simplify instructions like ADD dst, src, 0;
307 */
308 static void constant_folding(struct radeon_compiler * c, struct rc_instruction * inst)
309 {
310 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
311 unsigned int i;
312
313 /* Replace 0.0, 1.0 and 0.5 immediates by their explicit swizzles */
314 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
315 struct rc_constant * constant;
316 struct rc_src_register newsrc;
317 int have_real_reference;
318
319 if (inst->U.I.SrcReg[src].File != RC_FILE_CONSTANT ||
320 inst->U.I.SrcReg[src].RelAddr ||
321 inst->U.I.SrcReg[src].Index >= c->Program.Constants.Count)
322 continue;
323
324 constant =
325 &c->Program.Constants.Constants[inst->U.I.SrcReg[src].Index];
326
327 if (constant->Type != RC_CONSTANT_IMMEDIATE)
328 continue;
329
330 newsrc = inst->U.I.SrcReg[src];
331 have_real_reference = 0;
332 for(unsigned int chan = 0; chan < 4; ++chan) {
333 unsigned int swz = GET_SWZ(newsrc.Swizzle, chan);
334 unsigned int newswz;
335 float imm;
336 float baseimm;
337
338 if (swz >= 4)
339 continue;
340
341 imm = constant->u.Immediate[swz];
342 baseimm = imm;
343 if (imm < 0.0)
344 baseimm = -baseimm;
345
346 if (baseimm == 0.0) {
347 newswz = RC_SWIZZLE_ZERO;
348 } else if (baseimm == 1.0) {
349 newswz = RC_SWIZZLE_ONE;
350 } else if (baseimm == 0.5 && c->has_half_swizzles) {
351 newswz = RC_SWIZZLE_HALF;
352 } else {
353 have_real_reference = 1;
354 continue;
355 }
356
357 SET_SWZ(newsrc.Swizzle, chan, newswz);
358 if (imm < 0.0 && !newsrc.Abs)
359 newsrc.Negate ^= 1 << chan;
360 }
361
362 if (!have_real_reference) {
363 newsrc.File = RC_FILE_NONE;
364 newsrc.Index = 0;
365 }
366
367 /* don't make the swizzle worse */
368 if (!c->SwizzleCaps->IsNative(inst->U.I.Opcode, newsrc) &&
369 c->SwizzleCaps->IsNative(inst->U.I.Opcode, inst->U.I.SrcReg[src]))
370 continue;
371
372 inst->U.I.SrcReg[src] = newsrc;
373 }
374
375 /* Simplify instructions based on constants */
376 if (inst->U.I.Opcode == RC_OPCODE_MAD)
377 constant_folding_mad(inst);
378
379 /* note: MAD can simplify to MUL or ADD */
380 if (inst->U.I.Opcode == RC_OPCODE_MUL)
381 constant_folding_mul(inst);
382 else if (inst->U.I.Opcode == RC_OPCODE_ADD)
383 constant_folding_add(inst);
384
385 /* In case this instruction has been converted, make sure all of the
386 * registers that are no longer used are empty. */
387 opcode = rc_get_opcode_info(inst->U.I.Opcode);
388 for(i = opcode->NumSrcRegs; i < 3; i++) {
389 memset(&inst->U.I.SrcReg[i], 0, sizeof(struct rc_src_register));
390 }
391 }
392
393 /**
394 * If src and dst use the same register, this function returns a writemask that
395 * indicates wich components are read by src. Otherwise zero is returned.
396 */
397 static unsigned int src_reads_dst_mask(struct rc_src_register src,
398 struct rc_dst_register dst)
399 {
400 if (dst.File != src.File || dst.Index != src.Index) {
401 return 0;
402 }
403 return rc_swizzle_to_writemask(src.Swizzle);
404 }
405
406 /* Return 1 if the source registers has a constant swizzle (e.g. 0, 0.5, 1.0)
407 * in any of its channels. Return 0 otherwise. */
408 static int src_has_const_swz(struct rc_src_register src) {
409 int chan;
410 for(chan = 0; chan < 4; chan++) {
411 unsigned int swz = GET_SWZ(src.Swizzle, chan);
412 if (swz == RC_SWIZZLE_ZERO || swz == RC_SWIZZLE_HALF
413 || swz == RC_SWIZZLE_ONE) {
414 return 1;
415 }
416 }
417 return 0;
418 }
419
420 static void presub_scan_read(
421 void * data,
422 struct rc_instruction * inst,
423 struct rc_src_register * src)
424 {
425 struct rc_reader_data * reader_data = data;
426 const struct rc_opcode_info * info =
427 rc_get_opcode_info(inst->U.I.Opcode);
428 /* XXX: There are some situations where instructions
429 * with more than 2 src registers can use the
430 * presubtract select, but to keep things simple we
431 * will disable presubtract on these instructions for
432 * now. */
433 if (info->NumSrcRegs > 2 || info->HasTexture) {
434 reader_data->Abort = 1;
435 return;
436 }
437
438 /* We can't use more than one presubtract value in an
439 * instruction, unless the two prsubtract operations
440 * are the same and read from the same registers.
441 * XXX For now we will limit instructions to only one presubtract
442 * value.*/
443 if (inst->U.I.PreSub.Opcode != RC_PRESUB_NONE) {
444 reader_data->Abort = 1;
445 return;
446 }
447 }
448
449 static int presub_helper(
450 struct radeon_compiler * c,
451 struct rc_instruction * inst_add,
452 rc_presubtract_op presub_opcode,
453 rc_presub_replace_fn presub_replace)
454 {
455 struct rc_reader_data reader_data;
456 unsigned int i;
457
458 rc_get_readers_normal(c, inst_add, &reader_data, presub_scan_read,
459 is_src_clobbered_scan_write);
460
461 if (reader_data.Abort || reader_data.ReaderCount == 0)
462 return 0;
463
464 for(i = 0; i < reader_data.ReaderCount; i++) {
465 unsigned int src_index;
466 struct rc_reader reader = reader_data.Readers[i];
467 const struct rc_opcode_info * info =
468 rc_get_opcode_info(reader.Inst->U.I.Opcode);
469
470 for (src_index = 0; src_index < info->NumSrcRegs; src_index++) {
471 if (&reader.Inst->U.I.SrcReg[src_index] == reader.Src)
472 presub_replace(inst_add, reader.Inst, src_index);
473 }
474 }
475 return 1;
476 }
477
478 /* This function assumes that inst_add->U.I.SrcReg[0] and
479 * inst_add->U.I.SrcReg[1] aren't both negative. */
480 static void presub_replace_add(
481 struct rc_instruction * inst_add,
482 struct rc_instruction * inst_reader,
483 unsigned int src_index)
484 {
485 rc_presubtract_op presub_opcode;
486 if (inst_add->U.I.SrcReg[1].Negate || inst_add->U.I.SrcReg[0].Negate)
487 presub_opcode = RC_PRESUB_SUB;
488 else
489 presub_opcode = RC_PRESUB_ADD;
490
491 if (inst_add->U.I.SrcReg[1].Negate) {
492 inst_reader->U.I.PreSub.SrcReg[0] = inst_add->U.I.SrcReg[1];
493 inst_reader->U.I.PreSub.SrcReg[1] = inst_add->U.I.SrcReg[0];
494 } else {
495 inst_reader->U.I.PreSub.SrcReg[0] = inst_add->U.I.SrcReg[0];
496 inst_reader->U.I.PreSub.SrcReg[1] = inst_add->U.I.SrcReg[1];
497 }
498 inst_reader->U.I.PreSub.SrcReg[0].Negate = 0;
499 inst_reader->U.I.PreSub.SrcReg[1].Negate = 0;
500 inst_reader->U.I.PreSub.Opcode = presub_opcode;
501 inst_reader->U.I.SrcReg[src_index] =
502 chain_srcregs(inst_reader->U.I.SrcReg[src_index],
503 inst_reader->U.I.PreSub.SrcReg[0]);
504 inst_reader->U.I.SrcReg[src_index].File = RC_FILE_PRESUB;
505 inst_reader->U.I.SrcReg[src_index].Index = presub_opcode;
506 }
507
508 static int is_presub_candidate(struct rc_instruction * inst)
509 {
510 const struct rc_opcode_info * info = rc_get_opcode_info(inst->U.I.Opcode);
511 unsigned int i;
512
513 if (inst->U.I.PreSub.Opcode != RC_PRESUB_NONE || inst->U.I.SaturateMode)
514 return 0;
515
516 for(i = 0; i < info->NumSrcRegs; i++) {
517 if (src_reads_dst_mask(inst->U.I.SrcReg[i], inst->U.I.DstReg))
518 return 0;
519 }
520 return 1;
521 }
522
523 static int peephole_add_presub_add(
524 struct radeon_compiler * c,
525 struct rc_instruction * inst_add)
526 {
527 struct rc_src_register * src0 = NULL;
528 struct rc_src_register * src1 = NULL;
529 unsigned int i;
530
531 if (!is_presub_candidate(inst_add))
532 return 0;
533
534 if (inst_add->U.I.SrcReg[0].Swizzle != inst_add->U.I.SrcReg[1].Swizzle)
535 return 0;
536
537 /* src0 and src1 can't have absolute values only one can be negative and they must be all negative or all positive. */
538 for (i = 0; i < 2; i++) {
539 if (inst_add->U.I.SrcReg[i].Abs)
540 return 0;
541 if ((inst_add->U.I.SrcReg[i].Negate
542 & inst_add->U.I.DstReg.WriteMask) ==
543 inst_add->U.I.DstReg.WriteMask) {
544 src0 = &inst_add->U.I.SrcReg[i];
545 } else if (!src1) {
546 src1 = &inst_add->U.I.SrcReg[i];
547 } else {
548 src0 = &inst_add->U.I.SrcReg[i];
549 }
550 }
551
552 if (!src1)
553 return 0;
554
555 if (presub_helper(c, inst_add, RC_PRESUB_ADD, presub_replace_add)) {
556 rc_remove_instruction(inst_add);
557 return 1;
558 }
559 return 0;
560 }
561
562 static void presub_replace_inv(
563 struct rc_instruction * inst_add,
564 struct rc_instruction * inst_reader,
565 unsigned int src_index)
566 {
567 /* We must be careful not to modify inst_add, since it
568 * is possible it will remain part of the program.*/
569 inst_reader->U.I.PreSub.SrcReg[0] = inst_add->U.I.SrcReg[1];
570 inst_reader->U.I.PreSub.SrcReg[0].Negate = 0;
571 inst_reader->U.I.PreSub.Opcode = RC_PRESUB_INV;
572 inst_reader->U.I.SrcReg[src_index] = chain_srcregs(inst_reader->U.I.SrcReg[src_index],
573 inst_reader->U.I.PreSub.SrcReg[0]);
574
575 inst_reader->U.I.SrcReg[src_index].File = RC_FILE_PRESUB;
576 inst_reader->U.I.SrcReg[src_index].Index = RC_PRESUB_INV;
577 }
578
579 /**
580 * PRESUB_INV: ADD TEMP[0], none.1, -TEMP[1]
581 * Use the presubtract 1 - src0 for all readers of TEMP[0]. The first source
582 * of the add instruction must have the constatnt 1 swizzle. This function
583 * does not check const registers to see if their value is 1.0, so it should
584 * be called after the constant_folding optimization.
585 * @return
586 * 0 if the ADD instruction is still part of the program.
587 * 1 if the ADD instruction is no longer part of the program.
588 */
589 static int peephole_add_presub_inv(
590 struct radeon_compiler * c,
591 struct rc_instruction * inst_add)
592 {
593 unsigned int i, swz, mask;
594
595 if (!is_presub_candidate(inst_add))
596 return 0;
597
598 mask = inst_add->U.I.DstReg.WriteMask;
599
600 /* Check if src0 is 1. */
601 /* XXX It would be nice to use is_src_uniform_constant here, but that
602 * function only works if the register's file is RC_FILE_NONE */
603 for(i = 0; i < 4; i++ ) {
604 swz = GET_SWZ(inst_add->U.I.SrcReg[0].Swizzle, i);
605 if(((1 << i) & inst_add->U.I.DstReg.WriteMask)
606 && swz != RC_SWIZZLE_ONE) {
607 return 0;
608 }
609 }
610
611 /* Check src1. */
612 if ((inst_add->U.I.SrcReg[1].Negate & inst_add->U.I.DstReg.WriteMask) !=
613 inst_add->U.I.DstReg.WriteMask
614 || inst_add->U.I.SrcReg[1].Abs
615 || (inst_add->U.I.SrcReg[1].File != RC_FILE_TEMPORARY
616 && inst_add->U.I.SrcReg[1].File != RC_FILE_CONSTANT)
617 || src_has_const_swz(inst_add->U.I.SrcReg[1])) {
618
619 return 0;
620 }
621
622 if (presub_helper(c, inst_add, RC_PRESUB_INV, presub_replace_inv)) {
623 rc_remove_instruction(inst_add);
624 return 1;
625 }
626 return 0;
627 }
628
629 /**
630 * @return
631 * 0 if inst is still part of the program.
632 * 1 if inst is no longer part of the program.
633 */
634 static int peephole(struct radeon_compiler * c, struct rc_instruction * inst)
635 {
636 switch(inst->U.I.Opcode){
637 case RC_OPCODE_ADD:
638 if (c->has_presub) {
639 if(peephole_add_presub_inv(c, inst))
640 return 1;
641 if(peephole_add_presub_add(c, inst))
642 return 1;
643 }
644 break;
645 default:
646 break;
647 }
648 return 0;
649 }
650
651 void rc_optimize(struct radeon_compiler * c, void *user)
652 {
653 struct rc_instruction * inst = c->Program.Instructions.Next;
654 while(inst != &c->Program.Instructions) {
655 struct rc_instruction * cur = inst;
656 inst = inst->Next;
657
658 constant_folding(c, cur);
659
660 if(peephole(c, cur))
661 continue;
662
663 if (cur->U.I.Opcode == RC_OPCODE_MOV) {
664 copy_propagate(c, cur);
665 /* cur may no longer be part of the program */
666 }
667 }
668 }