2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
27 #include "main/glheader.h"
28 #include "main/mtypes.h"
29 #include "main/imports.h"
30 #include "main/enums.h"
31 #include "main/macros.h"
32 #include "main/context.h"
34 #include "main/simple_list.h"
37 #include "tnl/t_pipeline.h"
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "main/api_arrayelt.h"
41 #include "main/framebuffer.h"
42 #include "drivers/common/meta.h"
43 #include "program/prog_parameter.h"
44 #include "program/prog_statevars.h"
48 #include "r600_context.h"
50 #include "evergreen_state.h"
51 #include "evergreen_diff.h"
52 #include "evergreen_vertprog.h"
53 #include "evergreen_fragprog.h"
54 #include "evergreen_tex.h"
56 void evergreenUpdateStateParameters(GLcontext
* ctx
, GLuint new_state
); //same
58 void evergreenUpdateShaders(GLcontext
* ctx
)
60 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
62 /* should only happenen once, just after context is created */
63 /* TODO: shouldn't we fallback to sw here? */
64 if (!ctx
->FragmentProgram
._Current
) {
65 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
69 evergreenSelectFragmentShader(ctx
);
71 evergreenSelectVertexShader(ctx
);
72 evergreenUpdateStateParameters(ctx
, _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
);
73 context
->radeon
.NewGLState
= 0;
76 void evergreeUpdateShaders(GLcontext
* ctx
)
78 context_t
*context
= R700_CONTEXT(ctx
);
80 /* should only happenen once, just after context is created */
81 /* TODO: shouldn't we fallback to sw here? */
82 if (!ctx
->FragmentProgram
._Current
) {
83 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
87 evergreenSelectFragmentShader(ctx
);
89 evergreenSelectVertexShader(ctx
);
90 evergreenUpdateStateParameters(ctx
, _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
);
91 context
->radeon
.NewGLState
= 0;
95 * To correctly position primitives:
97 void evergreenUpdateViewportOffset(GLcontext
* ctx
) //------------------
99 context_t
*context
= R700_CONTEXT(ctx
);
100 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
101 __DRIdrawable
*dPriv
= radeon_get_drawable(&context
->radeon
);
102 GLfloat xoffset
= (GLfloat
) dPriv
->x
;
103 GLfloat yoffset
= (GLfloat
) dPriv
->y
+ dPriv
->h
;
104 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
107 GLfloat tx
= v
[MAT_TX
] + xoffset
;
108 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
;
110 if (evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
!= tx
||
111 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
!= ty
) {
112 /* Note: this should also modify whatever data the context reset
115 EVERGREEN_STATECHANGE(context
, pa
);
116 evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
= tx
;
117 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
= ty
;
120 radeonUpdateScissor(ctx
);
123 void evergreenUpdateStateParameters(GLcontext
* ctx
, GLuint new_state
) //same
125 struct evergreen_fragment_program
*fp
=
126 (struct evergreen_fragment_program
*)ctx
->FragmentProgram
._Current
;
127 struct gl_program_parameter_list
*paramList
;
129 if (!(new_state
& (_NEW_BUFFERS
| _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
)))
132 if (!ctx
->FragmentProgram
._Current
|| !fp
)
135 paramList
= ctx
->FragmentProgram
._Current
->Base
.Parameters
;
140 _mesa_load_state_parameters(ctx
, paramList
);
145 * Called by Mesa after an internal state update.
147 static void evergreenInvalidateState(GLcontext
* ctx
, GLuint new_state
) //same
149 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
151 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
153 _swrast_InvalidateState(ctx
, new_state
);
154 _swsetup_InvalidateState(ctx
, new_state
);
155 _vbo_InvalidateState(ctx
, new_state
);
156 _tnl_InvalidateState(ctx
, new_state
);
157 _ae_invalidate_state(ctx
, new_state
);
159 if (new_state
& _NEW_BUFFERS
) {
160 _mesa_update_framebuffer(ctx
);
161 /* this updates the DrawBuffer's Width/Height if it's a FBO */
162 _mesa_update_draw_buffer_bounds(ctx
);
164 EVERGREEN_STATECHANGE(context
, cb
);
165 EVERGREEN_STATECHANGE(context
, db
);
168 if (new_state
& (_NEW_LIGHT
)) {
169 EVERGREEN_STATECHANGE(context
, pa
);
170 if (ctx
->Light
.ProvokingVertex
== GL_LAST_VERTEX_CONVENTION
)
171 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, PROVOKING_VTX_LAST_bit
);
173 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, PROVOKING_VTX_LAST_bit
);
176 evergreenUpdateStateParameters(ctx
, new_state
);
178 EVERGREEN_STATECHANGE(context
, pa
);
179 EVERGREEN_STATECHANGE(context
, spi
);
181 if(GL_TRUE
== evergreen
->bEnablePerspective
)
183 /* Do scale XY and Z by 1/W0 for perspective correction on pos. For orthogonal case, set both to one. */
184 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
185 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
187 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
189 SETbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, PERSP_GRADIENT_ENA_bit
);
190 CLEARbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, LINEAR_GRADIENT_ENA_bit
);
192 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
193 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift
,
194 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask
);
198 /* For orthogonal case. */
199 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
200 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
202 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
204 CLEARbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, PERSP_GRADIENT_ENA_bit
);
205 SETbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, LINEAR_GRADIENT_ENA_bit
);
207 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
208 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift
,
209 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask
);
212 context
->radeon
.NewGLState
|= new_state
;
215 static void evergreenSetAlphaState(GLcontext
* ctx
) //same
217 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
218 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
219 uint32_t alpha_func
= REF_ALWAYS
;
220 GLboolean really_enabled
= ctx
->Color
.AlphaEnabled
;
222 EVERGREEN_STATECHANGE(context
, sx
);
224 switch (ctx
->Color
.AlphaFunc
) {
226 alpha_func
= REF_NEVER
;
229 alpha_func
= REF_LESS
;
232 alpha_func
= REF_EQUAL
;
235 alpha_func
= REF_LEQUAL
;
238 alpha_func
= REF_GREATER
;
241 alpha_func
= REF_NOTEQUAL
;
244 alpha_func
= REF_GEQUAL
;
247 /*alpha_func = REF_ALWAYS; */
248 really_enabled
= GL_FALSE
;
252 if (really_enabled
) {
253 SETfield(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, alpha_func
,
254 ALPHA_FUNC_shift
, ALPHA_FUNC_mask
);
255 SETbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
256 evergreen
->SX_ALPHA_REF
.f32All
= ctx
->Color
.AlphaRef
;
258 CLEARbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
262 static void evergreenAlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
) //same
266 evergreenSetAlphaState(ctx
);
269 static void evergreenBlendColor(GLcontext
* ctx
, const GLfloat cf
[4]) //same
271 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
272 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
274 EVERGREEN_STATECHANGE(context
, cb
);
276 evergreen
->CB_BLEND_RED
.f32All
= cf
[0];
277 evergreen
->CB_BLEND_GREEN
.f32All
= cf
[1];
278 evergreen
->CB_BLEND_BLUE
.f32All
= cf
[2];
279 evergreen
->CB_BLEND_ALPHA
.f32All
= cf
[3];
282 static int evergreenblend_factor(GLenum factor
, GLboolean is_src
) //same
292 return BLEND_DST_COLOR
;
294 case GL_ONE_MINUS_DST_COLOR
:
295 return BLEND_ONE_MINUS_DST_COLOR
;
298 return BLEND_SRC_COLOR
;
300 case GL_ONE_MINUS_SRC_COLOR
:
301 return BLEND_ONE_MINUS_SRC_COLOR
;
304 return BLEND_SRC_ALPHA
;
306 case GL_ONE_MINUS_SRC_ALPHA
:
307 return BLEND_ONE_MINUS_SRC_ALPHA
;
310 return BLEND_DST_ALPHA
;
312 case GL_ONE_MINUS_DST_ALPHA
:
313 return BLEND_ONE_MINUS_DST_ALPHA
;
315 case GL_SRC_ALPHA_SATURATE
:
316 return (is_src
) ? BLEND_SRC_ALPHA_SATURATE
: BLEND_ZERO
;
318 case GL_CONSTANT_COLOR
:
319 return BLEND_CONSTANT_COLOR
;
321 case GL_ONE_MINUS_CONSTANT_COLOR
:
322 return BLEND_ONE_MINUS_CONSTANT_COLOR
;
324 case GL_CONSTANT_ALPHA
:
325 return BLEND_CONSTANT_ALPHA
;
327 case GL_ONE_MINUS_CONSTANT_ALPHA
:
328 return BLEND_ONE_MINUS_CONSTANT_ALPHA
;
331 fprintf(stderr
, "unknown blend factor %x\n", factor
);
332 return (is_src
) ? BLEND_ONE
: BLEND_ZERO
;
337 static void evergreenSetBlendState(GLcontext
* ctx
) //diff : CB_COLOR_CONTROL, CB_BLEND0_CONTROL bits
339 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
340 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
341 uint32_t blend_reg
= 0, eqn
, eqnA
;
343 EVERGREEN_STATECHANGE(context
, cb
);
345 if (RGBA_LOGICOP_ENABLED(ctx
) || !ctx
->Color
.BlendEnabled
) {
347 BLEND_ONE
, COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
349 BLEND_ZERO
, COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
351 COMB_DST_PLUS_SRC
, COLOR_COMB_FCN_shift
, COLOR_COMB_FCN_mask
);
353 BLEND_ONE
, ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
355 BLEND_ZERO
, ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
357 COMB_DST_PLUS_SRC
, ALPHA_COMB_FCN_shift
, ALPHA_COMB_FCN_mask
);
358 //if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_R600)
359 // evergreen->CB_BLEND_CONTROL.u32All = blend_reg;
361 evergreen
->CB_BLEND0_CONTROL
.u32All
= blend_reg
;
366 evergreenblend_factor(ctx
->Color
.BlendSrcRGB
, GL_TRUE
),
367 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
369 evergreenblend_factor(ctx
->Color
.BlendDstRGB
, GL_FALSE
),
370 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
372 switch (ctx
->Color
.BlendEquationRGB
) {
374 eqn
= COMB_DST_PLUS_SRC
;
376 case GL_FUNC_SUBTRACT
:
377 eqn
= COMB_SRC_MINUS_DST
;
379 case GL_FUNC_REVERSE_SUBTRACT
:
380 eqn
= COMB_DST_MINUS_SRC
;
383 eqn
= COMB_MIN_DST_SRC
;
386 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
389 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
392 eqn
= COMB_MAX_DST_SRC
;
395 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
398 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
403 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
404 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
408 eqn
, COLOR_COMB_FCN_shift
, COLOR_COMB_FCN_mask
);
411 evergreenblend_factor(ctx
->Color
.BlendSrcA
, GL_TRUE
),
412 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
414 evergreenblend_factor(ctx
->Color
.BlendDstA
, GL_FALSE
),
415 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
417 switch (ctx
->Color
.BlendEquationA
) {
419 eqnA
= COMB_DST_PLUS_SRC
;
421 case GL_FUNC_SUBTRACT
:
422 eqnA
= COMB_SRC_MINUS_DST
;
424 case GL_FUNC_REVERSE_SUBTRACT
:
425 eqnA
= COMB_DST_MINUS_SRC
;
428 eqnA
= COMB_MIN_DST_SRC
;
431 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
434 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
437 eqnA
= COMB_MAX_DST_SRC
;
440 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
443 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
447 "[%s:%u] Invalid A blend equation (0x%04x).\n",
448 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
453 eqnA
, ALPHA_COMB_FCN_shift
, ALPHA_COMB_FCN_mask
);
455 SETbit(blend_reg
, SEPARATE_ALPHA_BLEND_bit
);
457 SETbit(blend_reg
, EG_CB_BLENDX_CONTROL_ENABLE_bit
);
459 evergreen
->CB_BLEND0_CONTROL
.u32All
= blend_reg
;
462 static void evergreenBlendEquationSeparate(GLcontext
* ctx
,
463 GLenum modeRGB
, GLenum modeA
) //same
465 evergreenSetBlendState(ctx
);
468 static void evergreenBlendFuncSeparate(GLcontext
* ctx
,
469 GLenum sfactorRGB
, GLenum dfactorRGB
,
470 GLenum sfactorA
, GLenum dfactorA
) //same
472 evergreenSetBlendState(ctx
);
475 static GLuint
evergreen_translate_logicop(GLenum logicop
) //same
484 case GL_COPY_INVERTED
:
504 case GL_AND_INVERTED
:
511 fprintf(stderr
, "unknown blend logic operation %x\n", logicop
);
516 static void evergreenSetLogicOpState(GLcontext
*ctx
) //diff : CB_COLOR_CONTROL.ROP3 is actually same bits.
518 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
519 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
521 EVERGREEN_STATECHANGE(context
, cb
);
523 if (RGBA_LOGICOP_ENABLED(ctx
))
524 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
,
525 evergreen_translate_logicop(ctx
->Color
.LogicOp
),
526 EG_CB_COLOR_CONTROL__ROP3_shift
,
527 EG_CB_COLOR_CONTROL__ROP3_mask
);
529 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, 0xCC,
530 EG_CB_COLOR_CONTROL__ROP3_shift
,
531 EG_CB_COLOR_CONTROL__ROP3_mask
);
534 static void evergreenClipPlane( GLcontext
*ctx
, GLenum plane
, const GLfloat
*eq
) //same , but PA_CL_UCP_0_ offset diff
536 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
537 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
541 p
= (GLint
) plane
- (GLint
) GL_CLIP_PLANE0
;
542 ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
544 EVERGREEN_STATECHANGE(context
, pa
);
546 evergreen
->ucp
[p
].PA_CL_UCP_0_X
.u32All
= ip
[0];
547 evergreen
->ucp
[p
].PA_CL_UCP_0_Y
.u32All
= ip
[1];
548 evergreen
->ucp
[p
].PA_CL_UCP_0_Z
.u32All
= ip
[2];
549 evergreen
->ucp
[p
].PA_CL_UCP_0_W
.u32All
= ip
[3];
552 static void evergreenSetClipPlaneState(GLcontext
* ctx
, GLenum cap
, GLboolean state
) //diff in func calls
554 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
555 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
558 p
= cap
- GL_CLIP_PLANE0
;
560 EVERGREEN_STATECHANGE(context
, pa
);
563 evergreen
->PA_CL_CLIP_CNTL
.u32All
|= (UCP_ENA_0_bit
<< p
);
564 evergreen
->ucp
[p
].enabled
= GL_TRUE
;
565 evergreenClipPlane(ctx
, cap
, NULL
);
567 evergreen
->PA_CL_CLIP_CNTL
.u32All
&= ~(UCP_ENA_0_bit
<< p
);
568 evergreen
->ucp
[p
].enabled
= GL_FALSE
;
572 static void evergreenSetDBRenderState(GLcontext
* ctx
)
574 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
575 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
576 struct evergreen_fragment_program
*fp
=
577 (struct evergreen_fragment_program
*)(ctx
->FragmentProgram
._Current
);
579 EVERGREEN_STATECHANGE(context
, db
);
581 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
,
582 DUAL_EXPORT_ENABLE_bit
);
583 SETfield(evergreen
->DB_SHADER_CONTROL
.u32All
, EARLY_Z_THEN_LATE_Z
,
586 /* XXX need to enable htile for hiz/s */
587 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
588 FORCE_HIZ_ENABLE_shift
,
589 FORCE_HIZ_ENABLE_mask
);
590 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
591 FORCE_HIS_ENABLE0_shift
,
592 FORCE_HIS_ENABLE0_mask
);
593 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
594 FORCE_HIS_ENABLE1_shift
,
595 FORCE_HIS_ENABLE1_mask
);
597 if (context
->radeon
.query
.current
)
599 SETbit(evergreen
->DB_RENDER_OVERRIDE
.u32All
, NOOP_CULL_DISABLE_bit
);
600 SETbit(evergreen
->DB_COUNT_CONTROL
.u32All
,
601 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit
);
605 CLEARbit(evergreen
->DB_RENDER_OVERRIDE
.u32All
, NOOP_CULL_DISABLE_bit
);
606 CLEARbit(evergreen
->DB_COUNT_CONTROL
.u32All
,
607 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit
);
612 if (fp
->r700Shader
.killIsUsed
)
614 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, KILL_ENABLE_bit
);
618 CLEARbit(evergreen
->DB_SHADER_CONTROL
.u32All
, KILL_ENABLE_bit
);
621 if (fp
->r700Shader
.depthIsExported
)
623 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, Z_EXPORT_ENABLE_bit
);
627 CLEARbit(evergreen
->DB_SHADER_CONTROL
.u32All
, Z_EXPORT_ENABLE_bit
);
632 void evergreenUpdateShaderStates(GLcontext
* ctx
)
634 evergreenSetDBRenderState(ctx
);
635 evergreenUpdateTextureState(ctx
);
638 static void evergreenSetDepthState(GLcontext
* ctx
) //same
640 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
641 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
643 EVERGREEN_STATECHANGE(context
, db
);
647 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_ENABLE_bit
);
650 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
654 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
657 switch (ctx
->Depth
.Func
)
660 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_NEVER
,
661 ZFUNC_shift
, ZFUNC_mask
);
664 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_LESS
,
665 ZFUNC_shift
, ZFUNC_mask
);
668 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_EQUAL
,
669 ZFUNC_shift
, ZFUNC_mask
);
672 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_LEQUAL
,
673 ZFUNC_shift
, ZFUNC_mask
);
676 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_GREATER
,
677 ZFUNC_shift
, ZFUNC_mask
);
680 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_NOTEQUAL
,
681 ZFUNC_shift
, ZFUNC_mask
);
684 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_GEQUAL
,
685 ZFUNC_shift
, ZFUNC_mask
);
688 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
689 ZFUNC_shift
, ZFUNC_mask
);
692 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
693 ZFUNC_shift
, ZFUNC_mask
);
699 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_ENABLE_bit
);
700 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
704 static void evergreenSetStencilState(GLcontext
* ctx
, GLboolean state
) //same
706 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
707 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
708 GLboolean hw_stencil
= GL_FALSE
;
710 if (ctx
->DrawBuffer
) {
711 struct radeon_renderbuffer
*rrbStencil
712 = radeon_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
713 hw_stencil
= (rrbStencil
&& rrbStencil
->bo
);
717 EVERGREEN_STATECHANGE(context
, db
);
719 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, STENCIL_ENABLE_bit
);
720 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, BACKFACE_ENABLE_bit
);
722 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, STENCIL_ENABLE_bit
);
726 static void evergreenUpdateCulling(GLcontext
* ctx
) //same
728 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
729 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
731 EVERGREEN_STATECHANGE(context
, pa
);
733 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
734 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
735 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
737 if (ctx
->Polygon
.CullFlag
)
739 switch (ctx
->Polygon
.CullFaceMode
)
742 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
743 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
746 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
747 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
749 case GL_FRONT_AND_BACK
:
750 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
751 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
754 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
755 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
760 switch (ctx
->Polygon
.FrontFace
)
763 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
766 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
769 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
); /* default: ccw */
773 /* Winding is inverted when rendering to FBO */
774 if (ctx
->DrawBuffer
&& ctx
->DrawBuffer
->Name
)
775 evergreen
->PA_SU_SC_MODE_CNTL
.u32All
^= FACE_bit
;
778 static void evergreenSetPolygonOffsetState(GLcontext
* ctx
, GLboolean state
) //same
780 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
781 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
783 EVERGREEN_STATECHANGE(context
, pa
);
786 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_FRONT_ENABLE_bit
);
787 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_BACK_ENABLE_bit
);
788 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_PARA_ENABLE_bit
);
790 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_FRONT_ENABLE_bit
);
791 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_BACK_ENABLE_bit
);
792 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_PARA_ENABLE_bit
);
796 static void evergreenUpdateLineStipple(GLcontext
* ctx
) //diff
801 void evergreenSetScissor(context_t
*context
) //diff
803 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
804 unsigned x1
, y1
, x2
, y2
;
806 struct radeon_renderbuffer
*rrb
;
808 rrb
= radeon_get_colorbuffer(&context
->radeon
);
809 if (!rrb
|| !rrb
->bo
) {
812 if (context
->radeon
.state
.scissor
.enabled
) {
813 x1
= context
->radeon
.state
.scissor
.rect
.x1
;
814 y1
= context
->radeon
.state
.scissor
.rect
.y1
;
815 x2
= context
->radeon
.state
.scissor
.rect
.x2
;
816 y2
= context
->radeon
.state
.scissor
.rect
.y2
;
817 /* r600 has exclusive BR scissors */
818 if (context
->radeon
.radeonScreen
->kernel_mm
) {
823 if (context
->radeon
.radeonScreen
->driScreen
->dri2
.enabled
) {
826 x2
= rrb
->base
.Width
;
827 y2
= rrb
->base
.Height
;
831 x2
= rrb
->dPriv
->x
+ rrb
->dPriv
->w
;
832 y2
= rrb
->dPriv
->y
+ rrb
->dPriv
->h
;
836 EVERGREEN_STATECHANGE(context
, pa
);
839 /* TODO : check WINDOW_OFFSET_DISABLE */
840 //SETbit(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
841 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_TL
.u32All
, x1
,
842 PA_SC_SCREEN_SCISSOR_TL__TL_X_shift
, EG_PA_SC_SCREEN_SCISSOR_TL__TL_X_mask
);
843 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_TL
.u32All
, y1
,
844 PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask
);
846 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_BR
.u32All
, x2
,
847 PA_SC_SCREEN_SCISSOR_BR__BR_X_shift
, EG_PA_SC_SCREEN_SCISSOR_BR__BR_X_mask
);
848 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_BR
.u32All
, y2
,
849 PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask
);
852 SETbit(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
853 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, x1
,
854 PA_SC_WINDOW_SCISSOR_TL__TL_X_shift
, EG_PA_SC_WINDOW_SCISSOR_TL__TL_X_mask
);
855 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, y1
,
856 PA_SC_WINDOW_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_WINDOW_SCISSOR_TL__TL_Y_mask
);
858 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_BR
.u32All
, x2
,
859 PA_SC_WINDOW_SCISSOR_BR__BR_X_shift
, EG_PA_SC_WINDOW_SCISSOR_BR__BR_X_mask
);
860 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_BR
.u32All
, y2
,
861 PA_SC_WINDOW_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_WINDOW_SCISSOR_BR__BR_Y_mask
);
864 SETfield(evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
, x1
,
865 PA_SC_CLIPRECT_0_TL__TL_X_shift
, EG_PA_SC_CLIPRECT_0_TL__TL_X_mask
);
866 SETfield(evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
, y1
,
867 PA_SC_CLIPRECT_0_TL__TL_Y_shift
, EG_PA_SC_CLIPRECT_0_TL__TL_Y_mask
);
868 SETfield(evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
, x2
,
869 PA_SC_CLIPRECT_0_BR__BR_X_shift
, EG_PA_SC_CLIPRECT_0_BR__BR_X_mask
);
870 SETfield(evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
, y2
,
871 PA_SC_CLIPRECT_0_BR__BR_Y_shift
, EG_PA_SC_CLIPRECT_0_BR__BR_Y_mask
);
873 evergreen
->PA_SC_CLIPRECT_1_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
874 evergreen
->PA_SC_CLIPRECT_1_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
875 evergreen
->PA_SC_CLIPRECT_2_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
876 evergreen
->PA_SC_CLIPRECT_2_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
877 evergreen
->PA_SC_CLIPRECT_3_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
878 evergreen
->PA_SC_CLIPRECT_3_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
880 /* more....2d clip */
881 SETbit(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
882 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, x1
,
883 PA_SC_GENERIC_SCISSOR_TL__TL_X_shift
, EG_PA_SC_GENERIC_SCISSOR_TL__TL_X_mask
);
884 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, y1
,
885 PA_SC_GENERIC_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_GENERIC_SCISSOR_TL__TL_Y_mask
);
886 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_BR
.u32All
, x2
,
887 PA_SC_GENERIC_SCISSOR_BR__BR_X_shift
, EG_PA_SC_GENERIC_SCISSOR_BR__BR_X_mask
);
888 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_BR
.u32All
, y2
,
889 PA_SC_GENERIC_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_GENERIC_SCISSOR_BR__BR_Y_mask
);
891 SETbit(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
892 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, x1
,
893 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask
);
894 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, y1
,
895 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask
);
896 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, x2
,
897 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask
);
898 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, y2
,
899 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask
);
902 SETbit(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
903 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, x1
,
904 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask
);
905 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, y1
,
906 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask
);
907 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, x2
,
908 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask
);
909 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, y2
,
910 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask
);
912 evergreen
->viewport
[id
].enabled
= GL_TRUE
;
915 static void evergreenUpdateWindow(GLcontext
* ctx
, int id
) //diff in calling evergreenSetScissor
917 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
918 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
919 __DRIdrawable
*dPriv
= radeon_get_drawable(&context
->radeon
);
920 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
921 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
922 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
923 const GLfloat depthScale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
924 const GLboolean render_to_fbo
= (ctx
->DrawBuffer
->Name
!= 0);
925 GLfloat y_scale
, y_bias
;
935 GLfloat sx
= v
[MAT_SX
];
936 GLfloat tx
= v
[MAT_TX
] + xoffset
;
937 GLfloat sy
= v
[MAT_SY
] * y_scale
;
938 GLfloat ty
= (v
[MAT_TY
] * y_scale
) + y_bias
;
939 GLfloat sz
= v
[MAT_SZ
] * depthScale
;
940 GLfloat tz
= v
[MAT_TZ
] * depthScale
;
942 EVERGREEN_STATECHANGE(context
, pa
);
945 evergreen
->viewport
[id
].PA_CL_VPORT_XSCALE
.f32All
= sx
;
946 evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
= tx
;
948 evergreen
->viewport
[id
].PA_CL_VPORT_YSCALE
.f32All
= sy
;
949 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
= ty
;
951 evergreen
->viewport
[id
].PA_CL_VPORT_ZSCALE
.f32All
= sz
;
952 evergreen
->viewport
[id
].PA_CL_VPORT_ZOFFSET
.f32All
= tz
;
954 if (ctx
->Transform
.DepthClamp
) {
955 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= MIN2(ctx
->Viewport
.Near
, ctx
->Viewport
.Far
);
956 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= MAX2(ctx
->Viewport
.Near
, ctx
->Viewport
.Far
);
957 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_NEAR_DISABLE_bit
);
958 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_FAR_DISABLE_bit
);
960 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= 0.0;
961 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= 1.0;
962 CLEARbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_NEAR_DISABLE_bit
);
963 CLEARbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_FAR_DISABLE_bit
);
966 evergreen
->viewport
[id
].enabled
= GL_TRUE
;
968 evergreenSetScissor(context
);
971 static void evergreenEnable(GLcontext
* ctx
, GLenum cap
, GLboolean state
) //diff in func calls
973 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
985 evergreenSetAlphaState(ctx
);
987 case GL_COLOR_LOGIC_OP
:
988 evergreenSetLogicOpState(ctx
);
989 /* fall-through, because logic op overrides blending */
991 evergreenSetBlendState(ctx
);
999 evergreenSetClipPlaneState(ctx
, cap
, state
);
1002 evergreenSetDepthState(ctx
);
1004 case GL_STENCIL_TEST
:
1005 evergreenSetStencilState(ctx
, state
);
1008 evergreenUpdateCulling(ctx
);
1010 case GL_POLYGON_OFFSET_POINT
:
1011 case GL_POLYGON_OFFSET_LINE
:
1012 case GL_POLYGON_OFFSET_FILL
:
1013 evergreenSetPolygonOffsetState(ctx
, state
);
1015 case GL_SCISSOR_TEST
:
1016 radeon_firevertices(&context
->radeon
);
1017 context
->radeon
.state
.scissor
.enabled
= state
;
1018 radeonUpdateScissor(ctx
);
1020 case GL_LINE_STIPPLE
:
1021 evergreenUpdateLineStipple(ctx
);
1023 case GL_DEPTH_CLAMP
:
1024 evergreenUpdateWindow(ctx
, 0);
1032 static void evergreenColorMask(GLcontext
* ctx
,
1033 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
) //same
1035 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1036 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1037 unsigned int mask
= ((r
? 1 : 0) |
1042 if (mask
!= evergreen
->CB_TARGET_MASK
.u32All
) {
1043 EVERGREEN_STATECHANGE(context
, cb
);
1044 SETfield(evergreen
->CB_TARGET_MASK
.u32All
, mask
, TARGET0_ENABLE_shift
, TARGET0_ENABLE_mask
);
1048 static void evergreenDepthFunc(GLcontext
* ctx
, GLenum func
) //same
1050 evergreenSetDepthState(ctx
);
1053 static void evergreenDepthMask(GLcontext
* ctx
, GLboolean mask
) //same
1055 evergreenSetDepthState(ctx
);
1058 static void evergreenCullFace(GLcontext
* ctx
, GLenum mode
) //same
1060 evergreenUpdateCulling(ctx
);
1063 static void evergreenFogfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
) //same
1067 static void evergreenUpdatePolygonMode(GLcontext
* ctx
) //same
1069 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1070 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1072 EVERGREEN_STATECHANGE(context
, pa
);
1074 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DISABLE_POLY_MODE
, POLY_MODE_shift
, POLY_MODE_mask
);
1076 /* Only do something if a polygon mode is wanted, default is GL_FILL */
1077 if (ctx
->Polygon
.FrontMode
!= GL_FILL
||
1078 ctx
->Polygon
.BackMode
!= GL_FILL
) {
1081 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
1082 * correctly by selecting the correct front and back face
1084 f
= ctx
->Polygon
.FrontMode
;
1085 b
= ctx
->Polygon
.BackMode
;
1087 /* Enable polygon mode */
1088 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DUAL_MODE
, POLY_MODE_shift
, POLY_MODE_mask
);
1092 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_LINES
,
1093 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1096 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_POINTS
,
1097 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1100 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_TRIANGLES
,
1101 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1107 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_LINES
,
1108 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1111 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_POINTS
,
1112 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1115 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_TRIANGLES
,
1116 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1122 static void evergreenFrontFace(GLcontext
* ctx
, GLenum mode
) //same
1124 evergreenUpdateCulling(ctx
);
1125 evergreenUpdatePolygonMode(ctx
);
1128 static void evergreenShadeModel(GLcontext
* ctx
, GLenum mode
) //same
1130 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1131 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1133 EVERGREEN_STATECHANGE(context
, spi
);
1135 /* also need to set/clear FLAT_SHADE bit per param in SPI_PS_INPUT_CNTL_[0-31] */
1138 SETbit(evergreen
->SPI_INTERP_CONTROL_0
.u32All
, FLAT_SHADE_ENA_bit
);
1141 CLEARbit(evergreen
->SPI_INTERP_CONTROL_0
.u32All
, FLAT_SHADE_ENA_bit
);
1148 static void evergreenLogicOpcode(GLcontext
*ctx
, GLenum logicop
) //diff
1150 if (RGBA_LOGICOP_ENABLED(ctx
))
1151 evergreenSetLogicOpState(ctx
);
1154 static void evergreenPointSize(GLcontext
* ctx
, GLfloat size
) //same
1156 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1157 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1159 EVERGREEN_STATECHANGE(context
, pa
);
1161 /* We need to clamp to user defined range here, because
1162 * the HW clamping happens only for per vertex point size. */
1163 size
= CLAMP(size
, ctx
->Point
.MinSize
, ctx
->Point
.MaxSize
);
1165 /* same size limits for AA, non-AA points */
1166 size
= CLAMP(size
, ctx
->Const
.MinPointSize
, ctx
->Const
.MaxPointSize
);
1168 /* format is 12.4 fixed point */
1169 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, (int)(size
* 8.0),
1170 PA_SU_POINT_SIZE__HEIGHT_shift
, PA_SU_POINT_SIZE__HEIGHT_mask
);
1171 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, (int)(size
* 8.0),
1172 PA_SU_POINT_SIZE__WIDTH_shift
, PA_SU_POINT_SIZE__WIDTH_mask
);
1176 static void evergreenPointParameter(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
) //same
1178 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1179 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1181 EVERGREEN_STATECHANGE(context
, pa
);
1183 /* format is 12.4 fixed point */
1185 case GL_POINT_SIZE_MIN
:
1186 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, (int)(ctx
->Point
.MinSize
* 8.0),
1187 MIN_SIZE_shift
, MIN_SIZE_mask
);
1188 evergreenPointSize(ctx
, ctx
->Point
.Size
);
1190 case GL_POINT_SIZE_MAX
:
1191 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, (int)(ctx
->Point
.MaxSize
* 8.0),
1192 MAX_SIZE_shift
, MAX_SIZE_mask
);
1193 evergreenPointSize(ctx
, ctx
->Point
.Size
);
1195 case GL_POINT_DISTANCE_ATTENUATION
:
1197 case GL_POINT_FADE_THRESHOLD_SIZE
:
1204 static int evergreen_translate_stencil_func(int func
) //same
1218 return REF_NOTEQUAL
;
1227 static void evergreenStencilFuncSeparate(GLcontext
* ctx
, GLenum face
,
1228 GLenum func
, GLint ref
, GLuint mask
) //same
1230 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1231 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1232 const unsigned back
= ctx
->Stencil
._BackFace
;
1235 EVERGREEN_STATECHANGE(context
, db
);
1238 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.Ref
[0],
1239 STENCILREF_shift
, STENCILREF_mask
);
1240 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.ValueMask
[0],
1241 STENCILMASK_shift
, STENCILMASK_mask
);
1243 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_func(ctx
->Stencil
.Function
[0]),
1244 STENCILFUNC_shift
, STENCILFUNC_mask
);
1247 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.Ref
[back
],
1248 STENCILREF_BF_shift
, STENCILREF_BF_mask
);
1249 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.ValueMask
[back
],
1250 STENCILMASK_BF_shift
, STENCILMASK_BF_mask
);
1252 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_func(ctx
->Stencil
.Function
[back
]),
1253 STENCILFUNC_BF_shift
, STENCILFUNC_BF_mask
);
1256 static void evergreenStencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
) //same
1258 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1259 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1260 const unsigned back
= ctx
->Stencil
._BackFace
;
1262 EVERGREEN_STATECHANGE(context
, db
);
1265 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.WriteMask
[0],
1266 STENCILWRITEMASK_shift
, STENCILWRITEMASK_mask
);
1269 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.WriteMask
[back
],
1270 STENCILWRITEMASK_BF_shift
, STENCILWRITEMASK_BF_mask
);
1274 static int evergreen_translate_stencil_op(int op
) //same
1278 return STENCIL_KEEP
;
1280 return STENCIL_ZERO
;
1282 return STENCIL_REPLACE
;
1284 return STENCIL_INCR_CLAMP
;
1286 return STENCIL_DECR_CLAMP
;
1287 case GL_INCR_WRAP_EXT
:
1288 return STENCIL_INCR_WRAP
;
1289 case GL_DECR_WRAP_EXT
:
1290 return STENCIL_DECR_WRAP
;
1292 return STENCIL_INVERT
;
1294 WARN_ONCE("Do not know how to translate stencil op");
1295 return STENCIL_KEEP
;
1300 static void evergreenStencilOpSeparate(GLcontext
* ctx
, GLenum face
,
1301 GLenum fail
, GLenum zfail
, GLenum zpass
) //same
1303 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1304 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1305 const unsigned back
= ctx
->Stencil
._BackFace
;
1307 EVERGREEN_STATECHANGE(context
, db
);
1309 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.FailFunc
[0]),
1310 STENCILFAIL_shift
, STENCILFAIL_mask
);
1311 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]),
1312 STENCILZFAIL_shift
, STENCILZFAIL_mask
);
1313 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]),
1314 STENCILZPASS_shift
, STENCILZPASS_mask
);
1316 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.FailFunc
[back
]),
1317 STENCILFAIL_BF_shift
, STENCILFAIL_BF_mask
);
1318 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[back
]),
1319 STENCILZFAIL_BF_shift
, STENCILZFAIL_BF_mask
);
1320 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[back
]),
1321 STENCILZPASS_BF_shift
, STENCILZPASS_BF_mask
);
1324 static void evergreenViewport(GLcontext
* ctx
,
1328 GLsizei height
) //diff in evergreenUpdateWindow
1330 evergreenUpdateWindow(ctx
, 0);
1332 radeon_viewport(ctx
, x
, y
, width
, height
);
1335 static void evergreenDepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
) //diff in evergreenUpdateWindow
1337 evergreenUpdateWindow(ctx
, 0);
1340 static void evergreenLineWidth(GLcontext
* ctx
, GLfloat widthf
) //same
1342 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1343 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1344 uint32_t lineWidth
= (uint32_t)((widthf
* 0.5) * (1 << 4));
1346 EVERGREEN_STATECHANGE(context
, pa
);
1348 if (lineWidth
> 0xFFFF)
1350 SETfield(evergreen
->PA_SU_LINE_CNTL
.u32All
,(uint16_t)lineWidth
,
1351 PA_SU_LINE_CNTL__WIDTH_shift
, PA_SU_LINE_CNTL__WIDTH_mask
);
1354 static void evergreenLineStipple(GLcontext
*ctx
, GLint factor
, GLushort pattern
) //same
1356 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1357 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1359 EVERGREEN_STATECHANGE(context
, pa
);
1361 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, pattern
, LINE_PATTERN_shift
, LINE_PATTERN_mask
);
1362 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, (factor
-1), REPEAT_COUNT_shift
, REPEAT_COUNT_mask
);
1363 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, 1, AUTO_RESET_CNTL_shift
, AUTO_RESET_CNTL_mask
);
1366 static void evergreenPolygonOffset(GLcontext
* ctx
, GLfloat factor
, GLfloat units
) //diff :
1367 //all register here offset diff, bits same
1369 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1370 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1371 GLfloat constant
= units
;
1374 EVERGREEN_STATECHANGE(context
, pa
);
1376 switch (ctx
->Visual
.depthBits
) {
1388 SETfield(evergreen
->PA_SU_POLY_OFFSET_DB_FMT_CNTL
.u32All
, depth
,
1389 POLY_OFFSET_NEG_NUM_DB_BITS_shift
, POLY_OFFSET_NEG_NUM_DB_BITS_mask
);
1390 //evergreen->PA_SU_POLY_OFFSET_CLAMP.f32All = constant; //???
1391 evergreen
->PA_SU_POLY_OFFSET_FRONT_SCALE
.f32All
= factor
;
1392 evergreen
->PA_SU_POLY_OFFSET_FRONT_OFFSET
.f32All
= constant
;
1393 evergreen
->PA_SU_POLY_OFFSET_BACK_SCALE
.f32All
= factor
;
1394 evergreen
->PA_SU_POLY_OFFSET_BACK_OFFSET
.f32All
= constant
;
1397 static void evergreenPolygonMode(GLcontext
* ctx
, GLenum face
, GLenum mode
) //same
1402 evergreenUpdatePolygonMode(ctx
);
1405 static void evergreenRenderMode(GLcontext
* ctx
, GLenum mode
) //same
1409 //TODO : move to kernel.
1410 static void evergreenInitSQConfig(GLcontext
* ctx
)
1412 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1413 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1415 uint32_t uSqNumCfInsts
, uMaxGPRs
, uMaxThreads
, uMaxStackEntries
, uPSThreadCount
, uOtherThreadCount
;
1416 uint32_t NUM_PS_GPRS
, NUM_VS_GPRS
, NUM_GS_GPRS
, NUM_ES_GPRS
, NUM_HS_GPRS
, NUM_LS_GPRS
, NUM_CLAUSE_TEMP_GPRS
;
1417 GLboolean bVC_ENABLE
= GL_TRUE
;
1419 R600_STATECHANGE(context
, sq
);
1421 switch (context
->radeon
.radeonScreen
->chip_family
)
1423 case CHIP_FAMILY_CEDAR
:
1425 bVC_ENABLE
= GL_FALSE
;
1427 uPSThreadCount
= 96;
1429 uMaxStackEntries
= 256;
1431 case CHIP_FAMILY_REDWOOD
:
1433 bVC_ENABLE
= GL_TRUE
;
1435 uPSThreadCount
= 128;
1437 uMaxStackEntries
= 256;
1439 case CHIP_FAMILY_JUNIPER
:
1441 bVC_ENABLE
= GL_TRUE
;
1443 uPSThreadCount
= 128;
1445 uMaxStackEntries
= 512;
1447 case CHIP_FAMILY_CYPRESS
:
1449 bVC_ENABLE
= GL_TRUE
;
1451 uPSThreadCount
= 128;
1453 uMaxStackEntries
= 512;
1455 case CHIP_FAMILY_HEMLOCK
:
1456 uSqNumCfInsts
= 2;//?
1457 bVC_ENABLE
= GL_TRUE
;
1459 uPSThreadCount
= 128;
1461 uMaxStackEntries
= 512;
1465 bVC_ENABLE
= GL_TRUE
;
1467 uPSThreadCount
= 128;
1469 uMaxStackEntries
= 512;
1473 evergreen
->evergreen_config
.SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
.u32All
= 0;
1475 evergreen
->evergreen_config
.SPI_CONFIG_CNTL
.u32All
= 0;
1476 evergreen
->evergreen_config
.SPI_CONFIG_CNTL_1
.u32All
= 0;
1477 SETfield(evergreen
->evergreen_config
.SPI_CONFIG_CNTL_1
.u32All
, 4,
1478 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_shift
,
1479 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_mask
);
1481 evergreen
->evergreen_config
.CP_PERFMON_CNTL
.u32All
= 0;
1483 evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
= 0;
1484 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 16 * uSqNumCfInsts
,
1485 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_shift
,
1486 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_mask
);
1487 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0x4,
1488 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_shift
,
1489 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_mask
);
1490 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0xE0,
1491 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_shift
,
1492 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_mask
);
1493 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0x8,
1494 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_shift
,
1495 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_mask
);
1497 if(bVC_ENABLE
== GL_TRUE
)
1499 SETbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1500 EG_SQ_CONFIG__VC_ENABLE_bit
);
1504 CLEARbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1505 EG_SQ_CONFIG__VC_ENABLE_bit
);
1507 SETbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1508 EG_SQ_CONFIG__EXPORT_SRC_C_bit
);
1509 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 0,
1510 EG_SQ_CONFIG__PS_PRIO_shift
,
1511 EG_SQ_CONFIG__PS_PRIO_mask
);
1512 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 1,
1513 EG_SQ_CONFIG__VS_PRIO_shift
,
1514 EG_SQ_CONFIG__VS_PRIO_mask
);
1515 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 2,
1516 EG_SQ_CONFIG__GS_PRIO_shift
,
1517 EG_SQ_CONFIG__GS_PRIO_mask
);
1518 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 3,
1519 EG_SQ_CONFIG__ES_PRIO_shift
,
1520 EG_SQ_CONFIG__ES_PRIO_mask
);
1522 NUM_CLAUSE_TEMP_GPRS
= 4;
1523 NUM_PS_GPRS
= ((uMaxGPRs
-(4*2))*12/32); // 93
1524 NUM_VS_GPRS
= ((uMaxGPRs
-(4*2))*6/32); // 46
1525 NUM_GS_GPRS
= ((uMaxGPRs
-(4*2))*4/32); // 31
1526 NUM_ES_GPRS
= ((uMaxGPRs
-(4*2))*4/32); // 31
1527 NUM_HS_GPRS
= ((uMaxGPRs
-(4*2))*3/32); // 23
1528 NUM_LS_GPRS
= ((uMaxGPRs
-(4*2))*3/32); // 23
1530 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
= 0;
1531 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
= 0;
1532 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
= 0;
1534 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_PS_GPRS
,
1535 NUM_PS_GPRS_shift
, NUM_PS_GPRS_mask
);
1536 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_VS_GPRS
,
1537 NUM_VS_GPRS_shift
, NUM_VS_GPRS_mask
);
1538 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_CLAUSE_TEMP_GPRS
,
1539 NUM_CLAUSE_TEMP_GPRS_shift
, NUM_CLAUSE_TEMP_GPRS_mask
);
1540 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
, NUM_GS_GPRS
,
1541 NUM_GS_GPRS_shift
, NUM_GS_GPRS_mask
);
1542 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
, NUM_ES_GPRS
,
1543 NUM_ES_GPRS_shift
, NUM_ES_GPRS_mask
);
1544 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
, NUM_HS_GPRS
,
1545 NUM_PS_GPRS_shift
, NUM_PS_GPRS_mask
);
1546 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
, NUM_LS_GPRS
,
1547 NUM_VS_GPRS_shift
, NUM_VS_GPRS_mask
);
1549 uOtherThreadCount
= (((uMaxThreads
-uPSThreadCount
)/6)/8)*8;
1550 evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
= 0;
1551 evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
= 0;
1552 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uPSThreadCount
,
1553 NUM_PS_THREADS_shift
, NUM_PS_THREADS_mask
);
1554 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1555 NUM_VS_THREADS_shift
, NUM_VS_THREADS_mask
);
1556 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1557 NUM_GS_THREADS_shift
, NUM_GS_THREADS_mask
);
1558 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1559 NUM_ES_THREADS_shift
, NUM_ES_THREADS_mask
);
1560 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
, uOtherThreadCount
,
1561 NUM_PS_THREADS_shift
, NUM_PS_THREADS_mask
);
1562 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
, uOtherThreadCount
,
1563 NUM_VS_THREADS_shift
, NUM_VS_THREADS_mask
);
1565 uMaxStackEntries
= ((uMaxStackEntries
*1)/6);
1566 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
= 0;
1567 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
= 0;
1568 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
= 0;
1569 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
, uMaxStackEntries
,
1570 NUM_PS_STACK_ENTRIES_shift
, NUM_PS_STACK_ENTRIES_mask
);
1571 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
, uMaxStackEntries
,
1572 NUM_VS_STACK_ENTRIES_shift
, NUM_VS_STACK_ENTRIES_mask
);
1573 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
, uMaxStackEntries
,
1574 NUM_GS_STACK_ENTRIES_shift
, NUM_GS_STACK_ENTRIES_mask
);
1575 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
, uMaxStackEntries
,
1576 NUM_ES_STACK_ENTRIES_shift
, NUM_ES_STACK_ENTRIES_mask
);
1577 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
, uMaxStackEntries
,
1578 NUM_PS_STACK_ENTRIES_shift
, NUM_PS_STACK_ENTRIES_mask
);
1579 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
, uMaxStackEntries
,
1580 NUM_VS_STACK_ENTRIES_shift
, NUM_VS_STACK_ENTRIES_mask
);
1582 evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
= 0;
1583 SETfield(evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
, 4095,
1584 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_shift
,
1585 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_mask
);
1586 SETfield(evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
, 255,
1587 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_shift
,
1588 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_mask
);
1590 evergreen
->evergreen_config
.VGT_CACHE_INVALIDATION
.u32All
= 0;
1591 SETfield(evergreen
->evergreen_config
.VGT_CACHE_INVALIDATION
.u32All
, 2,
1592 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_shift
,
1593 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_mask
);
1595 evergreen
->evergreen_config
.VGT_GS_VERTEX_REUSE
.u32All
= 0;
1596 SETfield(evergreen
->evergreen_config
.VGT_GS_VERTEX_REUSE
.u32All
, 16,
1600 evergreen
->evergreen_config
.PA_SC_LINE_STIPPLE_STATE
.u32All
= 0;
1602 evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
= 0;
1603 SETbit(evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
,
1604 CLIP_VTX_REORDER_ENA_bit
);
1605 SETfield(evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
, 3,
1610 void evergreenInitState(GLcontext
* ctx
) //diff
1612 context_t
*context
= R700_CONTEXT(ctx
);
1613 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1617 //calloc should have done this
1618 memset(evergreen
, 0, sizeof(EVERGREEN_CHIP_CONTEXT
));
1620 // Disable window clipping and offset:
1621 SETfield(evergreen
->PA_SC_WINDOW_OFFSET
.u32All
, 0,
1622 EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_shift
, EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_mask
);
1623 SETfield(evergreen
->PA_SC_WINDOW_OFFSET
.u32All
, 0,
1624 EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_shift
, EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_mask
);
1626 SETbit(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
1628 evergreen
->PA_SC_CLIPRECT_RULE
.u32All
= 0x0000FFFF;
1630 evergreen
->PA_SC_EDGERULE
.u32All
= 0xAAAAAAAA;
1632 // Set up Z min/max:
1633 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= 0.0;
1634 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= 1.0;
1636 SETfield(evergreen
->CB_TARGET_MASK
.u32All
, 0xF, TARGET0_ENABLE_shift
, TARGET0_ENABLE_mask
);
1637 SETfield(evergreen
->CB_SHADER_MASK
.u32All
, 0xF, OUTPUT0_ENABLE_shift
, OUTPUT0_ENABLE_mask
);
1639 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
1640 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift
,
1641 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask
);
1642 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
1643 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift
,
1644 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask
);
1646 // Turn off vgt reuse:
1647 evergreen
->VGT_REUSE_OFF
.u32All
= 0;
1648 SETbit(evergreen
->VGT_REUSE_OFF
.u32All
, REUSE_OFF_bit
);
1650 // Specify offsetting and clamp values for vertices:
1651 evergreen
->VGT_MAX_VTX_INDX
.u32All
= 0xFFFFFF;
1652 evergreen
->VGT_MIN_VTX_INDX
.u32All
= 0;
1653 evergreen
->VGT_INDX_OFFSET
.u32All
= 0;
1655 evergreen
->VGT_DMA_NUM_INSTANCES
.u32All
= 1;
1657 // Do not alpha blend:
1658 SETfield(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, REF_NEVER
,
1659 ALPHA_FUNC_shift
, ALPHA_FUNC_mask
);
1660 CLEARbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
1662 evergreen
->SPI_VS_OUT_ID_0
.u32All
= 0x03020100;
1663 evergreen
->SPI_VS_OUT_ID_1
.u32All
= 0x07060504;
1665 evergreen
->SPI_PS_INPUT_CNTL
[0].u32All
= 0x00000800;
1666 evergreen
->SPI_PS_INPUT_CNTL
[1].u32All
= 0x00000801;
1667 evergreen
->SPI_PS_INPUT_CNTL
[2].u32All
= 0x00000802;
1670 // Depth buffer currently disabled:
1671 evergreen
->DB_DEPTH_CONTROL
.u32All
= 0;
1672 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
1673 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
1674 ZFUNC_shift
, ZFUNC_mask
);
1676 evergreen
->DB_Z_READ_BASE
.u32All
= 0;
1677 evergreen
->DB_Z_WRITE_BASE
.u32All
= 0;
1679 evergreen
->DB_DEPTH_CLEAR
.f32All
= 1.0;
1681 evergreen
->DB_DEPTH_VIEW
.u32All
= 0;
1683 evergreen
->DB_SHADER_CONTROL
.u32All
= 0;
1684 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, EG_DB_SHADER_CONTROL__DUAL_EXPORT_ENABLE_bit
);
1686 evergreen
->DB_Z_INFO
.u32All
= 0;
1687 SETfield(evergreen
->DB_Z_INFO
.u32All
, ARRAY_1D_TILED_THIN1
,
1688 EG_DB_Z_INFO__ARRAY_MODE_shift
, EG_DB_Z_INFO__ARRAY_MODE_mask
);
1689 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_Z_24
,
1690 EG_DB_Z_INFO__FORMAT_shift
, EG_DB_Z_INFO__FORMAT_mask
);
1691 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_TILE_SPLIT_256B
,
1692 EG_DB_Z_INFO__TILE_SPLIT_shift
, EG_DB_Z_INFO__TILE_SPLIT_mask
);
1693 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_8_BANK
,
1694 EG_DB_Z_INFO__NUM_BANKS_shift
, EG_DB_Z_INFO__NUM_BANKS_mask
);
1695 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_BANK_WIDTH_1
,
1696 EG_DB_Z_INFO__BANK_WIDTH_shift
, EG_DB_Z_INFO__BANK_WIDTH_mask
);
1697 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_BANK_HEIGHT_1
,
1698 EG_DB_Z_INFO__BANK_HEIGHT_shift
, EG_DB_Z_INFO__BANK_HEIGHT_mask
);
1700 evergreen
->DB_STENCIL_INFO
.u32All
= 0;
1701 CLEARbit(evergreen
->DB_STENCIL_INFO
.u32All
, EG_DB_STENCIL_INFO__FORMAT_bit
);
1702 SETfield(evergreen
->DB_STENCIL_INFO
.u32All
, EG_ADDR_SURF_TILE_SPLIT_256B
,
1703 EG_DB_STENCIL_INFO__TILE_SPLIT_shift
, EG_DB_STENCIL_INFO__TILE_SPLIT_mask
);
1705 evergreen
->DB_RENDER_CONTROL
.u32All
= 0;
1707 evergreen
->DB_RENDER_OVERRIDE
.u32All
= 0;
1708 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIZ_ENABLE_shift
, FORCE_HIZ_ENABLE_mask
);
1709 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIS_ENABLE0_shift
, FORCE_HIS_ENABLE0_mask
);
1710 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIS_ENABLE1_shift
, FORCE_HIS_ENABLE1_mask
);
1712 // Disable ROP3 modes by setting src to dst copy:
1713 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, 0xCC,
1714 EG_CB_COLOR_CONTROL__ROP3_shift
,
1715 EG_CB_COLOR_CONTROL__ROP3_mask
);
1716 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, EG_CB_NORMAL
,
1717 EG_CB_COLOR_CONTROL__MODE_shift
,
1718 EG_CB_COLOR_CONTROL__MODE_mask
);
1720 SETfield(evergreen
->CB_BLEND0_CONTROL
.u32All
,
1721 BLEND_ONE
, COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
1723 SETfield(evergreen
->CB_BLEND0_CONTROL
.u32All
,
1724 BLEND_ONE
, ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
1726 //evergreen->PA_CL_CLIP_CNTL.CLIP_DISABLE = 1;
1728 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, DX_LINEAR_ATTR_CLIP_ENA_bit
);
1730 // Set up the culling control register:
1731 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, 2,
1732 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
); // draw using triangles
1733 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, 2,
1734 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
); // draw using triangles
1736 // Do scale XY or X by 1/W0. eg:
1737 evergreen
->bEnablePerspective
= GL_TRUE
;
1739 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
1740 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
1741 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
1743 // Enable viewport scaling for all three axis:
1744 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_X_SCALE_ENA_bit
);
1745 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_X_OFFSET_ENA_bit
);
1746 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Y_SCALE_ENA_bit
);
1747 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Y_OFFSET_ENA_bit
);
1748 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Z_SCALE_ENA_bit
);
1749 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Z_OFFSET_ENA_bit
);
1751 // Set up point sizes and min/max values:
1752 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, 0x8,
1753 PA_SU_POINT_SIZE__HEIGHT_shift
, PA_SU_POINT_SIZE__HEIGHT_mask
);
1754 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, 0x8,
1755 PA_SU_POINT_SIZE__WIDTH_shift
, PA_SU_POINT_SIZE__WIDTH_mask
);
1756 CLEARfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, MIN_SIZE_mask
);
1757 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, 0x8000, MAX_SIZE_shift
, MAX_SIZE_mask
);
1758 SETfield(evergreen
->PA_SU_LINE_CNTL
.u32All
,0x8,
1759 PA_SU_LINE_CNTL__WIDTH_shift
, PA_SU_LINE_CNTL__WIDTH_mask
);
1761 // Set up line control:
1762 evergreen
->PA_SC_LINE_CNTL
.u32All
= 0;
1763 CLEARbit(evergreen
->PA_SC_LINE_CNTL
.u32All
, EXPAND_LINE_WIDTH_bit
);
1764 SETbit(evergreen
->PA_SC_LINE_CNTL
.u32All
, LAST_PIXEL_bit
);
1766 // Set up vertex control:
1767 evergreen
->PA_SU_VTX_CNTL
.u32All
= 0;
1768 CLEARfield(evergreen
->PA_SU_VTX_CNTL
.u32All
, QUANT_MODE_mask
);
1769 SETbit(evergreen
->PA_SU_VTX_CNTL
.u32All
, PIX_CENTER_bit
);
1770 SETfield(evergreen
->PA_SU_VTX_CNTL
.u32All
, X_ROUND_TO_EVEN
,
1771 PA_SU_VTX_CNTL__ROUND_MODE_shift
, PA_SU_VTX_CNTL__ROUND_MODE_mask
);
1773 // to 1.0 = no guard band:
1774 evergreen
->PA_CL_GB_VERT_CLIP_ADJ
.u32All
= 0x3F800000; // 1.0
1775 evergreen
->PA_CL_GB_VERT_DISC_ADJ
.u32All
= 0x3F800000; // 1.0
1776 evergreen
->PA_CL_GB_HORZ_CLIP_ADJ
.u32All
= 0x3F800000; // 1.0
1777 evergreen
->PA_CL_GB_HORZ_DISC_ADJ
.u32All
= 0x3F800000; // 1.0
1779 // Diable color compares:
1780 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_DRAW_ALWAYS
,
1781 CLRCMP_FCN_SRC_shift
, CLRCMP_FCN_SRC_mask
);
1782 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_DRAW_ALWAYS
,
1783 CLRCMP_FCN_DST_shift
, CLRCMP_FCN_DST_mask
);
1784 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_SEL_SRC
,
1785 CLRCMP_FCN_SEL_shift
, CLRCMP_FCN_SEL_mask
);
1788 evergreen
->CB_CLRCMP_SRC
.u32All
= 0x00000000;
1790 // Put a compare color in for error checking:
1791 evergreen
->CB_CLRCMP_DST
.u32All
= 0x000000FF;
1793 // Set up color compare mask:
1794 evergreen
->CB_CLRCMP_MSK
.u32All
= 0xFFFFFFFF;
1796 // Enable all samples for multi-sample anti-aliasing:
1797 evergreen
->PA_SC_AA_MASK
.u32All
= 0xFFFFFFFF;
1799 evergreen
->PA_SC_AA_CONFIG
.u32All
= 0;
1801 SETfield(evergreen
->VGT_OUT_DEALLOC_CNTL
.u32All
, 16,
1802 DEALLOC_DIST_shift
, DEALLOC_DIST_mask
);
1803 SETfield(evergreen
->VGT_VERTEX_REUSE_BLOCK_CNTL
.u32All
, 14,
1804 VTX_REUSE_DEPTH_shift
, VTX_REUSE_DEPTH_mask
);
1806 evergreen
->SX_MISC
.u32All
= 0;
1808 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, 1,
1809 EG_CB_COLOR0_INFO__SOURCE_FORMAT_shift
, EG_CB_COLOR0_INFO__SOURCE_FORMAT_mask
);
1810 SETbit(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, EG_CB_COLOR0_INFO__BLEND_CLAMP_bit
);
1811 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, 0,
1812 EG_CB_COLOR0_INFO__NUMBER_TYPE_shift
, EG_CB_COLOR0_INFO__NUMBER_TYPE_mask
);
1814 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, SWAP_STD
,
1815 EG_CB_COLOR0_INFO__COMP_SWAP_shift
, EG_CB_COLOR0_INFO__COMP_SWAP_mask
);
1817 evergreen
->render_target
[id
].CB_COLOR0_VIEW
.u32All
= 0;
1818 evergreen
->render_target
[id
].CB_COLOR0_CMASK
.u32All
= 0;
1819 evergreen
->render_target
[id
].CB_COLOR0_FMASK
.u32All
= 0;
1820 evergreen
->render_target
[id
].CB_COLOR0_FMASK_SLICE
.u32All
= 0;
1822 evergreenInitSQConfig(ctx
);
1824 context
->radeon
.hw
.all_dirty
= GL_TRUE
;
1827 void evergreenInitStateFuncs(radeonContextPtr radeon
, struct dd_function_table
*functions
)
1829 functions
->UpdateState
= evergreenInvalidateState
;
1830 functions
->AlphaFunc
= evergreenAlphaFunc
;
1831 functions
->BlendColor
= evergreenBlendColor
;
1832 functions
->BlendEquationSeparate
= evergreenBlendEquationSeparate
;
1833 functions
->BlendFuncSeparate
= evergreenBlendFuncSeparate
;
1834 functions
->Enable
= evergreenEnable
;
1835 functions
->ColorMask
= evergreenColorMask
;
1836 functions
->DepthFunc
= evergreenDepthFunc
;
1837 functions
->DepthMask
= evergreenDepthMask
;
1838 functions
->CullFace
= evergreenCullFace
;
1839 functions
->Fogfv
= evergreenFogfv
;
1840 functions
->FrontFace
= evergreenFrontFace
;
1841 functions
->ShadeModel
= evergreenShadeModel
;
1842 functions
->LogicOpcode
= evergreenLogicOpcode
;
1844 /* ARB_point_parameters */
1845 functions
->PointParameterfv
= evergreenPointParameter
;
1847 /* Stencil related */
1848 functions
->StencilFuncSeparate
= evergreenStencilFuncSeparate
;
1849 functions
->StencilMaskSeparate
= evergreenStencilMaskSeparate
;
1850 functions
->StencilOpSeparate
= evergreenStencilOpSeparate
;
1852 /* Viewport related */
1853 functions
->Viewport
= evergreenViewport
;
1854 functions
->DepthRange
= evergreenDepthRange
;
1855 functions
->PointSize
= evergreenPointSize
;
1856 functions
->LineWidth
= evergreenLineWidth
;
1857 functions
->LineStipple
= evergreenLineStipple
;
1859 functions
->PolygonOffset
= evergreenPolygonOffset
;
1860 functions
->PolygonMode
= evergreenPolygonMode
;
1862 functions
->RenderMode
= evergreenRenderMode
;
1864 functions
->ClipPlane
= evergreenClipPlane
;
1866 functions
->Scissor
= radeonScissor
;
1868 functions
->DrawBuffer
= radeonDrawBuffer
;
1869 functions
->ReadBuffer
= radeonReadBuffer
;
1871 if (radeon
->radeonScreen
->kernel_mm
) {
1872 functions
->CopyPixels
= _mesa_meta_CopyPixels
;
1873 functions
->DrawPixels
= _mesa_meta_DrawPixels
;
1874 functions
->ReadPixels
= radeonReadPixels
;