Merge remote branch 'origin/master' into nv50-compiler
[mesa.git] / src / mesa / drivers / dri / r600 / evergreen_state.c
1 /*
2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21
22 /*
23 * Authors:
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
25 */
26
27 #include "main/glheader.h"
28 #include "main/mtypes.h"
29 #include "main/imports.h"
30 #include "main/enums.h"
31 #include "main/macros.h"
32 #include "main/context.h"
33 #include "main/dd.h"
34 #include "main/simple_list.h"
35
36 #include "tnl/tnl.h"
37 #include "tnl/t_pipeline.h"
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "main/api_arrayelt.h"
41 #include "main/framebuffer.h"
42 #include "drivers/common/meta.h"
43 #include "program/prog_parameter.h"
44 #include "program/prog_statevars.h"
45
46 #include "vbo/vbo.h"
47
48 #include "r600_context.h"
49
50 #include "evergreen_state.h"
51 #include "evergreen_diff.h"
52 #include "evergreen_vertprog.h"
53 #include "evergreen_fragprog.h"
54 #include "evergreen_tex.h"
55
56 void evergreenUpdateStateParameters(GLcontext * ctx, GLuint new_state); //same
57
58 void evergreenUpdateShaders(GLcontext * ctx)
59 {
60 context_t *context = EVERGREEN_CONTEXT(ctx);
61
62 /* should only happenen once, just after context is created */
63 /* TODO: shouldn't we fallback to sw here? */
64 if (!ctx->FragmentProgram._Current) {
65 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
66 return;
67 }
68
69 evergreenSelectFragmentShader(ctx);
70
71 evergreenSelectVertexShader(ctx);
72 evergreenUpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
73 context->radeon.NewGLState = 0;
74 }
75
76 void evergreeUpdateShaders(GLcontext * ctx)
77 {
78 context_t *context = R700_CONTEXT(ctx);
79
80 /* should only happenen once, just after context is created */
81 /* TODO: shouldn't we fallback to sw here? */
82 if (!ctx->FragmentProgram._Current) {
83 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
84 return;
85 }
86
87 evergreenSelectFragmentShader(ctx);
88
89 evergreenSelectVertexShader(ctx);
90 evergreenUpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
91 context->radeon.NewGLState = 0;
92 }
93
94 /*
95 * To correctly position primitives:
96 */
97 void evergreenUpdateViewportOffset(GLcontext * ctx) //------------------
98 {
99 context_t *context = R700_CONTEXT(ctx);
100 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
101 __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
102 GLfloat xoffset = (GLfloat) dPriv->x;
103 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
104 const GLfloat *v = ctx->Viewport._WindowMap.m;
105 int id = 0;
106
107 GLfloat tx = v[MAT_TX] + xoffset;
108 GLfloat ty = (-v[MAT_TY]) + yoffset;
109
110 if (evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All != tx ||
111 evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All != ty) {
112 /* Note: this should also modify whatever data the context reset
113 * code uses...
114 */
115 EVERGREEN_STATECHANGE(context, pa);
116 evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
117 evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
118 }
119
120 radeonUpdateScissor(ctx);
121 }
122
123 void evergreenUpdateStateParameters(GLcontext * ctx, GLuint new_state) //same
124 {
125 struct evergreen_fragment_program *fp =
126 (struct evergreen_fragment_program *)ctx->FragmentProgram._Current;
127 struct gl_program_parameter_list *paramList;
128
129 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
130 return;
131
132 if (!ctx->FragmentProgram._Current || !fp)
133 return;
134
135 paramList = ctx->FragmentProgram._Current->Base.Parameters;
136
137 if (!paramList)
138 return;
139
140 _mesa_load_state_parameters(ctx, paramList);
141
142 }
143
144 /**
145 * Called by Mesa after an internal state update.
146 */
147 static void evergreenInvalidateState(GLcontext * ctx, GLuint new_state) //same
148 {
149 context_t *context = EVERGREEN_CONTEXT(ctx);
150
151 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
152
153 _swrast_InvalidateState(ctx, new_state);
154 _swsetup_InvalidateState(ctx, new_state);
155 _vbo_InvalidateState(ctx, new_state);
156 _tnl_InvalidateState(ctx, new_state);
157 _ae_invalidate_state(ctx, new_state);
158
159 if (new_state & _NEW_BUFFERS) {
160 _mesa_update_framebuffer(ctx);
161 /* this updates the DrawBuffer's Width/Height if it's a FBO */
162 _mesa_update_draw_buffer_bounds(ctx);
163
164 EVERGREEN_STATECHANGE(context, cb);
165 EVERGREEN_STATECHANGE(context, db);
166 }
167
168 if (new_state & (_NEW_LIGHT)) {
169 EVERGREEN_STATECHANGE(context, pa);
170 if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION)
171 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
172 else
173 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, PROVOKING_VTX_LAST_bit);
174 }
175
176 evergreenUpdateStateParameters(ctx, new_state);
177
178 EVERGREEN_STATECHANGE(context, pa);
179 EVERGREEN_STATECHANGE(context, spi);
180
181 if(GL_TRUE == evergreen->bEnablePerspective)
182 {
183 /* Do scale XY and Z by 1/W0 for perspective correction on pos. For orthogonal case, set both to one. */
184 CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
185 CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
186
187 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
188
189 SETbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
190 CLEARbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
191
192 SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
193 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift,
194 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask);
195 }
196 else
197 {
198 /* For orthogonal case. */
199 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
200 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
201
202 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
203
204 CLEARbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, PERSP_GRADIENT_ENA_bit);
205 SETbit(evergreen->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
206
207 SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
208 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift,
209 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask);
210 }
211
212 context->radeon.NewGLState |= new_state;
213 }
214
215 static void evergreenSetAlphaState(GLcontext * ctx) //same
216 {
217 context_t *context = EVERGREEN_CONTEXT(ctx);
218 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
219 uint32_t alpha_func = REF_ALWAYS;
220 GLboolean really_enabled = ctx->Color.AlphaEnabled;
221
222 EVERGREEN_STATECHANGE(context, sx);
223
224 switch (ctx->Color.AlphaFunc) {
225 case GL_NEVER:
226 alpha_func = REF_NEVER;
227 break;
228 case GL_LESS:
229 alpha_func = REF_LESS;
230 break;
231 case GL_EQUAL:
232 alpha_func = REF_EQUAL;
233 break;
234 case GL_LEQUAL:
235 alpha_func = REF_LEQUAL;
236 break;
237 case GL_GREATER:
238 alpha_func = REF_GREATER;
239 break;
240 case GL_NOTEQUAL:
241 alpha_func = REF_NOTEQUAL;
242 break;
243 case GL_GEQUAL:
244 alpha_func = REF_GEQUAL;
245 break;
246 case GL_ALWAYS:
247 /*alpha_func = REF_ALWAYS; */
248 really_enabled = GL_FALSE;
249 break;
250 }
251
252 if (really_enabled) {
253 SETfield(evergreen->SX_ALPHA_TEST_CONTROL.u32All, alpha_func,
254 ALPHA_FUNC_shift, ALPHA_FUNC_mask);
255 SETbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
256 evergreen->SX_ALPHA_REF.f32All = ctx->Color.AlphaRef;
257 } else {
258 CLEARbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
259 }
260 }
261
262 static void evergreenAlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref) //same
263 {
264 (void)func;
265 (void)ref;
266 evergreenSetAlphaState(ctx);
267 }
268
269 static void evergreenBlendColor(GLcontext * ctx, const GLfloat cf[4]) //same
270 {
271 context_t *context = EVERGREEN_CONTEXT(ctx);
272 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
273
274 EVERGREEN_STATECHANGE(context, cb);
275
276 evergreen->CB_BLEND_RED.f32All = cf[0];
277 evergreen->CB_BLEND_GREEN.f32All = cf[1];
278 evergreen->CB_BLEND_BLUE.f32All = cf[2];
279 evergreen->CB_BLEND_ALPHA.f32All = cf[3];
280 }
281
282 static int evergreenblend_factor(GLenum factor, GLboolean is_src) //same
283 {
284 switch (factor) {
285 case GL_ZERO:
286 return BLEND_ZERO;
287 break;
288 case GL_ONE:
289 return BLEND_ONE;
290 break;
291 case GL_DST_COLOR:
292 return BLEND_DST_COLOR;
293 break;
294 case GL_ONE_MINUS_DST_COLOR:
295 return BLEND_ONE_MINUS_DST_COLOR;
296 break;
297 case GL_SRC_COLOR:
298 return BLEND_SRC_COLOR;
299 break;
300 case GL_ONE_MINUS_SRC_COLOR:
301 return BLEND_ONE_MINUS_SRC_COLOR;
302 break;
303 case GL_SRC_ALPHA:
304 return BLEND_SRC_ALPHA;
305 break;
306 case GL_ONE_MINUS_SRC_ALPHA:
307 return BLEND_ONE_MINUS_SRC_ALPHA;
308 break;
309 case GL_DST_ALPHA:
310 return BLEND_DST_ALPHA;
311 break;
312 case GL_ONE_MINUS_DST_ALPHA:
313 return BLEND_ONE_MINUS_DST_ALPHA;
314 break;
315 case GL_SRC_ALPHA_SATURATE:
316 return (is_src) ? BLEND_SRC_ALPHA_SATURATE : BLEND_ZERO;
317 break;
318 case GL_CONSTANT_COLOR:
319 return BLEND_CONSTANT_COLOR;
320 break;
321 case GL_ONE_MINUS_CONSTANT_COLOR:
322 return BLEND_ONE_MINUS_CONSTANT_COLOR;
323 break;
324 case GL_CONSTANT_ALPHA:
325 return BLEND_CONSTANT_ALPHA;
326 break;
327 case GL_ONE_MINUS_CONSTANT_ALPHA:
328 return BLEND_ONE_MINUS_CONSTANT_ALPHA;
329 break;
330 default:
331 fprintf(stderr, "unknown blend factor %x\n", factor);
332 return (is_src) ? BLEND_ONE : BLEND_ZERO;
333 break;
334 }
335 }
336
337 static void evergreenSetBlendState(GLcontext * ctx) //diff : CB_COLOR_CONTROL, CB_BLEND0_CONTROL bits
338 {
339 context_t *context = EVERGREEN_CONTEXT(ctx);
340 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
341 uint32_t blend_reg = 0, eqn, eqnA;
342
343 EVERGREEN_STATECHANGE(context, cb);
344
345 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
346 SETfield(blend_reg,
347 BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
348 SETfield(blend_reg,
349 BLEND_ZERO, COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
350 SETfield(blend_reg,
351 COMB_DST_PLUS_SRC, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
352 SETfield(blend_reg,
353 BLEND_ONE, ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
354 SETfield(blend_reg,
355 BLEND_ZERO, ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
356 SETfield(blend_reg,
357 COMB_DST_PLUS_SRC, ALPHA_COMB_FCN_shift, ALPHA_COMB_FCN_mask);
358 //if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_R600)
359 // evergreen->CB_BLEND_CONTROL.u32All = blend_reg;
360 //else
361 evergreen->CB_BLEND0_CONTROL.u32All = blend_reg;
362 return;
363 }
364
365 SETfield(blend_reg,
366 evergreenblend_factor(ctx->Color.BlendSrcRGB, GL_TRUE),
367 COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
368 SETfield(blend_reg,
369 evergreenblend_factor(ctx->Color.BlendDstRGB, GL_FALSE),
370 COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
371
372 switch (ctx->Color.BlendEquationRGB) {
373 case GL_FUNC_ADD:
374 eqn = COMB_DST_PLUS_SRC;
375 break;
376 case GL_FUNC_SUBTRACT:
377 eqn = COMB_SRC_MINUS_DST;
378 break;
379 case GL_FUNC_REVERSE_SUBTRACT:
380 eqn = COMB_DST_MINUS_SRC;
381 break;
382 case GL_MIN:
383 eqn = COMB_MIN_DST_SRC;
384 SETfield(blend_reg,
385 BLEND_ONE,
386 COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
387 SETfield(blend_reg,
388 BLEND_ONE,
389 COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
390 break;
391 case GL_MAX:
392 eqn = COMB_MAX_DST_SRC;
393 SETfield(blend_reg,
394 BLEND_ONE,
395 COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
396 SETfield(blend_reg,
397 BLEND_ONE,
398 COLOR_DESTBLEND_shift, COLOR_DESTBLEND_mask);
399 break;
400
401 default:
402 fprintf(stderr,
403 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
404 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
405 return;
406 }
407 SETfield(blend_reg,
408 eqn, COLOR_COMB_FCN_shift, COLOR_COMB_FCN_mask);
409
410 SETfield(blend_reg,
411 evergreenblend_factor(ctx->Color.BlendSrcA, GL_TRUE),
412 ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
413 SETfield(blend_reg,
414 evergreenblend_factor(ctx->Color.BlendDstA, GL_FALSE),
415 ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
416
417 switch (ctx->Color.BlendEquationA) {
418 case GL_FUNC_ADD:
419 eqnA = COMB_DST_PLUS_SRC;
420 break;
421 case GL_FUNC_SUBTRACT:
422 eqnA = COMB_SRC_MINUS_DST;
423 break;
424 case GL_FUNC_REVERSE_SUBTRACT:
425 eqnA = COMB_DST_MINUS_SRC;
426 break;
427 case GL_MIN:
428 eqnA = COMB_MIN_DST_SRC;
429 SETfield(blend_reg,
430 BLEND_ONE,
431 ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
432 SETfield(blend_reg,
433 BLEND_ONE,
434 ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
435 break;
436 case GL_MAX:
437 eqnA = COMB_MAX_DST_SRC;
438 SETfield(blend_reg,
439 BLEND_ONE,
440 ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
441 SETfield(blend_reg,
442 BLEND_ONE,
443 ALPHA_DESTBLEND_shift, ALPHA_DESTBLEND_mask);
444 break;
445 default:
446 fprintf(stderr,
447 "[%s:%u] Invalid A blend equation (0x%04x).\n",
448 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
449 return;
450 }
451
452 SETfield(blend_reg,
453 eqnA, ALPHA_COMB_FCN_shift, ALPHA_COMB_FCN_mask);
454
455 SETbit(blend_reg, SEPARATE_ALPHA_BLEND_bit);
456
457 SETbit(blend_reg, EG_CB_BLENDX_CONTROL_ENABLE_bit);
458
459 evergreen->CB_BLEND0_CONTROL.u32All = blend_reg;
460 }
461
462 static void evergreenBlendEquationSeparate(GLcontext * ctx,
463 GLenum modeRGB, GLenum modeA) //same
464 {
465 evergreenSetBlendState(ctx);
466 }
467
468 static void evergreenBlendFuncSeparate(GLcontext * ctx,
469 GLenum sfactorRGB, GLenum dfactorRGB,
470 GLenum sfactorA, GLenum dfactorA) //same
471 {
472 evergreenSetBlendState(ctx);
473 }
474
475 static GLuint evergreen_translate_logicop(GLenum logicop) //same
476 {
477 switch (logicop) {
478 case GL_CLEAR:
479 return 0x00;
480 case GL_SET:
481 return 0xff;
482 case GL_COPY:
483 return 0xcc;
484 case GL_COPY_INVERTED:
485 return 0x33;
486 case GL_NOOP:
487 return 0xaa;
488 case GL_INVERT:
489 return 0x55;
490 case GL_AND:
491 return 0x88;
492 case GL_NAND:
493 return 0x77;
494 case GL_OR:
495 return 0xee;
496 case GL_NOR:
497 return 0x11;
498 case GL_XOR:
499 return 0x66;
500 case GL_EQUIV:
501 return 0x99;
502 case GL_AND_REVERSE:
503 return 0x44;
504 case GL_AND_INVERTED:
505 return 0x22;
506 case GL_OR_REVERSE:
507 return 0xdd;
508 case GL_OR_INVERTED:
509 return 0xbb;
510 default:
511 fprintf(stderr, "unknown blend logic operation %x\n", logicop);
512 return 0xcc;
513 }
514 }
515
516 static void evergreenSetLogicOpState(GLcontext *ctx) //diff : CB_COLOR_CONTROL.ROP3 is actually same bits.
517 {
518 context_t *context = EVERGREEN_CONTEXT(ctx);
519 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
520
521 EVERGREEN_STATECHANGE(context, cb);
522
523 if (RGBA_LOGICOP_ENABLED(ctx))
524 SETfield(evergreen->CB_COLOR_CONTROL.u32All,
525 evergreen_translate_logicop(ctx->Color.LogicOp),
526 EG_CB_COLOR_CONTROL__ROP3_shift,
527 EG_CB_COLOR_CONTROL__ROP3_mask);
528 else
529 SETfield(evergreen->CB_COLOR_CONTROL.u32All, 0xCC,
530 EG_CB_COLOR_CONTROL__ROP3_shift,
531 EG_CB_COLOR_CONTROL__ROP3_mask);
532 }
533
534 static void evergreenClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq ) //same , but PA_CL_UCP_0_ offset diff
535 {
536 context_t *context = EVERGREEN_CONTEXT(ctx);
537 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
538 GLint p;
539 GLint *ip;
540
541 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
542 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
543
544 EVERGREEN_STATECHANGE(context, pa);
545
546 evergreen->ucp[p].PA_CL_UCP_0_X.u32All = ip[0];
547 evergreen->ucp[p].PA_CL_UCP_0_Y.u32All = ip[1];
548 evergreen->ucp[p].PA_CL_UCP_0_Z.u32All = ip[2];
549 evergreen->ucp[p].PA_CL_UCP_0_W.u32All = ip[3];
550 }
551
552 static void evergreenSetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state) //diff in func calls
553 {
554 context_t *context = EVERGREEN_CONTEXT(ctx);
555 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
556 GLuint p;
557
558 p = cap - GL_CLIP_PLANE0;
559
560 EVERGREEN_STATECHANGE(context, pa);
561
562 if (state) {
563 evergreen->PA_CL_CLIP_CNTL.u32All |= (UCP_ENA_0_bit << p);
564 evergreen->ucp[p].enabled = GL_TRUE;
565 evergreenClipPlane(ctx, cap, NULL);
566 } else {
567 evergreen->PA_CL_CLIP_CNTL.u32All &= ~(UCP_ENA_0_bit << p);
568 evergreen->ucp[p].enabled = GL_FALSE;
569 }
570 }
571
572 static void evergreenSetDBRenderState(GLcontext * ctx)
573 {
574 context_t *context = EVERGREEN_CONTEXT(ctx);
575 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
576 struct evergreen_fragment_program *fp =
577 (struct evergreen_fragment_program *)(ctx->FragmentProgram._Current);
578
579 EVERGREEN_STATECHANGE(context, db);
580
581 SETbit(evergreen->DB_SHADER_CONTROL.u32All,
582 DUAL_EXPORT_ENABLE_bit);
583 SETfield(evergreen->DB_SHADER_CONTROL.u32All, EARLY_Z_THEN_LATE_Z,
584 Z_ORDER_shift,
585 Z_ORDER_mask);
586 /* XXX need to enable htile for hiz/s */
587 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
588 FORCE_HIZ_ENABLE_shift,
589 FORCE_HIZ_ENABLE_mask);
590 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
591 FORCE_HIS_ENABLE0_shift,
592 FORCE_HIS_ENABLE0_mask);
593 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE,
594 FORCE_HIS_ENABLE1_shift,
595 FORCE_HIS_ENABLE1_mask);
596
597 if (context->radeon.query.current)
598 {
599 SETbit(evergreen->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
600 SETbit(evergreen->DB_COUNT_CONTROL.u32All,
601 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit);
602 }
603 else
604 {
605 CLEARbit(evergreen->DB_RENDER_OVERRIDE.u32All, NOOP_CULL_DISABLE_bit);
606 CLEARbit(evergreen->DB_COUNT_CONTROL.u32All,
607 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit);
608 }
609
610 if (fp)
611 {
612 if (fp->r700Shader.killIsUsed)
613 {
614 SETbit(evergreen->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
615 }
616 else
617 {
618 CLEARbit(evergreen->DB_SHADER_CONTROL.u32All, KILL_ENABLE_bit);
619 }
620
621 if (fp->r700Shader.depthIsExported)
622 {
623 SETbit(evergreen->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
624 }
625 else
626 {
627 CLEARbit(evergreen->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
628 }
629 }
630 }
631
632 void evergreenUpdateShaderStates(GLcontext * ctx)
633 {
634 evergreenSetDBRenderState(ctx);
635 evergreenUpdateTextureState(ctx);
636 }
637
638 static void evergreenSetDepthState(GLcontext * ctx) //same
639 {
640 context_t *context = EVERGREEN_CONTEXT(ctx);
641 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
642
643 EVERGREEN_STATECHANGE(context, db);
644
645 if (ctx->Depth.Test)
646 {
647 SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit);
648 if (ctx->Depth.Mask)
649 {
650 SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
651 }
652 else
653 {
654 CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
655 }
656
657 switch (ctx->Depth.Func)
658 {
659 case GL_NEVER:
660 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_NEVER,
661 ZFUNC_shift, ZFUNC_mask);
662 break;
663 case GL_LESS:
664 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_LESS,
665 ZFUNC_shift, ZFUNC_mask);
666 break;
667 case GL_EQUAL:
668 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_EQUAL,
669 ZFUNC_shift, ZFUNC_mask);
670 break;
671 case GL_LEQUAL:
672 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_LEQUAL,
673 ZFUNC_shift, ZFUNC_mask);
674 break;
675 case GL_GREATER:
676 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_GREATER,
677 ZFUNC_shift, ZFUNC_mask);
678 break;
679 case GL_NOTEQUAL:
680 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_NOTEQUAL,
681 ZFUNC_shift, ZFUNC_mask);
682 break;
683 case GL_GEQUAL:
684 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_GEQUAL,
685 ZFUNC_shift, ZFUNC_mask);
686 break;
687 case GL_ALWAYS:
688 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
689 ZFUNC_shift, ZFUNC_mask);
690 break;
691 default:
692 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
693 ZFUNC_shift, ZFUNC_mask);
694 break;
695 }
696 }
697 else
698 {
699 CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_ENABLE_bit);
700 CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
701 }
702 }
703
704 static void evergreenSetStencilState(GLcontext * ctx, GLboolean state) //same
705 {
706 context_t *context = EVERGREEN_CONTEXT(ctx);
707 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
708 GLboolean hw_stencil = GL_FALSE;
709
710 if (ctx->DrawBuffer) {
711 struct radeon_renderbuffer *rrbStencil
712 = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
713 hw_stencil = (rrbStencil && rrbStencil->bo);
714 }
715
716 if (hw_stencil) {
717 EVERGREEN_STATECHANGE(context, db);
718 if (state) {
719 SETbit(evergreen->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
720 SETbit(evergreen->DB_DEPTH_CONTROL.u32All, BACKFACE_ENABLE_bit);
721 } else
722 CLEARbit(evergreen->DB_DEPTH_CONTROL.u32All, STENCIL_ENABLE_bit);
723 }
724 }
725
726 static void evergreenUpdateCulling(GLcontext * ctx) //same
727 {
728 context_t *context = EVERGREEN_CONTEXT(ctx);
729 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
730
731 EVERGREEN_STATECHANGE(context, pa);
732
733 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
734 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
735 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
736
737 if (ctx->Polygon.CullFlag)
738 {
739 switch (ctx->Polygon.CullFaceMode)
740 {
741 case GL_FRONT:
742 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
743 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
744 break;
745 case GL_BACK:
746 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
747 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
748 break;
749 case GL_FRONT_AND_BACK:
750 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
751 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
752 break;
753 default:
754 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_FRONT_bit);
755 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, CULL_BACK_bit);
756 break;
757 }
758 }
759
760 switch (ctx->Polygon.FrontFace)
761 {
762 case GL_CW:
763 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
764 break;
765 case GL_CCW:
766 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit);
767 break;
768 default:
769 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, FACE_bit); /* default: ccw */
770 break;
771 }
772
773 /* Winding is inverted when rendering to FBO */
774 if (ctx->DrawBuffer && ctx->DrawBuffer->Name)
775 evergreen->PA_SU_SC_MODE_CNTL.u32All ^= FACE_bit;
776 }
777
778 static void evergreenSetPolygonOffsetState(GLcontext * ctx, GLboolean state) //same
779 {
780 context_t *context = EVERGREEN_CONTEXT(ctx);
781 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
782
783 EVERGREEN_STATECHANGE(context, pa);
784
785 if (state) {
786 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_FRONT_ENABLE_bit);
787 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_BACK_ENABLE_bit);
788 SETbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_PARA_ENABLE_bit);
789 } else {
790 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_FRONT_ENABLE_bit);
791 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_BACK_ENABLE_bit);
792 CLEARbit(evergreen->PA_SU_SC_MODE_CNTL.u32All, POLY_OFFSET_PARA_ENABLE_bit);
793 }
794 }
795
796 static void evergreenUpdateLineStipple(GLcontext * ctx) //diff
797 {
798 /* TODO */
799 }
800
801 void evergreenSetScissor(context_t *context) //diff
802 {
803 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
804 unsigned x1, y1, x2, y2;
805 int id = 0;
806 struct radeon_renderbuffer *rrb;
807
808 rrb = radeon_get_colorbuffer(&context->radeon);
809 if (!rrb || !rrb->bo) {
810 return;
811 }
812 if (context->radeon.state.scissor.enabled) {
813 x1 = context->radeon.state.scissor.rect.x1;
814 y1 = context->radeon.state.scissor.rect.y1;
815 x2 = context->radeon.state.scissor.rect.x2;
816 y2 = context->radeon.state.scissor.rect.y2;
817 /* r600 has exclusive BR scissors */
818 if (context->radeon.radeonScreen->kernel_mm) {
819 x2++;
820 y2++;
821 }
822 } else {
823 if (context->radeon.radeonScreen->driScreen->dri2.enabled) {
824 x1 = 0;
825 y1 = 0;
826 x2 = rrb->base.Width;
827 y2 = rrb->base.Height;
828 } else {
829 x1 = rrb->dPriv->x;
830 y1 = rrb->dPriv->y;
831 x2 = rrb->dPriv->x + rrb->dPriv->w;
832 y2 = rrb->dPriv->y + rrb->dPriv->h;
833 }
834 }
835
836 EVERGREEN_STATECHANGE(context, pa);
837
838 /* screen */
839 /* TODO : check WINDOW_OFFSET_DISABLE */
840 //SETbit(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
841 SETfield(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, x1,
842 PA_SC_SCREEN_SCISSOR_TL__TL_X_shift, EG_PA_SC_SCREEN_SCISSOR_TL__TL_X_mask);
843 SETfield(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, y1,
844 PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift, EG_PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask);
845
846 SETfield(evergreen->PA_SC_SCREEN_SCISSOR_BR.u32All, x2,
847 PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, EG_PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
848 SETfield(evergreen->PA_SC_SCREEN_SCISSOR_BR.u32All, y2,
849 PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, EG_PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
850
851 /* window */
852 SETbit(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
853 SETfield(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, x1,
854 PA_SC_WINDOW_SCISSOR_TL__TL_X_shift, EG_PA_SC_WINDOW_SCISSOR_TL__TL_X_mask);
855 SETfield(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, y1,
856 PA_SC_WINDOW_SCISSOR_TL__TL_Y_shift, EG_PA_SC_WINDOW_SCISSOR_TL__TL_Y_mask);
857
858 SETfield(evergreen->PA_SC_WINDOW_SCISSOR_BR.u32All, x2,
859 PA_SC_WINDOW_SCISSOR_BR__BR_X_shift, EG_PA_SC_WINDOW_SCISSOR_BR__BR_X_mask);
860 SETfield(evergreen->PA_SC_WINDOW_SCISSOR_BR.u32All, y2,
861 PA_SC_WINDOW_SCISSOR_BR__BR_Y_shift, EG_PA_SC_WINDOW_SCISSOR_BR__BR_Y_mask);
862
863
864 SETfield(evergreen->PA_SC_CLIPRECT_0_TL.u32All, x1,
865 PA_SC_CLIPRECT_0_TL__TL_X_shift, EG_PA_SC_CLIPRECT_0_TL__TL_X_mask);
866 SETfield(evergreen->PA_SC_CLIPRECT_0_TL.u32All, y1,
867 PA_SC_CLIPRECT_0_TL__TL_Y_shift, EG_PA_SC_CLIPRECT_0_TL__TL_Y_mask);
868 SETfield(evergreen->PA_SC_CLIPRECT_0_BR.u32All, x2,
869 PA_SC_CLIPRECT_0_BR__BR_X_shift, EG_PA_SC_CLIPRECT_0_BR__BR_X_mask);
870 SETfield(evergreen->PA_SC_CLIPRECT_0_BR.u32All, y2,
871 PA_SC_CLIPRECT_0_BR__BR_Y_shift, EG_PA_SC_CLIPRECT_0_BR__BR_Y_mask);
872
873 evergreen->PA_SC_CLIPRECT_1_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
874 evergreen->PA_SC_CLIPRECT_1_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
875 evergreen->PA_SC_CLIPRECT_2_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
876 evergreen->PA_SC_CLIPRECT_2_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
877 evergreen->PA_SC_CLIPRECT_3_TL.u32All = evergreen->PA_SC_CLIPRECT_0_TL.u32All;
878 evergreen->PA_SC_CLIPRECT_3_BR.u32All = evergreen->PA_SC_CLIPRECT_0_BR.u32All;
879
880 /* more....2d clip */
881 SETbit(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
882 SETfield(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, x1,
883 PA_SC_GENERIC_SCISSOR_TL__TL_X_shift, EG_PA_SC_GENERIC_SCISSOR_TL__TL_X_mask);
884 SETfield(evergreen->PA_SC_GENERIC_SCISSOR_TL.u32All, y1,
885 PA_SC_GENERIC_SCISSOR_TL__TL_Y_shift, EG_PA_SC_GENERIC_SCISSOR_TL__TL_Y_mask);
886 SETfield(evergreen->PA_SC_GENERIC_SCISSOR_BR.u32All, x2,
887 PA_SC_GENERIC_SCISSOR_BR__BR_X_shift, EG_PA_SC_GENERIC_SCISSOR_BR__BR_X_mask);
888 SETfield(evergreen->PA_SC_GENERIC_SCISSOR_BR.u32All, y2,
889 PA_SC_GENERIC_SCISSOR_BR__BR_Y_shift, EG_PA_SC_GENERIC_SCISSOR_BR__BR_Y_mask);
890
891 SETbit(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
892 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, x1,
893 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask);
894 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, y1,
895 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask);
896 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, x2,
897 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask);
898 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, y2,
899 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask);
900
901 id = 1;
902 SETbit(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
903 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, x1,
904 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask);
905 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_TL.u32All, y1,
906 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask);
907 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, x2,
908 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask);
909 SETfield(evergreen->viewport[id].PA_SC_VPORT_SCISSOR_0_BR.u32All, y2,
910 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask);
911
912 evergreen->viewport[id].enabled = GL_TRUE;
913 }
914
915 static void evergreenUpdateWindow(GLcontext * ctx, int id) //diff in calling evergreenSetScissor
916 {
917 context_t *context = EVERGREEN_CONTEXT(ctx);
918 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
919 __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon);
920 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
921 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
922 const GLfloat *v = ctx->Viewport._WindowMap.m;
923 const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
924 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
925 GLfloat y_scale, y_bias;
926
927 if (render_to_fbo) {
928 y_scale = 1.0;
929 y_bias = 0;
930 } else {
931 y_scale = -1.0;
932 y_bias = yoffset;
933 }
934
935 GLfloat sx = v[MAT_SX];
936 GLfloat tx = v[MAT_TX] + xoffset;
937 GLfloat sy = v[MAT_SY] * y_scale;
938 GLfloat ty = (v[MAT_TY] * y_scale) + y_bias;
939 GLfloat sz = v[MAT_SZ] * depthScale;
940 GLfloat tz = v[MAT_TZ] * depthScale;
941
942 EVERGREEN_STATECHANGE(context, pa);
943
944
945 evergreen->viewport[id].PA_CL_VPORT_XSCALE.f32All = sx;
946 evergreen->viewport[id].PA_CL_VPORT_XOFFSET.f32All = tx;
947
948 evergreen->viewport[id].PA_CL_VPORT_YSCALE.f32All = sy;
949 evergreen->viewport[id].PA_CL_VPORT_YOFFSET.f32All = ty;
950
951 evergreen->viewport[id].PA_CL_VPORT_ZSCALE.f32All = sz;
952 evergreen->viewport[id].PA_CL_VPORT_ZOFFSET.f32All = tz;
953
954 if (ctx->Transform.DepthClamp) {
955 evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
956 evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
957 SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
958 SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
959 } else {
960 evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = 0.0;
961 evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = 1.0;
962 CLEARbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_NEAR_DISABLE_bit);
963 CLEARbit(evergreen->PA_CL_CLIP_CNTL.u32All, ZCLIP_FAR_DISABLE_bit);
964 }
965
966 evergreen->viewport[id].enabled = GL_TRUE;
967
968 evergreenSetScissor(context);
969 }
970
971 static void evergreenEnable(GLcontext * ctx, GLenum cap, GLboolean state) //diff in func calls
972 {
973 context_t *context = EVERGREEN_CONTEXT(ctx);
974
975 switch (cap) {
976 case GL_TEXTURE_1D:
977 case GL_TEXTURE_2D:
978 case GL_TEXTURE_3D:
979 /* empty */
980 break;
981 case GL_FOG:
982 /* empty */
983 break;
984 case GL_ALPHA_TEST:
985 evergreenSetAlphaState(ctx);
986 break;
987 case GL_COLOR_LOGIC_OP:
988 evergreenSetLogicOpState(ctx);
989 /* fall-through, because logic op overrides blending */
990 case GL_BLEND:
991 evergreenSetBlendState(ctx);
992 break;
993 case GL_CLIP_PLANE0:
994 case GL_CLIP_PLANE1:
995 case GL_CLIP_PLANE2:
996 case GL_CLIP_PLANE3:
997 case GL_CLIP_PLANE4:
998 case GL_CLIP_PLANE5:
999 evergreenSetClipPlaneState(ctx, cap, state);
1000 break;
1001 case GL_DEPTH_TEST:
1002 evergreenSetDepthState(ctx);
1003 break;
1004 case GL_STENCIL_TEST:
1005 evergreenSetStencilState(ctx, state);
1006 break;
1007 case GL_CULL_FACE:
1008 evergreenUpdateCulling(ctx);
1009 break;
1010 case GL_POLYGON_OFFSET_POINT:
1011 case GL_POLYGON_OFFSET_LINE:
1012 case GL_POLYGON_OFFSET_FILL:
1013 evergreenSetPolygonOffsetState(ctx, state);
1014 break;
1015 case GL_SCISSOR_TEST:
1016 radeon_firevertices(&context->radeon);
1017 context->radeon.state.scissor.enabled = state;
1018 radeonUpdateScissor(ctx);
1019 break;
1020 case GL_LINE_STIPPLE:
1021 evergreenUpdateLineStipple(ctx);
1022 break;
1023 case GL_DEPTH_CLAMP:
1024 evergreenUpdateWindow(ctx, 0);
1025 break;
1026 default:
1027 break;
1028 }
1029
1030 }
1031
1032 static void evergreenColorMask(GLcontext * ctx,
1033 GLboolean r, GLboolean g, GLboolean b, GLboolean a) //same
1034 {
1035 context_t *context = EVERGREEN_CONTEXT(ctx);
1036 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1037 unsigned int mask = ((r ? 1 : 0) |
1038 (g ? 2 : 0) |
1039 (b ? 4 : 0) |
1040 (a ? 8 : 0));
1041
1042 if (mask != evergreen->CB_TARGET_MASK.u32All) {
1043 EVERGREEN_STATECHANGE(context, cb);
1044 SETfield(evergreen->CB_TARGET_MASK.u32All, mask, TARGET0_ENABLE_shift, TARGET0_ENABLE_mask);
1045 }
1046 }
1047
1048 static void evergreenDepthFunc(GLcontext * ctx, GLenum func) //same
1049 {
1050 evergreenSetDepthState(ctx);
1051 }
1052
1053 static void evergreenDepthMask(GLcontext * ctx, GLboolean mask) //same
1054 {
1055 evergreenSetDepthState(ctx);
1056 }
1057
1058 static void evergreenCullFace(GLcontext * ctx, GLenum mode) //same
1059 {
1060 evergreenUpdateCulling(ctx);
1061 }
1062
1063 static void evergreenFogfv(GLcontext * ctx, GLenum pname, const GLfloat * param) //same
1064 {
1065 }
1066
1067 static void evergreenUpdatePolygonMode(GLcontext * ctx) //same
1068 {
1069 context_t *context = EVERGREEN_CONTEXT(ctx);
1070 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1071
1072 EVERGREEN_STATECHANGE(context, pa);
1073
1074 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DISABLE_POLY_MODE, POLY_MODE_shift, POLY_MODE_mask);
1075
1076 /* Only do something if a polygon mode is wanted, default is GL_FILL */
1077 if (ctx->Polygon.FrontMode != GL_FILL ||
1078 ctx->Polygon.BackMode != GL_FILL) {
1079 GLenum f, b;
1080
1081 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
1082 * correctly by selecting the correct front and back face
1083 */
1084 f = ctx->Polygon.FrontMode;
1085 b = ctx->Polygon.BackMode;
1086
1087 /* Enable polygon mode */
1088 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DUAL_MODE, POLY_MODE_shift, POLY_MODE_mask);
1089
1090 switch (f) {
1091 case GL_LINE:
1092 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_LINES,
1093 POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1094 break;
1095 case GL_POINT:
1096 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_POINTS,
1097 POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1098 break;
1099 case GL_FILL:
1100 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_TRIANGLES,
1101 POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask);
1102 break;
1103 }
1104
1105 switch (b) {
1106 case GL_LINE:
1107 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_LINES,
1108 POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1109 break;
1110 case GL_POINT:
1111 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_POINTS,
1112 POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1113 break;
1114 case GL_FILL:
1115 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, X_DRAW_TRIANGLES,
1116 POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask);
1117 break;
1118 }
1119 }
1120 }
1121
1122 static void evergreenFrontFace(GLcontext * ctx, GLenum mode) //same
1123 {
1124 evergreenUpdateCulling(ctx);
1125 evergreenUpdatePolygonMode(ctx);
1126 }
1127
1128 static void evergreenShadeModel(GLcontext * ctx, GLenum mode) //same
1129 {
1130 context_t *context = EVERGREEN_CONTEXT(ctx);
1131 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1132
1133 EVERGREEN_STATECHANGE(context, spi);
1134
1135 /* also need to set/clear FLAT_SHADE bit per param in SPI_PS_INPUT_CNTL_[0-31] */
1136 switch (mode) {
1137 case GL_FLAT:
1138 SETbit(evergreen->SPI_INTERP_CONTROL_0.u32All, FLAT_SHADE_ENA_bit);
1139 break;
1140 case GL_SMOOTH:
1141 CLEARbit(evergreen->SPI_INTERP_CONTROL_0.u32All, FLAT_SHADE_ENA_bit);
1142 break;
1143 default:
1144 return;
1145 }
1146 }
1147
1148 static void evergreenLogicOpcode(GLcontext *ctx, GLenum logicop) //diff
1149 {
1150 if (RGBA_LOGICOP_ENABLED(ctx))
1151 evergreenSetLogicOpState(ctx);
1152 }
1153
1154 static void evergreenPointSize(GLcontext * ctx, GLfloat size) //same
1155 {
1156 context_t *context = EVERGREEN_CONTEXT(ctx);
1157 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1158
1159 EVERGREEN_STATECHANGE(context, pa);
1160
1161 /* We need to clamp to user defined range here, because
1162 * the HW clamping happens only for per vertex point size. */
1163 size = CLAMP(size, ctx->Point.MinSize, ctx->Point.MaxSize);
1164
1165 /* same size limits for AA, non-AA points */
1166 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
1167
1168 /* format is 12.4 fixed point */
1169 SETfield(evergreen->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
1170 PA_SU_POINT_SIZE__HEIGHT_shift, PA_SU_POINT_SIZE__HEIGHT_mask);
1171 SETfield(evergreen->PA_SU_POINT_SIZE.u32All, (int)(size * 8.0),
1172 PA_SU_POINT_SIZE__WIDTH_shift, PA_SU_POINT_SIZE__WIDTH_mask);
1173
1174 }
1175
1176 static void evergreenPointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param) //same
1177 {
1178 context_t *context = EVERGREEN_CONTEXT(ctx);
1179 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1180
1181 EVERGREEN_STATECHANGE(context, pa);
1182
1183 /* format is 12.4 fixed point */
1184 switch (pname) {
1185 case GL_POINT_SIZE_MIN:
1186 SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MinSize * 8.0),
1187 MIN_SIZE_shift, MIN_SIZE_mask);
1188 evergreenPointSize(ctx, ctx->Point.Size);
1189 break;
1190 case GL_POINT_SIZE_MAX:
1191 SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, (int)(ctx->Point.MaxSize * 8.0),
1192 MAX_SIZE_shift, MAX_SIZE_mask);
1193 evergreenPointSize(ctx, ctx->Point.Size);
1194 break;
1195 case GL_POINT_DISTANCE_ATTENUATION:
1196 break;
1197 case GL_POINT_FADE_THRESHOLD_SIZE:
1198 break;
1199 default:
1200 break;
1201 }
1202 }
1203
1204 static int evergreen_translate_stencil_func(int func) //same
1205 {
1206 switch (func) {
1207 case GL_NEVER:
1208 return REF_NEVER;
1209 case GL_LESS:
1210 return REF_LESS;
1211 case GL_EQUAL:
1212 return REF_EQUAL;
1213 case GL_LEQUAL:
1214 return REF_LEQUAL;
1215 case GL_GREATER:
1216 return REF_GREATER;
1217 case GL_NOTEQUAL:
1218 return REF_NOTEQUAL;
1219 case GL_GEQUAL:
1220 return REF_GEQUAL;
1221 case GL_ALWAYS:
1222 return REF_ALWAYS;
1223 }
1224 return 0;
1225 }
1226
1227 static void evergreenStencilFuncSeparate(GLcontext * ctx, GLenum face,
1228 GLenum func, GLint ref, GLuint mask) //same
1229 {
1230 context_t *context = EVERGREEN_CONTEXT(ctx);
1231 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1232 const unsigned back = ctx->Stencil._BackFace;
1233
1234
1235 EVERGREEN_STATECHANGE(context, db);
1236
1237 //front
1238 SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.Ref[0],
1239 STENCILREF_shift, STENCILREF_mask);
1240 SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.ValueMask[0],
1241 STENCILMASK_shift, STENCILMASK_mask);
1242
1243 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_func(ctx->Stencil.Function[0]),
1244 STENCILFUNC_shift, STENCILFUNC_mask);
1245
1246 //back
1247 SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.Ref[back],
1248 STENCILREF_BF_shift, STENCILREF_BF_mask);
1249 SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.ValueMask[back],
1250 STENCILMASK_BF_shift, STENCILMASK_BF_mask);
1251
1252 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_func(ctx->Stencil.Function[back]),
1253 STENCILFUNC_BF_shift, STENCILFUNC_BF_mask);
1254 }
1255
1256 static void evergreenStencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask) //same
1257 {
1258 context_t *context = EVERGREEN_CONTEXT(ctx);
1259 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1260 const unsigned back = ctx->Stencil._BackFace;
1261
1262 EVERGREEN_STATECHANGE(context, db);
1263
1264 // front
1265 SETfield(evergreen->DB_STENCILREFMASK.u32All, ctx->Stencil.WriteMask[0],
1266 STENCILWRITEMASK_shift, STENCILWRITEMASK_mask);
1267
1268 // back
1269 SETfield(evergreen->DB_STENCILREFMASK_BF.u32All, ctx->Stencil.WriteMask[back],
1270 STENCILWRITEMASK_BF_shift, STENCILWRITEMASK_BF_mask);
1271
1272 }
1273
1274 static int evergreen_translate_stencil_op(int op) //same
1275 {
1276 switch (op) {
1277 case GL_KEEP:
1278 return STENCIL_KEEP;
1279 case GL_ZERO:
1280 return STENCIL_ZERO;
1281 case GL_REPLACE:
1282 return STENCIL_REPLACE;
1283 case GL_INCR:
1284 return STENCIL_INCR_CLAMP;
1285 case GL_DECR:
1286 return STENCIL_DECR_CLAMP;
1287 case GL_INCR_WRAP_EXT:
1288 return STENCIL_INCR_WRAP;
1289 case GL_DECR_WRAP_EXT:
1290 return STENCIL_DECR_WRAP;
1291 case GL_INVERT:
1292 return STENCIL_INVERT;
1293 default:
1294 WARN_ONCE("Do not know how to translate stencil op");
1295 return STENCIL_KEEP;
1296 }
1297 return 0;
1298 }
1299
1300 static void evergreenStencilOpSeparate(GLcontext * ctx, GLenum face,
1301 GLenum fail, GLenum zfail, GLenum zpass) //same
1302 {
1303 context_t *context = EVERGREEN_CONTEXT(ctx);
1304 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1305 const unsigned back = ctx->Stencil._BackFace;
1306
1307 EVERGREEN_STATECHANGE(context, db);
1308
1309 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.FailFunc[0]),
1310 STENCILFAIL_shift, STENCILFAIL_mask);
1311 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZFailFunc[0]),
1312 STENCILZFAIL_shift, STENCILZFAIL_mask);
1313 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZPassFunc[0]),
1314 STENCILZPASS_shift, STENCILZPASS_mask);
1315
1316 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.FailFunc[back]),
1317 STENCILFAIL_BF_shift, STENCILFAIL_BF_mask);
1318 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZFailFunc[back]),
1319 STENCILZFAIL_BF_shift, STENCILZFAIL_BF_mask);
1320 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, evergreen_translate_stencil_op(ctx->Stencil.ZPassFunc[back]),
1321 STENCILZPASS_BF_shift, STENCILZPASS_BF_mask);
1322 }
1323
1324 static void evergreenViewport(GLcontext * ctx,
1325 GLint x,
1326 GLint y,
1327 GLsizei width,
1328 GLsizei height) //diff in evergreenUpdateWindow
1329 {
1330 evergreenUpdateWindow(ctx, 0);
1331
1332 radeon_viewport(ctx, x, y, width, height);
1333 }
1334
1335 static void evergreenDepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval) //diff in evergreenUpdateWindow
1336 {
1337 evergreenUpdateWindow(ctx, 0);
1338 }
1339
1340 static void evergreenLineWidth(GLcontext * ctx, GLfloat widthf) //same
1341 {
1342 context_t *context = EVERGREEN_CONTEXT(ctx);
1343 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1344 uint32_t lineWidth = (uint32_t)((widthf * 0.5) * (1 << 4));
1345
1346 EVERGREEN_STATECHANGE(context, pa);
1347
1348 if (lineWidth > 0xFFFF)
1349 lineWidth = 0xFFFF;
1350 SETfield(evergreen->PA_SU_LINE_CNTL.u32All,(uint16_t)lineWidth,
1351 PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
1352 }
1353
1354 static void evergreenLineStipple(GLcontext *ctx, GLint factor, GLushort pattern) //same
1355 {
1356 context_t *context = EVERGREEN_CONTEXT(ctx);
1357 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1358
1359 EVERGREEN_STATECHANGE(context, pa);
1360
1361 SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, pattern, LINE_PATTERN_shift, LINE_PATTERN_mask);
1362 SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, (factor-1), REPEAT_COUNT_shift, REPEAT_COUNT_mask);
1363 SETfield(evergreen->PA_SC_LINE_STIPPLE.u32All, 1, AUTO_RESET_CNTL_shift, AUTO_RESET_CNTL_mask);
1364 }
1365
1366 static void evergreenPolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units) //diff :
1367 //all register here offset diff, bits same
1368 {
1369 context_t *context = EVERGREEN_CONTEXT(ctx);
1370 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1371 GLfloat constant = units;
1372 GLchar depth = 0;
1373
1374 EVERGREEN_STATECHANGE(context, pa);
1375
1376 switch (ctx->Visual.depthBits) {
1377 case 16:
1378 constant *= 4.0;
1379 depth = -16;
1380 break;
1381 case 24:
1382 constant *= 2.0;
1383 depth = -24;
1384 break;
1385 }
1386
1387 factor *= 12.0;
1388 SETfield(evergreen->PA_SU_POLY_OFFSET_DB_FMT_CNTL.u32All, depth,
1389 POLY_OFFSET_NEG_NUM_DB_BITS_shift, POLY_OFFSET_NEG_NUM_DB_BITS_mask);
1390 //evergreen->PA_SU_POLY_OFFSET_CLAMP.f32All = constant; //???
1391 evergreen->PA_SU_POLY_OFFSET_FRONT_SCALE.f32All = factor;
1392 evergreen->PA_SU_POLY_OFFSET_FRONT_OFFSET.f32All = constant;
1393 evergreen->PA_SU_POLY_OFFSET_BACK_SCALE.f32All = factor;
1394 evergreen->PA_SU_POLY_OFFSET_BACK_OFFSET.f32All = constant;
1395 }
1396
1397 static void evergreenPolygonMode(GLcontext * ctx, GLenum face, GLenum mode) //same
1398 {
1399 (void)face;
1400 (void)mode;
1401
1402 evergreenUpdatePolygonMode(ctx);
1403 }
1404
1405 static void evergreenRenderMode(GLcontext * ctx, GLenum mode) //same
1406 {
1407 }
1408
1409 //TODO : move to kernel.
1410 static void evergreenInitSQConfig(GLcontext * ctx)
1411 {
1412 context_t *context = EVERGREEN_CONTEXT(ctx);
1413 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1414
1415 uint32_t uSqNumCfInsts, uMaxGPRs, uMaxThreads, uMaxStackEntries, uPSThreadCount, uOtherThreadCount;
1416 uint32_t NUM_PS_GPRS, NUM_VS_GPRS, NUM_GS_GPRS, NUM_ES_GPRS, NUM_HS_GPRS, NUM_LS_GPRS, NUM_CLAUSE_TEMP_GPRS;
1417 GLboolean bVC_ENABLE = GL_TRUE;
1418
1419 R600_STATECHANGE(context, sq);
1420
1421 switch (context->radeon.radeonScreen->chip_family)
1422 {
1423 case CHIP_FAMILY_CEDAR:
1424 uSqNumCfInsts = 1;
1425 bVC_ENABLE = GL_FALSE;
1426 uMaxGPRs = 256;
1427 uPSThreadCount = 96;
1428 uMaxThreads = 192;
1429 uMaxStackEntries = 256;
1430 break;
1431 case CHIP_FAMILY_REDWOOD:
1432 uSqNumCfInsts = 2;
1433 bVC_ENABLE = GL_TRUE;
1434 uMaxGPRs = 256;
1435 uPSThreadCount = 128;
1436 uMaxThreads = 248;
1437 uMaxStackEntries = 256;
1438 break;
1439 case CHIP_FAMILY_JUNIPER:
1440 uSqNumCfInsts = 2;
1441 bVC_ENABLE = GL_TRUE;
1442 uMaxGPRs = 256;
1443 uPSThreadCount = 128;
1444 uMaxThreads = 248;
1445 uMaxStackEntries = 512;
1446 break;
1447 case CHIP_FAMILY_CYPRESS:
1448 uSqNumCfInsts = 2;
1449 bVC_ENABLE = GL_TRUE;
1450 uMaxGPRs = 256;
1451 uPSThreadCount = 128;
1452 uMaxThreads = 248;
1453 uMaxStackEntries = 512;
1454 break;
1455 case CHIP_FAMILY_HEMLOCK:
1456 uSqNumCfInsts = 2;//?
1457 bVC_ENABLE = GL_TRUE;
1458 uMaxGPRs = 256;
1459 uPSThreadCount = 128;
1460 uMaxThreads = 248;
1461 uMaxStackEntries = 512;
1462 break;
1463 default:
1464 uSqNumCfInsts = 2;
1465 bVC_ENABLE = GL_TRUE;
1466 uMaxGPRs = 256;
1467 uPSThreadCount = 128;
1468 uMaxThreads = 248;
1469 uMaxStackEntries = 512;
1470 break;
1471 }
1472
1473 evergreen->evergreen_config.SQ_DYN_GPR_CNTL_PS_FLUSH_REQ.u32All = 0;
1474
1475 evergreen->evergreen_config.SPI_CONFIG_CNTL.u32All = 0;
1476 evergreen->evergreen_config.SPI_CONFIG_CNTL_1.u32All = 0;
1477 SETfield(evergreen->evergreen_config.SPI_CONFIG_CNTL_1.u32All, 4,
1478 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_shift,
1479 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_mask);
1480
1481 evergreen->evergreen_config.CP_PERFMON_CNTL.u32All = 0;
1482
1483 evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All = 0;
1484 SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 16 * uSqNumCfInsts,
1485 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_shift,
1486 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_mask);
1487 SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0x4,
1488 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_shift,
1489 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_mask);
1490 SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0xE0,
1491 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_shift,
1492 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_mask);
1493 SETfield(evergreen->evergreen_config.SQ_MS_FIFO_SIZES.u32All, 0x8,
1494 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_shift,
1495 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_mask);
1496
1497 if(bVC_ENABLE == GL_TRUE)
1498 {
1499 SETbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1500 EG_SQ_CONFIG__VC_ENABLE_bit);
1501 }
1502 else
1503 {
1504 CLEARbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1505 EG_SQ_CONFIG__VC_ENABLE_bit);
1506 }
1507 SETbit(evergreen->evergreen_config.SQ_CONFIG.u32All,
1508 EG_SQ_CONFIG__EXPORT_SRC_C_bit);
1509 SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 0,
1510 EG_SQ_CONFIG__PS_PRIO_shift,
1511 EG_SQ_CONFIG__PS_PRIO_mask);
1512 SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 1,
1513 EG_SQ_CONFIG__VS_PRIO_shift,
1514 EG_SQ_CONFIG__VS_PRIO_mask);
1515 SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 2,
1516 EG_SQ_CONFIG__GS_PRIO_shift,
1517 EG_SQ_CONFIG__GS_PRIO_mask);
1518 SETfield(evergreen->evergreen_config.SQ_CONFIG.u32All, 3,
1519 EG_SQ_CONFIG__ES_PRIO_shift,
1520 EG_SQ_CONFIG__ES_PRIO_mask);
1521
1522 NUM_CLAUSE_TEMP_GPRS = 4;
1523 NUM_PS_GPRS = ((uMaxGPRs-(4*2))*12/32); // 93
1524 NUM_VS_GPRS = ((uMaxGPRs-(4*2))*6/32); // 46
1525 NUM_GS_GPRS = ((uMaxGPRs-(4*2))*4/32); // 31
1526 NUM_ES_GPRS = ((uMaxGPRs-(4*2))*4/32); // 31
1527 NUM_HS_GPRS = ((uMaxGPRs-(4*2))*3/32); // 23
1528 NUM_LS_GPRS = ((uMaxGPRs-(4*2))*3/32); // 23
1529
1530 evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All = 0;
1531 evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All = 0;
1532 evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All = 0;
1533
1534 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_PS_GPRS,
1535 NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
1536 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_VS_GPRS,
1537 NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
1538 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_1.u32All, NUM_CLAUSE_TEMP_GPRS,
1539 NUM_CLAUSE_TEMP_GPRS_shift, NUM_CLAUSE_TEMP_GPRS_mask);
1540 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All, NUM_GS_GPRS,
1541 NUM_GS_GPRS_shift, NUM_GS_GPRS_mask);
1542 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_2.u32All, NUM_ES_GPRS,
1543 NUM_ES_GPRS_shift, NUM_ES_GPRS_mask);
1544 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All, NUM_HS_GPRS,
1545 NUM_PS_GPRS_shift, NUM_PS_GPRS_mask);
1546 SETfield(evergreen->evergreen_config.SQ_GPR_RESOURCE_MGMT_3.u32All, NUM_LS_GPRS,
1547 NUM_VS_GPRS_shift, NUM_VS_GPRS_mask);
1548
1549 uOtherThreadCount = (((uMaxThreads-uPSThreadCount)/6)/8)*8;
1550 evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All = 0;
1551 evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All = 0;
1552 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uPSThreadCount,
1553 NUM_PS_THREADS_shift, NUM_PS_THREADS_mask);
1554 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1555 NUM_VS_THREADS_shift, NUM_VS_THREADS_mask);
1556 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1557 NUM_GS_THREADS_shift, NUM_GS_THREADS_mask);
1558 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT.u32All, uOtherThreadCount,
1559 NUM_ES_THREADS_shift, NUM_ES_THREADS_mask);
1560 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All, uOtherThreadCount,
1561 NUM_PS_THREADS_shift, NUM_PS_THREADS_mask);
1562 SETfield(evergreen->evergreen_config.SQ_THREAD_RESOURCE_MGMT_2.u32All, uOtherThreadCount,
1563 NUM_VS_THREADS_shift, NUM_VS_THREADS_mask);
1564
1565 uMaxStackEntries = ((uMaxStackEntries*1)/6);
1566 evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All = 0;
1567 evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All = 0;
1568 evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All = 0;
1569 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All, uMaxStackEntries,
1570 NUM_PS_STACK_ENTRIES_shift, NUM_PS_STACK_ENTRIES_mask);
1571 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_1.u32All, uMaxStackEntries,
1572 NUM_VS_STACK_ENTRIES_shift, NUM_VS_STACK_ENTRIES_mask);
1573 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All, uMaxStackEntries,
1574 NUM_GS_STACK_ENTRIES_shift, NUM_GS_STACK_ENTRIES_mask);
1575 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_2.u32All, uMaxStackEntries,
1576 NUM_ES_STACK_ENTRIES_shift, NUM_ES_STACK_ENTRIES_mask);
1577 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All, uMaxStackEntries,
1578 NUM_PS_STACK_ENTRIES_shift, NUM_PS_STACK_ENTRIES_mask);
1579 SETfield(evergreen->evergreen_config.SQ_STACK_RESOURCE_MGMT_3.u32All, uMaxStackEntries,
1580 NUM_VS_STACK_ENTRIES_shift, NUM_VS_STACK_ENTRIES_mask);
1581
1582 evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All = 0;
1583 SETfield(evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All, 4095,
1584 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_shift,
1585 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_mask);
1586 SETfield(evergreen->evergreen_config.PA_SC_FORCE_EOV_MAX_CNTS.u32All, 255,
1587 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_shift,
1588 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_mask);
1589
1590 evergreen->evergreen_config.VGT_CACHE_INVALIDATION.u32All = 0;
1591 SETfield(evergreen->evergreen_config.VGT_CACHE_INVALIDATION.u32All, 2,
1592 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_shift,
1593 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_mask);
1594
1595 evergreen->evergreen_config.VGT_GS_VERTEX_REUSE.u32All = 0;
1596 SETfield(evergreen->evergreen_config.VGT_GS_VERTEX_REUSE.u32All, 16,
1597 VERT_REUSE_shift,
1598 VERT_REUSE_mask);
1599
1600 evergreen->evergreen_config.PA_SC_LINE_STIPPLE_STATE.u32All = 0;
1601
1602 evergreen->evergreen_config.PA_CL_ENHANCE.u32All = 0;
1603 SETbit(evergreen->evergreen_config.PA_CL_ENHANCE.u32All,
1604 CLIP_VTX_REORDER_ENA_bit);
1605 SETfield(evergreen->evergreen_config.PA_CL_ENHANCE.u32All, 3,
1606 NUM_CLIP_SEQ_shift,
1607 NUM_CLIP_SEQ_mask);
1608 }
1609
1610 void evergreenInitState(GLcontext * ctx) //diff
1611 {
1612 context_t *context = R700_CONTEXT(ctx);
1613 EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
1614
1615 int id = 0;
1616
1617 //calloc should have done this
1618 memset(evergreen, 0, sizeof(EVERGREEN_CHIP_CONTEXT));
1619
1620 // Disable window clipping and offset:
1621 SETfield(evergreen->PA_SC_WINDOW_OFFSET.u32All, 0,
1622 EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_shift, EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_mask);
1623 SETfield(evergreen->PA_SC_WINDOW_OFFSET.u32All, 0,
1624 EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_shift, EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_mask);
1625
1626 SETbit(evergreen->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
1627
1628 evergreen->PA_SC_CLIPRECT_RULE.u32All = 0x0000FFFF;
1629
1630 evergreen->PA_SC_EDGERULE.u32All = 0xAAAAAAAA;
1631
1632 // Set up Z min/max:
1633 evergreen->viewport[id].PA_SC_VPORT_ZMIN_0.f32All = 0.0;
1634 evergreen->viewport[id].PA_SC_VPORT_ZMAX_0.f32All = 1.0;
1635
1636 SETfield(evergreen->CB_TARGET_MASK.u32All, 0xF, TARGET0_ENABLE_shift, TARGET0_ENABLE_mask);
1637 SETfield(evergreen->CB_SHADER_MASK.u32All, 0xF, OUTPUT0_ENABLE_shift, OUTPUT0_ENABLE_mask);
1638
1639 SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
1640 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift,
1641 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask);
1642 SETfield(evergreen->SPI_BARYC_CNTL.u32All, 1,
1643 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift,
1644 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask);
1645
1646 // Turn off vgt reuse:
1647 evergreen->VGT_REUSE_OFF.u32All = 0;
1648 SETbit(evergreen->VGT_REUSE_OFF.u32All, REUSE_OFF_bit);
1649
1650 // Specify offsetting and clamp values for vertices:
1651 evergreen->VGT_MAX_VTX_INDX.u32All = 0xFFFFFF;
1652 evergreen->VGT_MIN_VTX_INDX.u32All = 0;
1653 evergreen->VGT_INDX_OFFSET.u32All = 0;
1654
1655 evergreen->VGT_DMA_NUM_INSTANCES.u32All = 1;
1656
1657 // Do not alpha blend:
1658 SETfield(evergreen->SX_ALPHA_TEST_CONTROL.u32All, REF_NEVER,
1659 ALPHA_FUNC_shift, ALPHA_FUNC_mask);
1660 CLEARbit(evergreen->SX_ALPHA_TEST_CONTROL.u32All, ALPHA_TEST_ENABLE_bit);
1661
1662 evergreen->SPI_VS_OUT_ID_0.u32All = 0x03020100;
1663 evergreen->SPI_VS_OUT_ID_1.u32All = 0x07060504;
1664
1665 evergreen->SPI_PS_INPUT_CNTL[0].u32All = 0x00000800;
1666 evergreen->SPI_PS_INPUT_CNTL[1].u32All = 0x00000801;
1667 evergreen->SPI_PS_INPUT_CNTL[2].u32All = 0x00000802;
1668
1669
1670 // Depth buffer currently disabled:
1671 evergreen->DB_DEPTH_CONTROL.u32All = 0;
1672 SETbit(evergreen->DB_DEPTH_CONTROL.u32All, Z_WRITE_ENABLE_bit);
1673 SETfield(evergreen->DB_DEPTH_CONTROL.u32All, FRAG_ALWAYS,
1674 ZFUNC_shift, ZFUNC_mask);
1675
1676 evergreen->DB_Z_READ_BASE.u32All = 0;
1677 evergreen->DB_Z_WRITE_BASE.u32All = 0;
1678
1679 evergreen->DB_DEPTH_CLEAR.f32All = 1.0;
1680
1681 evergreen->DB_DEPTH_VIEW.u32All = 0;
1682
1683 evergreen->DB_SHADER_CONTROL.u32All = 0;
1684 SETbit(evergreen->DB_SHADER_CONTROL.u32All, EG_DB_SHADER_CONTROL__DUAL_EXPORT_ENABLE_bit);
1685
1686 evergreen->DB_Z_INFO.u32All = 0;
1687 SETfield(evergreen->DB_Z_INFO.u32All , ARRAY_1D_TILED_THIN1,
1688 EG_DB_Z_INFO__ARRAY_MODE_shift, EG_DB_Z_INFO__ARRAY_MODE_mask);
1689 SETfield(evergreen->DB_Z_INFO.u32All , EG_Z_24,
1690 EG_DB_Z_INFO__FORMAT_shift, EG_DB_Z_INFO__FORMAT_mask);
1691 SETfield(evergreen->DB_Z_INFO.u32All , EG_ADDR_SURF_TILE_SPLIT_256B,
1692 EG_DB_Z_INFO__TILE_SPLIT_shift, EG_DB_Z_INFO__TILE_SPLIT_mask);
1693 SETfield(evergreen->DB_Z_INFO.u32All , EG_ADDR_SURF_8_BANK,
1694 EG_DB_Z_INFO__NUM_BANKS_shift, EG_DB_Z_INFO__NUM_BANKS_mask);
1695 SETfield(evergreen->DB_Z_INFO.u32All , EG_ADDR_SURF_BANK_WIDTH_1,
1696 EG_DB_Z_INFO__BANK_WIDTH_shift, EG_DB_Z_INFO__BANK_WIDTH_mask);
1697 SETfield(evergreen->DB_Z_INFO.u32All , EG_ADDR_SURF_BANK_HEIGHT_1,
1698 EG_DB_Z_INFO__BANK_HEIGHT_shift, EG_DB_Z_INFO__BANK_HEIGHT_mask);
1699
1700 evergreen->DB_STENCIL_INFO.u32All = 0;
1701 CLEARbit(evergreen->DB_STENCIL_INFO.u32All, EG_DB_STENCIL_INFO__FORMAT_bit);
1702 SETfield(evergreen->DB_STENCIL_INFO.u32All, EG_ADDR_SURF_TILE_SPLIT_256B,
1703 EG_DB_STENCIL_INFO__TILE_SPLIT_shift, EG_DB_STENCIL_INFO__TILE_SPLIT_mask);
1704
1705 evergreen->DB_RENDER_CONTROL.u32All = 0;
1706
1707 evergreen->DB_RENDER_OVERRIDE.u32All = 0;
1708 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask);
1709 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask);
1710 SETfield(evergreen->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE1_shift, FORCE_HIS_ENABLE1_mask);
1711
1712 // Disable ROP3 modes by setting src to dst copy:
1713 SETfield(evergreen->CB_COLOR_CONTROL.u32All, 0xCC,
1714 EG_CB_COLOR_CONTROL__ROP3_shift,
1715 EG_CB_COLOR_CONTROL__ROP3_mask);
1716 SETfield(evergreen->CB_COLOR_CONTROL.u32All, EG_CB_NORMAL,
1717 EG_CB_COLOR_CONTROL__MODE_shift,
1718 EG_CB_COLOR_CONTROL__MODE_mask);
1719
1720 SETfield(evergreen->CB_BLEND0_CONTROL.u32All,
1721 BLEND_ONE, COLOR_SRCBLEND_shift, COLOR_SRCBLEND_mask);
1722
1723 SETfield(evergreen->CB_BLEND0_CONTROL.u32All,
1724 BLEND_ONE, ALPHA_SRCBLEND_shift, ALPHA_SRCBLEND_mask);
1725
1726 //evergreen->PA_CL_CLIP_CNTL.CLIP_DISABLE = 1;
1727
1728 SETbit(evergreen->PA_CL_CLIP_CNTL.u32All, DX_LINEAR_ATTR_CLIP_ENA_bit);
1729
1730 // Set up the culling control register:
1731 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, 2,
1732 POLYMODE_FRONT_PTYPE_shift, POLYMODE_FRONT_PTYPE_mask); // draw using triangles
1733 SETfield(evergreen->PA_SU_SC_MODE_CNTL.u32All, 2,
1734 POLYMODE_BACK_PTYPE_shift, POLYMODE_BACK_PTYPE_mask); // draw using triangles
1735
1736 // Do scale XY or X by 1/W0. eg:
1737 evergreen->bEnablePerspective = GL_TRUE;
1738
1739 CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_XY_FMT_bit);
1740 CLEARbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_Z_FMT_bit);
1741 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VTX_W0_FMT_bit);
1742
1743 // Enable viewport scaling for all three axis:
1744 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_X_SCALE_ENA_bit);
1745 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_X_OFFSET_ENA_bit);
1746 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Y_SCALE_ENA_bit);
1747 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Y_OFFSET_ENA_bit);
1748 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Z_SCALE_ENA_bit);
1749 SETbit(evergreen->PA_CL_VTE_CNTL.u32All, VPORT_Z_OFFSET_ENA_bit);
1750
1751 // Set up point sizes and min/max values:
1752 SETfield(evergreen->PA_SU_POINT_SIZE.u32All, 0x8,
1753 PA_SU_POINT_SIZE__HEIGHT_shift, PA_SU_POINT_SIZE__HEIGHT_mask);
1754 SETfield(evergreen->PA_SU_POINT_SIZE.u32All, 0x8,
1755 PA_SU_POINT_SIZE__WIDTH_shift, PA_SU_POINT_SIZE__WIDTH_mask);
1756 CLEARfield(evergreen->PA_SU_POINT_MINMAX.u32All, MIN_SIZE_mask);
1757 SETfield(evergreen->PA_SU_POINT_MINMAX.u32All, 0x8000, MAX_SIZE_shift, MAX_SIZE_mask);
1758 SETfield(evergreen->PA_SU_LINE_CNTL.u32All,0x8,
1759 PA_SU_LINE_CNTL__WIDTH_shift, PA_SU_LINE_CNTL__WIDTH_mask);
1760
1761 // Set up line control:
1762 evergreen->PA_SC_LINE_CNTL.u32All = 0;
1763 CLEARbit(evergreen->PA_SC_LINE_CNTL.u32All, EXPAND_LINE_WIDTH_bit);
1764 SETbit(evergreen->PA_SC_LINE_CNTL.u32All, LAST_PIXEL_bit);
1765
1766 // Set up vertex control:
1767 evergreen->PA_SU_VTX_CNTL.u32All = 0;
1768 CLEARfield(evergreen->PA_SU_VTX_CNTL.u32All, QUANT_MODE_mask);
1769 SETbit(evergreen->PA_SU_VTX_CNTL.u32All, PIX_CENTER_bit);
1770 SETfield(evergreen->PA_SU_VTX_CNTL.u32All, X_ROUND_TO_EVEN,
1771 PA_SU_VTX_CNTL__ROUND_MODE_shift, PA_SU_VTX_CNTL__ROUND_MODE_mask);
1772
1773 // to 1.0 = no guard band:
1774 evergreen->PA_CL_GB_VERT_CLIP_ADJ.u32All = 0x3F800000; // 1.0
1775 evergreen->PA_CL_GB_VERT_DISC_ADJ.u32All = 0x3F800000; // 1.0
1776 evergreen->PA_CL_GB_HORZ_CLIP_ADJ.u32All = 0x3F800000; // 1.0
1777 evergreen->PA_CL_GB_HORZ_DISC_ADJ.u32All = 0x3F800000; // 1.0
1778
1779 // Diable color compares:
1780 SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_DRAW_ALWAYS,
1781 CLRCMP_FCN_SRC_shift, CLRCMP_FCN_SRC_mask);
1782 SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_DRAW_ALWAYS,
1783 CLRCMP_FCN_DST_shift, CLRCMP_FCN_DST_mask);
1784 SETfield(evergreen->CB_CLRCMP_CONTROL.u32All, CLRCMP_SEL_SRC,
1785 CLRCMP_FCN_SEL_shift, CLRCMP_FCN_SEL_mask);
1786
1787 // Zero out source:
1788 evergreen->CB_CLRCMP_SRC.u32All = 0x00000000;
1789
1790 // Put a compare color in for error checking:
1791 evergreen->CB_CLRCMP_DST.u32All = 0x000000FF;
1792
1793 // Set up color compare mask:
1794 evergreen->CB_CLRCMP_MSK.u32All = 0xFFFFFFFF;
1795
1796 // Enable all samples for multi-sample anti-aliasing:
1797 evergreen->PA_SC_AA_MASK.u32All = 0xFFFFFFFF;
1798 // Turn off AA:
1799 evergreen->PA_SC_AA_CONFIG.u32All = 0;
1800
1801 SETfield(evergreen->VGT_OUT_DEALLOC_CNTL.u32All, 16,
1802 DEALLOC_DIST_shift, DEALLOC_DIST_mask);
1803 SETfield(evergreen->VGT_VERTEX_REUSE_BLOCK_CNTL.u32All, 14,
1804 VTX_REUSE_DEPTH_shift, VTX_REUSE_DEPTH_mask);
1805
1806 evergreen->SX_MISC.u32All = 0;
1807
1808 SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, 1,
1809 EG_CB_COLOR0_INFO__SOURCE_FORMAT_shift, EG_CB_COLOR0_INFO__SOURCE_FORMAT_mask);
1810 SETbit(evergreen->render_target[id].CB_COLOR0_INFO.u32All, EG_CB_COLOR0_INFO__BLEND_CLAMP_bit);
1811 SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, 0,
1812 EG_CB_COLOR0_INFO__NUMBER_TYPE_shift, EG_CB_COLOR0_INFO__NUMBER_TYPE_mask);
1813
1814 SETfield(evergreen->render_target[id].CB_COLOR0_INFO.u32All, SWAP_STD,
1815 EG_CB_COLOR0_INFO__COMP_SWAP_shift, EG_CB_COLOR0_INFO__COMP_SWAP_mask);
1816
1817 evergreen->render_target[id].CB_COLOR0_VIEW.u32All = 0;
1818 evergreen->render_target[id].CB_COLOR0_CMASK.u32All = 0;
1819 evergreen->render_target[id].CB_COLOR0_FMASK.u32All = 0;
1820 evergreen->render_target[id].CB_COLOR0_FMASK_SLICE.u32All = 0;
1821
1822 evergreenInitSQConfig(ctx);
1823
1824 context->radeon.hw.all_dirty = GL_TRUE;
1825 }
1826
1827 void evergreenInitStateFuncs(radeonContextPtr radeon, struct dd_function_table *functions)
1828 {
1829 functions->UpdateState = evergreenInvalidateState;
1830 functions->AlphaFunc = evergreenAlphaFunc;
1831 functions->BlendColor = evergreenBlendColor;
1832 functions->BlendEquationSeparate = evergreenBlendEquationSeparate;
1833 functions->BlendFuncSeparate = evergreenBlendFuncSeparate;
1834 functions->Enable = evergreenEnable;
1835 functions->ColorMask = evergreenColorMask;
1836 functions->DepthFunc = evergreenDepthFunc;
1837 functions->DepthMask = evergreenDepthMask;
1838 functions->CullFace = evergreenCullFace;
1839 functions->Fogfv = evergreenFogfv;
1840 functions->FrontFace = evergreenFrontFace;
1841 functions->ShadeModel = evergreenShadeModel;
1842 functions->LogicOpcode = evergreenLogicOpcode;
1843
1844 /* ARB_point_parameters */
1845 functions->PointParameterfv = evergreenPointParameter;
1846
1847 /* Stencil related */
1848 functions->StencilFuncSeparate = evergreenStencilFuncSeparate;
1849 functions->StencilMaskSeparate = evergreenStencilMaskSeparate;
1850 functions->StencilOpSeparate = evergreenStencilOpSeparate;
1851
1852 /* Viewport related */
1853 functions->Viewport = evergreenViewport;
1854 functions->DepthRange = evergreenDepthRange;
1855 functions->PointSize = evergreenPointSize;
1856 functions->LineWidth = evergreenLineWidth;
1857 functions->LineStipple = evergreenLineStipple;
1858
1859 functions->PolygonOffset = evergreenPolygonOffset;
1860 functions->PolygonMode = evergreenPolygonMode;
1861
1862 functions->RenderMode = evergreenRenderMode;
1863
1864 functions->ClipPlane = evergreenClipPlane;
1865
1866 functions->Scissor = radeonScissor;
1867
1868 functions->DrawBuffer = radeonDrawBuffer;
1869 functions->ReadBuffer = radeonReadBuffer;
1870
1871 if (radeon->radeonScreen->kernel_mm) {
1872 functions->CopyPixels = _mesa_meta_CopyPixels;
1873 functions->DrawPixels = _mesa_meta_DrawPixels;
1874 functions->ReadPixels = radeonReadPixels;
1875 }
1876 }
1877
1878