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Merge branch 'mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / r600 / r600_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r600_context.h"
48 #include "r700_state.h"
49 #include "radeon_mipmap_tree.h"
50 #include "r600_tex.h"
51 #include "r700_fragprog.h"
52 #include "r700_vertprog.h"
53
54 void r600UpdateTextureState(GLcontext * ctx);
55
56 void r600UpdateTextureState(GLcontext * ctx)
57 {
58 context_t *context = R700_CONTEXT(ctx);
59 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
60 struct gl_texture_unit *texUnit;
61 struct radeon_tex_obj *t;
62 GLuint unit;
63
64 R600_STATECHANGE(context, tx);
65 R600_STATECHANGE(context, tx_smplr);
66 R600_STATECHANGE(context, tx_brdr_clr);
67
68 for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) {
69 texUnit = &ctx->Texture.Unit[unit];
70 t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
71 r700->textures[unit] = NULL;
72 if (texUnit->_ReallyEnabled) {
73 if (!t)
74 continue;
75 r700->textures[unit] = t;
76 }
77 }
78 }
79
80 static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
81 {
82 radeonTexObj *t = radeon_tex_obj(tObj);
83
84 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
85 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
86 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
87 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
88 CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
89
90 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
91 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
92 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
93 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
94 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
95 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
96 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
97 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
98
99 CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
100 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL,
101 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
102 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
103
104 switch (mesa_format) /* This is mesa format. */
105 {
106 case MESA_FORMAT_RGBA8888:
107 case MESA_FORMAT_SIGNED_RGBA8888:
108 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
109 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
110
111 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
112 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
113 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
114 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
115 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
116 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
117 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
118 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
119 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
120 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
121 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
122 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
123 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
124 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
125 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
126 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
127 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
128 }
129 break;
130 case MESA_FORMAT_RGBA8888_REV:
131 case MESA_FORMAT_SIGNED_RGBA8888_REV:
132 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
133 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
134
135 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
136 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
137 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
138 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
139 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
140 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
141 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
142 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
143 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
144 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
145 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
146 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
147 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
148 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
149 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
150 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
151 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
152 }
153 break;
154 case MESA_FORMAT_ARGB8888:
155 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
156 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
157
158 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
159 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
160 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
161 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
162 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
163 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
164 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
165 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
166 break;
167 case MESA_FORMAT_XRGB8888:
168 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
169 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
170
171 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
172 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
173 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
174 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
175 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
176 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
177 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
178 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
179 break;
180 case MESA_FORMAT_XRGB8888_REV:
181 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
182 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
183
184 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
185 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
186 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
187 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
188 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
189 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
190 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
191 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
192 break;
193 case MESA_FORMAT_ARGB8888_REV:
194 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
195 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
196
197 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
198 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
199 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
200 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
201 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
202 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
203 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
204 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
205 break;
206 case MESA_FORMAT_RGB888:
207 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8,
208 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
209
210 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
211 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
212 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
213 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
214 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
215 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
216 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
217 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
218 break;
219 case MESA_FORMAT_RGB565:
220 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
221 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
222
223 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
224 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
225 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
226 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
227 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
228 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
229 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
230 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
231 break;
232 case MESA_FORMAT_RGB565_REV:
233 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
234 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
235
236 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
238 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
239 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
240 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
241 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
242 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
243 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
244 break;
245 case MESA_FORMAT_ARGB4444:
246 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
247 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
248
249 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
250 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
251 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
252 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
253 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
254 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
255 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
256 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
257 break;
258 case MESA_FORMAT_ARGB4444_REV:
259 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
260 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
261
262 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
263 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
264 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
265 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
266 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
267 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
268 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
269 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
270 break;
271 case MESA_FORMAT_ARGB1555:
272 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
273 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
274
275 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
276 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
277 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
278 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
279 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
280 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
281 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
282 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
283 break;
284 case MESA_FORMAT_ARGB1555_REV:
285 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
286 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
287
288 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
289 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
290 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
291 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
292 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
293 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
294 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
295 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
296 break;
297 case MESA_FORMAT_AL88:
298 case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
299 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
300 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
301
302 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
303 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
304 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
305 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
306 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
307 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
308 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
309 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
310 break;
311 case MESA_FORMAT_RGB332:
312 SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2,
313 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
314
315 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
316 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
317 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
318 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
319 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
320 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
321 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
322 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
323 break;
324 case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
325 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
326 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
327
328 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
329 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
330 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
331 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
332 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
333 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
334 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
335 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
336 break;
337 case MESA_FORMAT_L8: /* X, X, X, ONE */
338 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
339 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
340
341 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
342 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
343 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
344 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
345 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
346 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
347 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
348 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
349 break;
350 case MESA_FORMAT_I8: /* X, X, X, X */
351 case MESA_FORMAT_CI8:
352 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
353 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
354
355 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
356 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
357 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
358 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
359 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
360 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
361 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
362 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
363 break;
364 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
365 /*
366 case MESA_FORMAT_YCBCR:
367 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
368 break;
369 */
370 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
371 /*
372 case MESA_FORMAT_YCBCR_REV:
373 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
374 break;
375 */
376 case MESA_FORMAT_RGB_DXT1: /* not supported yet */
377
378 break;
379 case MESA_FORMAT_RGBA_DXT1: /* not supported yet */
380
381 break;
382 case MESA_FORMAT_RGBA_DXT3: /* not supported yet */
383
384 break;
385 case MESA_FORMAT_RGBA_DXT5: /* not supported yet */
386
387 break;
388 case MESA_FORMAT_RGBA_FLOAT32:
389 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT,
390 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
391
392 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
393 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
394 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
395 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
396 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
397 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
398 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
399 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
400 break;
401 case MESA_FORMAT_RGBA_FLOAT16:
402 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT,
403 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
404
405 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
406 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
407 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
408 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
409 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
410 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
411 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
412 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
413 break;
414 case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */
415 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT,
416 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
417
418 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
419 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
420 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
421 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
422 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
423 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
424 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
425 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
426 break;
427 case MESA_FORMAT_RGB_FLOAT16:
428 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT,
429 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
430
431 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
432 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
433 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
434 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
435 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
436 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
437 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
438 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
439 break;
440 case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
441 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
442 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
443
444 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
445 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
446 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
447 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
448 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
449 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
450 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
451 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
452 break;
453 case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
454 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
455 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
456
457 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
458 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
459 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
460 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
461 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
462 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
463 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
464 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
465 break;
466 case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
467 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
468 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
469
470 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
471 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
472 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
473 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
474 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
475 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
476 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
477 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
478 break;
479 case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
480 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
481 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
482
483 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
484 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
485 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
486 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
487 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
488 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
489 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
490 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
491 break;
492 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
493 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT,
494 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
495
496 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
497 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
498 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
499 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
500 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
501 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
502 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
503 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
504 break;
505 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
506 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT,
507 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
508
509 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
510 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
511 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
512 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
513 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
514 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
515 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
516 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
517 break;
518 case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
519 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
520 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
521
522 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
523 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
524 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
525 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
526 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
527 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
528 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
529 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
530 break;
531 case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
532 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
533 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
534
535 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
536 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
537 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
538 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
539 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
540 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
541 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
542 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
543 break;
544 case MESA_FORMAT_Z16:
545 case MESA_FORMAT_X8_Z24:
546 case MESA_FORMAT_S8_Z24:
547 case MESA_FORMAT_Z24_S8:
548 case MESA_FORMAT_Z32:
549 case MESA_FORMAT_S8:
550 SETbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
551 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_1D_TILED_THIN1,
552 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
553 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
554 switch (mesa_format) {
555 case MESA_FORMAT_Z16:
556 SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
557 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
558 break;
559 case MESA_FORMAT_X8_Z24:
560 case MESA_FORMAT_S8_Z24:
561 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_24,
562 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
563 break;
564 case MESA_FORMAT_Z24_S8:
565 SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
566 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
567 break;
568 case MESA_FORMAT_Z32:
569 SETfield(t->SQ_TEX_RESOURCE1, FMT_32,
570 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
571 break;
572 case MESA_FORMAT_S8:
573 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
574 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
575 break;
576 default:
577 break;
578 };
579 switch (tObj->DepthMode) {
580 case GL_LUMINANCE: /* X, X, X, ONE */
581 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
582 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
583 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
584 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
585 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
586 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
587 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
588 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
589 break;
590 case GL_INTENSITY: /* X, X, X, X */
591 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
592 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
593 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
594 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
595 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
596 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
597 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
598 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
599 break;
600 case GL_ALPHA: /* ZERO, ZERO, ZERO, X */
601 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
602 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
603 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
604 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
605 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
606 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
607 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
608 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
609 break;
610 default:
611 return GL_FALSE;
612 }
613 break;
614 /* EXT_texture_sRGB */
615 case MESA_FORMAT_SRGBA8:
616 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
617 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
618
619 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
620 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
621 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
622 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
623 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
624 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
625 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
626 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
627 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
628 break;
629 case MESA_FORMAT_SLA8:
630 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
631 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
632
633 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
634 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
635 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
636 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
637 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
638 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
639 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
640 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
641 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
642 break;
643 case MESA_FORMAT_SL8: /* X, X, X, ONE */
644 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
645 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
646
647 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
648 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
649 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
650 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
651 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
652 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
653 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
654 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
655 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
656 break;
657 default:
658 /* Not supported format */
659 return GL_FALSE;
660 };
661
662 return GL_TRUE;
663 }
664
665 static GLuint r600_translate_shadow_func(GLenum func)
666 {
667 switch (func) {
668 case GL_NEVER:
669 return SQ_TEX_DEPTH_COMPARE_NEVER;
670 case GL_LESS:
671 return SQ_TEX_DEPTH_COMPARE_LESS;
672 case GL_LEQUAL:
673 return SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
674 case GL_GREATER:
675 return SQ_TEX_DEPTH_COMPARE_GREATER;
676 case GL_GEQUAL:
677 return SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
678 case GL_NOTEQUAL:
679 return SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
680 case GL_EQUAL:
681 return SQ_TEX_DEPTH_COMPARE_EQUAL;
682 case GL_ALWAYS:
683 return SQ_TEX_DEPTH_COMPARE_ALWAYS;
684 default:
685 WARN_ONCE("Unknown shadow compare function! %d", func);
686 return 0;
687 }
688 }
689
690 static INLINE uint32_t
691 S_FIXED(float value, uint32_t frac_bits)
692 {
693 return value * (1 << frac_bits);
694 }
695
696 void r600SetDepthTexMode(struct gl_texture_object *tObj)
697 {
698 radeonTexObjPtr t;
699
700 if (!tObj)
701 return;
702
703 t = radeon_tex_obj(tObj);
704
705 r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat);
706
707 }
708
709 /**
710 * Compute the cached hardware register values for the given texture object.
711 *
712 * \param rmesa Context pointer
713 * \param t the r300 texture object
714 */
715 static void setup_hardware_state(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
716 {
717 context_t *rmesa = R700_CONTEXT(ctx);
718 radeonTexObj *t = radeon_tex_obj(texObj);
719 const struct gl_texture_image *firstImage;
720 GLuint uTexelPitch, row_align;
721
722 if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
723 t->image_override &&
724 t->bo)
725 return;
726
727 firstImage = t->base.Image[0][t->minLod];
728
729 if (!t->image_override) {
730 if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
731 radeon_error("unexpected texture format in %s\n",
732 __FUNCTION__);
733 return;
734 }
735 }
736
737 switch (texObj->Target) {
738 case GL_TEXTURE_1D:
739 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask);
740 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
741 break;
742 case GL_TEXTURE_2D:
743 case GL_TEXTURE_RECTANGLE_NV:
744 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
745 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
746 break;
747 case GL_TEXTURE_3D:
748 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask);
749 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ???
750 TEX_DEPTH_shift, TEX_DEPTH_mask);
751 break;
752 case GL_TEXTURE_CUBE_MAP:
753 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask);
754 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
755 break;
756 default:
757 radeon_error("unexpected texture target type in %s\n", __FUNCTION__);
758 return;
759 }
760
761 row_align = rmesa->radeon.texture_row_align - 1;
762 uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
763 uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
764 uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
765 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
766
767 /* min pitch is 8 */
768 if (uTexelPitch < 8)
769 uTexelPitch = 8;
770
771 SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask);
772 SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1,
773 TEX_WIDTH_shift, TEX_WIDTH_mask);
774 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
775 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
776
777 t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
778
779 t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
780
781 SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
782 SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
783
784 SETfield(t->SQ_TEX_SAMPLER1,
785 S_FIXED(CLAMP(t->base.MinLod - t->minLod, 0, 15), 6),
786 MIN_LOD_shift, MIN_LOD_mask);
787 SETfield(t->SQ_TEX_SAMPLER1,
788 S_FIXED(CLAMP(t->base.MaxLod - t->minLod, 0, 15), 6),
789 MAX_LOD_shift, MAX_LOD_mask);
790 SETfield(t->SQ_TEX_SAMPLER1,
791 S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.LodBias, -16, 16), 6),
792 SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
793
794 if(texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
795 {
796 SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
797 }
798 else
799 {
800 CLEARfield(t->SQ_TEX_SAMPLER0, DEPTH_COMPARE_FUNCTION_mask);
801 }
802
803 }
804
805 /**
806 * Ensure the given texture is ready for rendering.
807 *
808 * Mostly this means populating the texture object's mipmap tree.
809 */
810 static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
811 {
812 radeonTexObj *t = radeon_tex_obj(texObj);
813
814 if (!radeon_validate_texture_miptree(ctx, texObj))
815 return GL_FALSE;
816
817 /* Configure the hardware registers (more precisely, the cached version
818 * of the hardware registers). */
819 setup_hardware_state(ctx, texObj, unit);
820
821 t->validated = GL_TRUE;
822 return GL_TRUE;
823 }
824
825 /**
826 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
827 */
828 GLboolean r600ValidateBuffers(GLcontext * ctx)
829 {
830 context_t *rmesa = R700_CONTEXT(ctx);
831 struct radeon_renderbuffer *rrb;
832 struct radeon_bo *pbo;
833 int i;
834 int ret;
835
836 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
837
838 rrb = radeon_get_colorbuffer(&rmesa->radeon);
839 /* color buffer */
840 if (rrb && rrb->bo) {
841 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
842 rrb->bo, 0,
843 RADEON_GEM_DOMAIN_VRAM);
844 }
845
846 /* depth buffer */
847 rrb = radeon_get_depthbuffer(&rmesa->radeon);
848 if (rrb && rrb->bo) {
849 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
850 rrb->bo, 0,
851 RADEON_GEM_DOMAIN_VRAM);
852 }
853
854 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
855 radeonTexObj *t;
856
857 if (!ctx->Texture.Unit[i]._ReallyEnabled)
858 continue;
859
860 if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
861 radeon_warning("failed to validate texture for unit %d.\n", i);
862 }
863 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
864 if (t->image_override && t->bo)
865 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
866 t->bo,
867 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
868 else if (t->mt->bo)
869 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
870 t->mt->bo,
871 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
872 }
873
874 pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(ctx);
875 if (pbo) {
876 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
877 RADEON_GEM_DOMAIN_GTT, 0);
878 }
879
880 pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(ctx);
881 if (pbo) {
882 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
883 RADEON_GEM_DOMAIN_GTT, 0);
884 }
885
886 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
887 if (ret)
888 return GL_FALSE;
889 return GL_TRUE;
890 }
891
892 void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
893 unsigned long long offset, GLint depth, GLuint pitch)
894 {
895 context_t *rmesa = pDRICtx->driverPrivate;
896 struct gl_texture_object *tObj =
897 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
898 radeonTexObjPtr t = radeon_tex_obj(tObj);
899 const struct gl_texture_image *firstImage;
900 uint32_t pitch_val, size, row_align;
901
902 if (!tObj)
903 return;
904
905 t->image_override = GL_TRUE;
906
907 if (!offset)
908 return;
909
910 firstImage = t->base.Image[0][t->minLod];
911 row_align = rmesa->radeon.texture_row_align - 1;
912 size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
913 if (t->bo) {
914 radeon_bo_unref(t->bo);
915 t->bo = NULL;
916 }
917 t->bo = radeon_legacy_bo_alloc_fake(rmesa->radeon.radeonScreen->bom, size, offset);
918 t->override_offset = offset;
919 pitch_val = pitch;
920 switch (depth) {
921 case 32:
922 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
923 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
924
925 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
926 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
927 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
928 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
929 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
930 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
931 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
932 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
933 pitch_val /= 4;
934 break;
935 case 24:
936 default:
937 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
938 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
939
940 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
941 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
942 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
943 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
944 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
945 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
946 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
947 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
948 pitch_val /= 4;
949 break;
950 case 16:
951 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
952 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
953
954 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
955 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
956 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
957 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
958 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
959 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
960 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
961 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
962 pitch_val /= 2;
963 break;
964 }
965
966 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
967 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
968
969 /* min pitch is 8 */
970 if (pitch_val < 8)
971 pitch_val = 8;
972
973 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
974 }
975
976 void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
977 {
978 struct gl_texture_unit *texUnit;
979 struct gl_texture_object *texObj;
980 struct gl_texture_image *texImage;
981 struct radeon_renderbuffer *rb;
982 radeon_texture_image *rImage;
983 radeonContextPtr radeon;
984 context_t *rmesa;
985 struct radeon_framebuffer *rfb;
986 radeonTexObjPtr t;
987 uint32_t pitch_val;
988 uint32_t internalFormat, type, format;
989
990 type = GL_BGRA;
991 format = GL_UNSIGNED_BYTE;
992 internalFormat = (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT ? 3 : 4);
993
994 radeon = pDRICtx->driverPrivate;
995 rmesa = pDRICtx->driverPrivate;
996
997 rfb = dPriv->driverPrivate;
998 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
999 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
1000 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
1001
1002 rImage = get_radeon_texture_image(texImage);
1003 t = radeon_tex_obj(texObj);
1004 if (t == NULL) {
1005 return;
1006 }
1007
1008 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
1009 rb = rfb->color_rb[0];
1010 if (rb->bo == NULL) {
1011 /* Failed to BO for the buffer */
1012 return;
1013 }
1014
1015 _mesa_lock_texture(radeon->glCtx, texObj);
1016 if (t->bo) {
1017 radeon_bo_unref(t->bo);
1018 t->bo = NULL;
1019 }
1020 if (rImage->bo) {
1021 radeon_bo_unref(rImage->bo);
1022 rImage->bo = NULL;
1023 }
1024
1025 radeon_miptree_unreference(&t->mt);
1026 radeon_miptree_unreference(&rImage->mt);
1027
1028 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
1029 rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
1030 texImage->RowStride = rb->pitch / rb->cpp;
1031
1032 rImage->bo = rb->bo;
1033 radeon_bo_ref(rImage->bo);
1034 t->bo = rb->bo;
1035 radeon_bo_ref(t->bo);
1036 t->image_override = GL_TRUE;
1037 t->override_offset = 0;
1038 pitch_val = rb->pitch;
1039 switch (rb->cpp) {
1040 case 4:
1041 if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT) {
1042 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1043 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1044
1045 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1046 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1047 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1048 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1049 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1050 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1051 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1052 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1053 } else {
1054 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1055 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1056
1057 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1058 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1059 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1060 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1061 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1062 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1063 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1064 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1065 }
1066 pitch_val /= 4;
1067 break;
1068 case 3:
1069 default:
1070 // FMT_8_8_8 ???
1071 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1072 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1073
1074 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1075 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1076 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1077 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1078 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1079 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1080 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1081 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1082 pitch_val /= 4;
1083 break;
1084 case 2:
1085 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
1086 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1087
1088 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1089 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1090 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1091 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1092 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1093 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1094 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1095 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1096 pitch_val /= 2;
1097 break;
1098 }
1099
1100 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1101 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1102
1103 /* min pitch is 8 */
1104 if (pitch_val < 8)
1105 pitch_val = 8;
1106
1107 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1108 SETfield(t->SQ_TEX_RESOURCE0, rb->base.Width - 1,
1109 TEX_WIDTH_shift, TEX_WIDTH_mask);
1110 SETfield(t->SQ_TEX_RESOURCE1, rb->base.Height - 1,
1111 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
1112
1113 t->validated = GL_TRUE;
1114 _mesa_unlock_texture(radeon->glCtx, texObj);
1115 return;
1116 }
1117
1118 void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
1119 {
1120 r600SetTexBuffer2(pDRICtx, target, GLX_TEXTURE_FORMAT_RGBA_EXT, dPriv);
1121 }