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Merge branch 'lp-offset-twoside'
[mesa.git] / src / mesa / drivers / dri / r600 / r600_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r600_context.h"
48 #include "radeon_mipmap_tree.h"
49 #include "r600_tex.h"
50 #include "r700_fragprog.h"
51 #include "r700_vertprog.h"
52
53 #include "evergreen_tex.h"
54
55 void r600UpdateTextureState(struct gl_context * ctx);
56
57 void r600UpdateTextureState(struct gl_context * ctx)
58 {
59 context_t *context = R700_CONTEXT(ctx);
60 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
61 struct gl_texture_unit *texUnit;
62 struct radeon_tex_obj *t;
63 GLuint unit;
64
65 R600_STATECHANGE(context, tx);
66 R600_STATECHANGE(context, tx_smplr);
67 R600_STATECHANGE(context, tx_brdr_clr);
68
69 for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) {
70 texUnit = &ctx->Texture.Unit[unit];
71 t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
72 r700->textures[unit] = NULL;
73 if (texUnit->_ReallyEnabled) {
74 if (!t)
75 continue;
76 r700->textures[unit] = t;
77 }
78 }
79 }
80
81 static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
82 {
83 radeonTexObj *t = radeon_tex_obj(tObj);
84
85 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
86 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
87 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
88 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
89 CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
90
91 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
92 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
93 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
94 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
95 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
96 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
97 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
98 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
99
100 CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
101 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL,
102 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
103 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
104
105 switch (mesa_format) /* This is mesa format. */
106 {
107 case MESA_FORMAT_RGBA8888:
108 case MESA_FORMAT_SIGNED_RGBA8888:
109 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
110 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
111
112 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
113 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
114 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
115 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
116 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
117 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
118 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
119 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
120 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
121 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
122 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
123 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
124 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
125 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
126 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
127 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
128 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
129 }
130 break;
131 case MESA_FORMAT_RGBA8888_REV:
132 case MESA_FORMAT_SIGNED_RGBA8888_REV:
133 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
134 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
135
136 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
137 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
138 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
139 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
140 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
141 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
142 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
143 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
144 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
145 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
146 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
147 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
148 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
149 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
150 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
151 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
152 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
153 }
154 break;
155 case MESA_FORMAT_ARGB8888:
156 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
157 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
158
159 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
161 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
163 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
164 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
165 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
166 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
167 break;
168 case MESA_FORMAT_XRGB8888:
169 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
170 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
171
172 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
173 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
174 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
175 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
176 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
177 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
178 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
179 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
180 break;
181 case MESA_FORMAT_XRGB8888_REV:
182 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
183 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
184
185 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
186 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
187 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
188 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
189 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
190 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
191 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
192 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
193 break;
194 case MESA_FORMAT_ARGB8888_REV:
195 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
196 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
197
198 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
199 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
200 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
201 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
202 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
203 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
204 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
205 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
206 break;
207 case MESA_FORMAT_RGB888:
208 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8,
209 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
210
211 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
212 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
213 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
214 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
215 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
217 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
219 break;
220 case MESA_FORMAT_RGB565:
221 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
222 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
223
224 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
225 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
226 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
227 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
228 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
229 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
230 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
232 break;
233 case MESA_FORMAT_RGB565_REV:
234 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
235 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
236
237 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
238 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
239 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
240 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
241 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
242 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
243 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
244 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
245 break;
246 case MESA_FORMAT_ARGB4444:
247 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
248 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
249
250 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
251 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
252 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
253 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
254 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
255 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
256 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
257 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
258 break;
259 case MESA_FORMAT_ARGB4444_REV:
260 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
261 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
262
263 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
264 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
265 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
266 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
267 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
268 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
269 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
270 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
271 break;
272 case MESA_FORMAT_ARGB1555:
273 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
274 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
275
276 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
277 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
278 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
279 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
280 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
281 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
282 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
283 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
284 break;
285 case MESA_FORMAT_ARGB1555_REV:
286 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
287 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
288
289 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
291 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
293 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
295 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
296 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
297 break;
298 case MESA_FORMAT_AL88:
299 case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
300 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
301 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
302
303 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
304 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
305 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
306 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
307 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
308 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
309 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
310 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
311 break;
312 case MESA_FORMAT_RGB332:
313 SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2,
314 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
315
316 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
317 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
318 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
319 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
320 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
321 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
322 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
323 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
324 break;
325 case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
326 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
327 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
328
329 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
331 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
332 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
333 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
334 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
335 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
336 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
337 break;
338 case MESA_FORMAT_L8: /* X, X, X, ONE */
339 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
340 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
341
342 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
343 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
344 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
345 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
346 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
347 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
348 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
349 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
350 break;
351 case MESA_FORMAT_I8: /* X, X, X, X */
352 case MESA_FORMAT_CI8:
353 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
354 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
355
356 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
357 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
358 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
359 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
360 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
362 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
363 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
364 break;
365 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
366 /*
367 case MESA_FORMAT_YCBCR:
368 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
369 break;
370 */
371 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
372 /*
373 case MESA_FORMAT_YCBCR_REV:
374 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
375 break;
376 */
377 case MESA_FORMAT_RGB_DXT1: /* not supported yet */
378 case MESA_FORMAT_RGBA_DXT1: /* not supported yet */
379 case MESA_FORMAT_RGBA_DXT3: /* not supported yet */
380 case MESA_FORMAT_RGBA_DXT5: /* not supported yet */
381 return GL_FALSE;
382
383 case MESA_FORMAT_RGBA_FLOAT32:
384 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT,
385 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
386
387 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
388 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
389 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
390 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
391 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
392 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
393 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
394 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
395 break;
396 case MESA_FORMAT_RGBA_FLOAT16:
397 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT,
398 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
399
400 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
401 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
402 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
403 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
404 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
405 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
406 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
407 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
408 break;
409 case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */
410 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT,
411 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
412
413 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
414 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
415 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
416 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
417 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
418 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
419 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
420 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
421 break;
422 case MESA_FORMAT_RGB_FLOAT16:
423 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT,
424 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
425
426 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
427 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
428 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
429 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
430 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
431 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
432 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
433 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
434 break;
435 case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
436 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
437 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
438
439 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
440 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
441 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
442 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
443 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
444 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
445 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
446 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
447 break;
448 case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
449 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
450 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
451
452 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
453 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
454 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
455 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
456 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
457 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
458 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
459 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
460 break;
461 case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
462 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
463 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
464
465 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
466 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
467 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
468 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
469 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
470 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
471 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
472 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
473 break;
474 case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
475 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
476 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
477
478 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
479 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
480 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
481 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
482 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
483 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
484 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
485 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
486 break;
487 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
488 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT,
489 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
490
491 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
492 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
493 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
494 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
495 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
496 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
497 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
498 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
499 break;
500 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
501 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT,
502 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
503
504 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
505 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
506 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
507 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
508 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
509 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
510 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
511 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
512 break;
513 case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
514 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
515 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
516
517 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
518 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
519 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
520 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
521 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
522 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
523 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
524 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
525 break;
526 case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
527 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
528 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
529
530 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
531 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
532 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
533 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
534 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
535 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
536 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
537 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
538 break;
539 case MESA_FORMAT_Z16:
540 case MESA_FORMAT_X8_Z24:
541 case MESA_FORMAT_S8_Z24:
542 case MESA_FORMAT_Z24_S8:
543 case MESA_FORMAT_Z32:
544 case MESA_FORMAT_S8:
545 SETbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
546 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_1D_TILED_THIN1,
547 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
548 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
549 switch (mesa_format) {
550 case MESA_FORMAT_Z16:
551 SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
552 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
553 break;
554 case MESA_FORMAT_X8_Z24:
555 case MESA_FORMAT_S8_Z24:
556 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_24,
557 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
558 break;
559 case MESA_FORMAT_Z24_S8:
560 SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
561 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
562 break;
563 case MESA_FORMAT_Z32:
564 SETfield(t->SQ_TEX_RESOURCE1, FMT_32,
565 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
566 break;
567 case MESA_FORMAT_S8:
568 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
569 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
570 break;
571 default:
572 break;
573 };
574 switch (tObj->DepthMode) {
575 case GL_LUMINANCE: /* X, X, X, ONE */
576 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
577 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
578 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
579 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
580 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
581 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
582 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
583 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
584 break;
585 case GL_INTENSITY: /* X, X, X, X */
586 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
587 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
588 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
589 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
590 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
591 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
592 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
593 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
594 break;
595 case GL_ALPHA: /* ZERO, ZERO, ZERO, X */
596 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
597 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
598 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
599 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
600 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
601 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
602 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
603 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
604 break;
605 default:
606 return GL_FALSE;
607 }
608 break;
609 /* EXT_texture_sRGB */
610 case MESA_FORMAT_SARGB8:
611 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
612 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
613
614 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
615 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
616 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
617 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
618 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
619 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
620 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
621 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
622 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
623 break;
624 case MESA_FORMAT_SLA8:
625 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
626 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
627
628 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
629 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
630 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
631 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
632 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
633 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
634 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
635 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
636 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
637 break;
638 case MESA_FORMAT_SL8: /* X, X, X, ONE */
639 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
640 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
641
642 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
643 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
644 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
645 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
646 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
647 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
648 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
649 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
650 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
651 break;
652 default:
653 /* Not supported format */
654 return GL_FALSE;
655 };
656
657 return GL_TRUE;
658 }
659
660 static GLuint r600_translate_shadow_func(GLenum func)
661 {
662 switch (func) {
663 case GL_NEVER:
664 return SQ_TEX_DEPTH_COMPARE_NEVER;
665 case GL_LESS:
666 return SQ_TEX_DEPTH_COMPARE_LESS;
667 case GL_LEQUAL:
668 return SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
669 case GL_GREATER:
670 return SQ_TEX_DEPTH_COMPARE_GREATER;
671 case GL_GEQUAL:
672 return SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
673 case GL_NOTEQUAL:
674 return SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
675 case GL_EQUAL:
676 return SQ_TEX_DEPTH_COMPARE_EQUAL;
677 case GL_ALWAYS:
678 return SQ_TEX_DEPTH_COMPARE_ALWAYS;
679 default:
680 WARN_ONCE("Unknown shadow compare function! %d", func);
681 return 0;
682 }
683 }
684
685 static INLINE uint32_t
686 S_FIXED(float value, uint32_t frac_bits)
687 {
688 return value * (1 << frac_bits);
689 }
690
691 void r600SetDepthTexMode(struct gl_texture_object *tObj)
692 {
693 radeonTexObjPtr t;
694
695 if (!tObj)
696 return;
697
698 t = radeon_tex_obj(tObj);
699
700 if(!r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat))
701 t->validated = GL_FALSE;
702 }
703
704 /**
705 * Compute the cached hardware register values for the given texture object.
706 *
707 * \param rmesa Context pointer
708 * \param t the r300 texture object
709 */
710 static GLboolean setup_hardware_state(struct gl_context * ctx, struct gl_texture_object *texObj, int unit)
711 {
712 context_t *rmesa = R700_CONTEXT(ctx);
713 radeonTexObj *t = radeon_tex_obj(texObj);
714 const struct gl_texture_image *firstImage;
715 GLuint uTexelPitch, row_align;
716
717 if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
718 t->image_override &&
719 t->bo)
720 return GL_TRUE;
721
722 firstImage = t->base.Image[0][t->minLod];
723
724 if (!t->image_override) {
725 if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
726 radeon_warning("unsupported texture format in %s\n",
727 __FUNCTION__);
728 return GL_FALSE;
729 }
730 }
731
732 switch (texObj->Target) {
733 case GL_TEXTURE_1D:
734 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask);
735 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
736 break;
737 case GL_TEXTURE_2D:
738 case GL_TEXTURE_RECTANGLE_NV:
739 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
740 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
741 break;
742 case GL_TEXTURE_3D:
743 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask);
744 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ???
745 TEX_DEPTH_shift, TEX_DEPTH_mask);
746 break;
747 case GL_TEXTURE_CUBE_MAP:
748 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask);
749 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
750 break;
751 default:
752 radeon_error("unexpected texture target type in %s\n", __FUNCTION__);
753 return GL_FALSE;
754 }
755
756 row_align = rmesa->radeon.texture_row_align - 1;
757 uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
758 uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
759 uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
760 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
761
762 /* min pitch is 8 */
763 if (uTexelPitch < 8)
764 uTexelPitch = 8;
765
766 SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask);
767 SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1,
768 TEX_WIDTH_shift, TEX_WIDTH_mask);
769 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
770 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
771
772 t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
773
774 t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
775
776 SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
777 SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
778
779 SETfield(t->SQ_TEX_SAMPLER1,
780 S_FIXED(CLAMP(t->base.MinLod - t->minLod, 0, 15), 6),
781 MIN_LOD_shift, MIN_LOD_mask);
782 SETfield(t->SQ_TEX_SAMPLER1,
783 S_FIXED(CLAMP(t->base.MaxLod - t->minLod, 0, 15), 6),
784 MAX_LOD_shift, MAX_LOD_mask);
785 SETfield(t->SQ_TEX_SAMPLER1,
786 S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.LodBias, -16, 16), 6),
787 SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
788
789 if(texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
790 {
791 SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
792 }
793 else
794 {
795 CLEARfield(t->SQ_TEX_SAMPLER0, DEPTH_COMPARE_FUNCTION_mask);
796 }
797
798 return GL_TRUE;
799 }
800
801 /**
802 * Ensure the given texture is ready for rendering.
803 *
804 * Mostly this means populating the texture object's mipmap tree.
805 */
806 static GLboolean r600_validate_texture(struct gl_context * ctx, struct gl_texture_object *texObj, int unit)
807 {
808 radeonTexObj *t = radeon_tex_obj(texObj);
809
810 if (!radeon_validate_texture_miptree(ctx, texObj))
811 return GL_FALSE;
812
813 /* Configure the hardware registers (more precisely, the cached version
814 * of the hardware registers). */
815 if (!setup_hardware_state(ctx, texObj, unit))
816 return GL_FALSE;
817
818 t->validated = GL_TRUE;
819 return GL_TRUE;
820 }
821
822 /**
823 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
824 */
825 GLboolean r600ValidateBuffers(struct gl_context * ctx)
826 {
827 context_t *rmesa = R700_CONTEXT(ctx);
828 struct radeon_renderbuffer *rrb;
829 struct radeon_bo *pbo;
830 int i;
831 int ret;
832
833 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
834
835 rrb = radeon_get_colorbuffer(&rmesa->radeon);
836 /* color buffer */
837 if (rrb && rrb->bo) {
838 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
839 rrb->bo, 0,
840 RADEON_GEM_DOMAIN_VRAM);
841 }
842
843 /* depth buffer */
844 rrb = radeon_get_depthbuffer(&rmesa->radeon);
845 if (rrb && rrb->bo) {
846 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
847 rrb->bo, 0,
848 RADEON_GEM_DOMAIN_VRAM);
849 }
850
851 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
852 radeonTexObj *t;
853
854 if (!ctx->Texture.Unit[i]._ReallyEnabled)
855 continue;
856
857 if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
858 radeon_warning("failed to validate texture for unit %d.\n", i);
859 }
860 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
861 if (t->image_override && t->bo)
862 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
863 t->bo,
864 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
865 else if (t->mt->bo)
866 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
867 t->mt->bo,
868 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
869 }
870
871 pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(ctx);
872 if (pbo) {
873 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
874 RADEON_GEM_DOMAIN_GTT, 0);
875 }
876
877 pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(ctx);
878 if (pbo) {
879 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
880 RADEON_GEM_DOMAIN_GTT, 0);
881 }
882
883 pbo = (struct radeon_bo *)r700GetActiveFpShaderConstBo(ctx);
884 if (pbo) {
885 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
886 RADEON_GEM_DOMAIN_GTT, 0);
887 }
888
889 pbo = (struct radeon_bo *)r700GetActiveVpShaderConstBo(ctx);
890 if (pbo) {
891 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
892 RADEON_GEM_DOMAIN_GTT, 0);
893 }
894
895 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
896 if (ret)
897 return GL_FALSE;
898 return GL_TRUE;
899 }
900
901 void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
902 unsigned long long offset, GLint depth, GLuint pitch)
903 {
904 context_t *rmesa = pDRICtx->driverPrivate;
905 struct gl_texture_object *tObj =
906 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
907 radeonTexObjPtr t = radeon_tex_obj(tObj);
908 const struct gl_texture_image *firstImage;
909 uint32_t pitch_val, size, row_align;
910
911 if (!tObj)
912 return;
913
914 if(rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
915 {
916 evergreenSetTexOffset(pDRICtx, texname, offset, depth, pitch);
917 return;
918 }
919
920 t->image_override = GL_TRUE;
921
922 if (!offset)
923 return;
924
925 firstImage = t->base.Image[0][t->minLod];
926 row_align = rmesa->radeon.texture_row_align - 1;
927 size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
928 if (t->bo) {
929 radeon_bo_unref(t->bo);
930 t->bo = NULL;
931 }
932 t->bo = radeon_legacy_bo_alloc_fake(rmesa->radeon.radeonScreen->bom, size, offset);
933 t->override_offset = offset;
934 pitch_val = pitch;
935 switch (depth) {
936 case 32:
937 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
938 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
939
940 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
941 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
942 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
943 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
944 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
945 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
946 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
947 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
948 pitch_val /= 4;
949 break;
950 case 24:
951 default:
952 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
953 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
954
955 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
956 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
957 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
958 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
959 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
960 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
961 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
962 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
963 pitch_val /= 4;
964 break;
965 case 16:
966 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
967 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
968
969 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
970 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
971 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
972 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
973 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
974 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
975 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
976 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
977 pitch_val /= 2;
978 break;
979 }
980
981 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
982 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
983
984 /* min pitch is 8 */
985 if (pitch_val < 8)
986 pitch_val = 8;
987
988 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
989 }
990
991 void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
992 {
993 struct gl_texture_unit *texUnit;
994 struct gl_texture_object *texObj;
995 struct gl_texture_image *texImage;
996 struct radeon_renderbuffer *rb;
997 radeon_texture_image *rImage;
998 radeonContextPtr radeon;
999 context_t *rmesa;
1000 struct radeon_framebuffer *rfb;
1001 radeonTexObjPtr t;
1002 uint32_t pitch_val;
1003 uint32_t internalFormat, type, format;
1004 gl_format texFormat;
1005
1006 type = GL_BGRA;
1007 format = GL_UNSIGNED_BYTE;
1008 internalFormat = (glx_texture_format == __DRI_TEXTURE_FORMAT_RGB ? 3 : 4);
1009
1010 radeon = pDRICtx->driverPrivate;
1011 rmesa = pDRICtx->driverPrivate;
1012
1013 if(rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
1014 {
1015 evergreenSetTexBuffer(pDRICtx, target, glx_texture_format, dPriv);
1016 return;
1017 }
1018
1019 rfb = dPriv->driverPrivate;
1020 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
1021 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
1022 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
1023
1024 rImage = get_radeon_texture_image(texImage);
1025 t = radeon_tex_obj(texObj);
1026 if (t == NULL) {
1027 return;
1028 }
1029
1030 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
1031 rb = rfb->color_rb[0];
1032 if (rb->bo == NULL) {
1033 /* Failed to BO for the buffer */
1034 return;
1035 }
1036
1037 _mesa_lock_texture(radeon->glCtx, texObj);
1038 if (t->bo) {
1039 radeon_bo_unref(t->bo);
1040 t->bo = NULL;
1041 }
1042 if (rImage->bo) {
1043 radeon_bo_unref(rImage->bo);
1044 rImage->bo = NULL;
1045 }
1046
1047 radeon_miptree_unreference(&t->mt);
1048 radeon_miptree_unreference(&rImage->mt);
1049
1050 rImage->bo = rb->bo;
1051 radeon_bo_ref(rImage->bo);
1052 t->bo = rb->bo;
1053 radeon_bo_ref(t->bo);
1054 t->image_override = GL_TRUE;
1055 t->override_offset = 0;
1056 pitch_val = rb->pitch;
1057 switch (rb->cpp) {
1058 case 4:
1059 if (glx_texture_format == __DRI_TEXTURE_FORMAT_RGB) {
1060 texFormat = MESA_FORMAT_RGB888;
1061 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1062 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1063
1064 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1065 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1066 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1067 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1068 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1069 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1070 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1071 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1072 } else {
1073 texFormat = MESA_FORMAT_ARGB8888;
1074 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1075 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1076
1077 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1078 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1079 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1080 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1081 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1082 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1083 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1084 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1085 }
1086 pitch_val /= 4;
1087 break;
1088 case 3:
1089 default:
1090 // FMT_8_8_8 ???
1091 texFormat = MESA_FORMAT_RGB888;
1092 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1093 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1094
1095 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1096 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1097 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1098 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1099 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1100 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1101 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1102 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1103 pitch_val /= 4;
1104 break;
1105 case 2:
1106 texFormat = MESA_FORMAT_RGB565;
1107 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
1108 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1109
1110 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1111 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1112 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1113 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1114 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1115 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1116 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1117 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1118 pitch_val /= 2;
1119 break;
1120 }
1121
1122 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
1123 rb->base.Width, rb->base.Height, 1, 0,
1124 rb->cpp, texFormat);
1125 texImage->RowStride = rb->pitch / rb->cpp;
1126
1127 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1128 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1129
1130 /* min pitch is 8 */
1131 if (pitch_val < 8)
1132 pitch_val = 8;
1133
1134 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1135 SETfield(t->SQ_TEX_RESOURCE0, rb->base.Width - 1,
1136 TEX_WIDTH_shift, TEX_WIDTH_mask);
1137 SETfield(t->SQ_TEX_RESOURCE1, rb->base.Height - 1,
1138 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
1139
1140 t->validated = GL_TRUE;
1141 _mesa_unlock_texture(radeon->glCtx, texObj);
1142 return;
1143 }
1144
1145 void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
1146 {
1147 r600SetTexBuffer2(pDRICtx, target, __DRI_TEXTURE_FORMAT_RGBA, dPriv);
1148 }