Merge remote branch 'origin/master' into nv50-compiler
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_chipset.h
1 #ifndef _RADEON_CHIPSET_H
2 #define _RADEON_CHIPSET_H
3 /* Including xf86PciInfo.h introduces a bunch of errors...
4 */
5
6 /* General chip classes:
7 * r100 includes R100, RV100, RV200, RS100, RS200, RS250.
8 * r200 includes R200, RV250, RV280, RS300.
9 * r300 includes R300, RV350, RV370.
10 * (RS* denotes IGP)
11 */
12 #define PCI_CHIP_RV380_3150 0x3150
13 #define PCI_CHIP_RV380_3152 0x3152
14 #define PCI_CHIP_RV380_3154 0x3154
15 #define PCI_CHIP_RV380_3155 0x3155
16 #define PCI_CHIP_RV380_3E50 0x3E50
17 #define PCI_CHIP_RV380_3E54 0x3E54
18 #define PCI_CHIP_RS100_4136 0x4136
19 #define PCI_CHIP_RS200_4137 0x4137
20 #define PCI_CHIP_R300_AD 0x4144
21 #define PCI_CHIP_R300_AE 0x4145
22 #define PCI_CHIP_R300_AF 0x4146
23 #define PCI_CHIP_R300_AG 0x4147
24 #define PCI_CHIP_R350_AH 0x4148
25 #define PCI_CHIP_R350_AI 0x4149
26 #define PCI_CHIP_R350_AJ 0x414A
27 #define PCI_CHIP_R350_AK 0x414B
28 #define PCI_CHIP_RV350_AP 0x4150
29 #define PCI_CHIP_RV350_AQ 0x4151
30 #define PCI_CHIP_RV350_AR 0x4152
31 #define PCI_CHIP_RV350_AS 0x4153
32 #define PCI_CHIP_RV350_AT 0x4154
33 #define PCI_CHIP_RV350_AU 0x4155
34 #define PCI_CHIP_RV350_AV 0x4156
35 #define PCI_CHIP_RS250_4237 0x4237
36 #define PCI_CHIP_R200_BB 0x4242
37 #define PCI_CHIP_R200_BC 0x4243
38 #define PCI_CHIP_RS100_4336 0x4336
39 #define PCI_CHIP_RS200_4337 0x4337
40 #define PCI_CHIP_RS250_4437 0x4437
41 #define PCI_CHIP_RV250_If 0x4966
42 #define PCI_CHIP_RV250_Ig 0x4967
43 #define PCI_CHIP_R420_JH 0x4A48
44 #define PCI_CHIP_R420_JI 0x4A49
45 #define PCI_CHIP_R420_JJ 0x4A4A
46 #define PCI_CHIP_R420_JK 0x4A4B
47 #define PCI_CHIP_R420_JL 0x4A4C
48 #define PCI_CHIP_R420_JM 0x4A4D
49 #define PCI_CHIP_R420_JN 0x4A4E
50 #define PCI_CHIP_R420_JO 0x4A4F
51 #define PCI_CHIP_R420_JP 0x4A50
52 #define PCI_CHIP_R420_JT 0x4A54
53 #define PCI_CHIP_R481_4B49 0x4B49
54 #define PCI_CHIP_R481_4B4A 0x4B4A
55 #define PCI_CHIP_R481_4B4B 0x4B4B
56 #define PCI_CHIP_R481_4B4C 0x4B4C
57 #define PCI_CHIP_RADEON_LW 0x4C57
58 #define PCI_CHIP_RADEON_LX 0x4C58
59 #define PCI_CHIP_RADEON_LY 0x4C59
60 #define PCI_CHIP_RADEON_LZ 0x4C5A
61 #define PCI_CHIP_RV250_Ld 0x4C64
62 #define PCI_CHIP_RV250_Lf 0x4C66
63 #define PCI_CHIP_RV250_Lg 0x4C67
64 #define PCI_CHIP_R300_ND 0x4E44
65 #define PCI_CHIP_R300_NE 0x4E45
66 #define PCI_CHIP_R300_NF 0x4E46
67 #define PCI_CHIP_R300_NG 0x4E47
68 #define PCI_CHIP_R350_NH 0x4E48
69 #define PCI_CHIP_R350_NI 0x4E49
70 #define PCI_CHIP_R360_NJ 0x4E4A
71 #define PCI_CHIP_R350_NK 0x4E4B
72 #define PCI_CHIP_RV350_NP 0x4E50
73 #define PCI_CHIP_RV350_NQ 0x4E51
74 #define PCI_CHIP_RV350_NR 0x4E52
75 #define PCI_CHIP_RV350_NS 0x4E53
76 #define PCI_CHIP_RV350_NT 0x4E54
77 #define PCI_CHIP_RV350_NV 0x4E56
78 #define PCI_CHIP_RADEON_QD 0x5144
79 #define PCI_CHIP_RADEON_QE 0x5145
80 #define PCI_CHIP_RADEON_QF 0x5146
81 #define PCI_CHIP_RADEON_QG 0x5147
82 #define PCI_CHIP_R200_QH 0x5148
83 #define PCI_CHIP_R200_QL 0x514C
84 #define PCI_CHIP_R200_QM 0x514D
85 #define PCI_CHIP_RV200_QW 0x5157
86 #define PCI_CHIP_RV200_QX 0x5158
87 #define PCI_CHIP_RADEON_QY 0x5159
88 #define PCI_CHIP_RADEON_QZ 0x515A
89 #define PCI_CHIP_RN50_515E 0x515E
90 #define PCI_CHIP_RV370_5460 0x5460
91 #define PCI_CHIP_RV370_5462 0x5462
92 #define PCI_CHIP_RV370_5464 0x5464
93 #define PCI_CHIP_R423_UH 0x5548
94 #define PCI_CHIP_R423_UI 0x5549
95 #define PCI_CHIP_R423_UJ 0x554A
96 #define PCI_CHIP_R423_UK 0x554B
97 #define PCI_CHIP_R430_554C 0x554C
98 #define PCI_CHIP_R430_554D 0x554D
99 #define PCI_CHIP_R430_554E 0x554E
100 #define PCI_CHIP_R430_554F 0x554F
101 #define PCI_CHIP_R423_5550 0x5550
102 #define PCI_CHIP_R423_UQ 0x5551
103 #define PCI_CHIP_R423_UR 0x5552
104 #define PCI_CHIP_R423_UT 0x5554
105 #define PCI_CHIP_RV410_564A 0x564A
106 #define PCI_CHIP_RV410_564B 0x564B
107 #define PCI_CHIP_RV410_564F 0x564F
108 #define PCI_CHIP_RV410_5652 0x5652
109 #define PCI_CHIP_RV410_5653 0x5653
110 #define PCI_CHIP_RV410_5657 0x5657
111 #define PCI_CHIP_RS300_5834 0x5834
112 #define PCI_CHIP_RS300_5835 0x5835
113 #define PCI_CHIP_RS480_5954 0x5954
114 #define PCI_CHIP_RS480_5955 0x5955
115 #define PCI_CHIP_RV280_5960 0x5960
116 #define PCI_CHIP_RV280_5961 0x5961
117 #define PCI_CHIP_RV280_5962 0x5962
118 #define PCI_CHIP_RV280_5964 0x5964
119 #define PCI_CHIP_RV280_5965 0x5965
120 #define PCI_CHIP_RN50_5969 0x5969
121 #define PCI_CHIP_RS482_5974 0x5974
122 #define PCI_CHIP_RS482_5975 0x5975
123 #define PCI_CHIP_RS400_5A41 0x5A41
124 #define PCI_CHIP_RS400_5A42 0x5A42
125 #define PCI_CHIP_RC410_5A61 0x5A61
126 #define PCI_CHIP_RC410_5A62 0x5A62
127 #define PCI_CHIP_RV370_5B60 0x5B60
128 #define PCI_CHIP_RV370_5B62 0x5B62
129 #define PCI_CHIP_RV370_5B63 0x5B63
130 #define PCI_CHIP_RV370_5B64 0x5B64
131 #define PCI_CHIP_RV370_5B65 0x5B65
132 #define PCI_CHIP_RV280_5C61 0x5C61
133 #define PCI_CHIP_RV280_5C63 0x5C63
134 #define PCI_CHIP_R430_5D48 0x5D48
135 #define PCI_CHIP_R430_5D49 0x5D49
136 #define PCI_CHIP_R430_5D4A 0x5D4A
137 #define PCI_CHIP_R480_5D4C 0x5D4C
138 #define PCI_CHIP_R480_5D4D 0x5D4D
139 #define PCI_CHIP_R480_5D4E 0x5D4E
140 #define PCI_CHIP_R480_5D4F 0x5D4F
141 #define PCI_CHIP_R480_5D50 0x5D50
142 #define PCI_CHIP_R480_5D52 0x5D52
143 #define PCI_CHIP_R423_5D57 0x5D57
144 #define PCI_CHIP_RV410_5E48 0x5E48
145 #define PCI_CHIP_RV410_5E4A 0x5E4A
146 #define PCI_CHIP_RV410_5E4B 0x5E4B
147 #define PCI_CHIP_RV410_5E4C 0x5E4C
148 #define PCI_CHIP_RV410_5E4D 0x5E4D
149 #define PCI_CHIP_RV410_5E4F 0x5E4F
150
151 #define PCI_CHIP_R520_7100 0x7100
152 #define PCI_CHIP_R520_7101 0x7101
153 #define PCI_CHIP_R520_7102 0x7102
154 #define PCI_CHIP_R520_7103 0x7103
155 #define PCI_CHIP_R520_7104 0x7104
156 #define PCI_CHIP_R520_7105 0x7105
157 #define PCI_CHIP_R520_7106 0x7106
158 #define PCI_CHIP_R520_7108 0x7108
159 #define PCI_CHIP_R520_7109 0x7109
160 #define PCI_CHIP_R520_710A 0x710A
161 #define PCI_CHIP_R520_710B 0x710B
162 #define PCI_CHIP_R520_710C 0x710C
163 #define PCI_CHIP_R520_710E 0x710E
164 #define PCI_CHIP_R520_710F 0x710F
165 #define PCI_CHIP_RV515_7140 0x7140
166 #define PCI_CHIP_RV515_7141 0x7141
167 #define PCI_CHIP_RV515_7142 0x7142
168 #define PCI_CHIP_RV515_7143 0x7143
169 #define PCI_CHIP_RV515_7144 0x7144
170 #define PCI_CHIP_RV515_7145 0x7145
171 #define PCI_CHIP_RV515_7146 0x7146
172 #define PCI_CHIP_RV515_7147 0x7147
173 #define PCI_CHIP_RV515_7149 0x7149
174 #define PCI_CHIP_RV515_714A 0x714A
175 #define PCI_CHIP_RV515_714B 0x714B
176 #define PCI_CHIP_RV515_714C 0x714C
177 #define PCI_CHIP_RV515_714D 0x714D
178 #define PCI_CHIP_RV515_714E 0x714E
179 #define PCI_CHIP_RV515_714F 0x714F
180 #define PCI_CHIP_RV515_7151 0x7151
181 #define PCI_CHIP_RV515_7152 0x7152
182 #define PCI_CHIP_RV515_7153 0x7153
183 #define PCI_CHIP_RV515_715E 0x715E
184 #define PCI_CHIP_RV515_715F 0x715F
185 #define PCI_CHIP_RV515_7180 0x7180
186 #define PCI_CHIP_RV515_7181 0x7181
187 #define PCI_CHIP_RV515_7183 0x7183
188 #define PCI_CHIP_RV515_7186 0x7186
189 #define PCI_CHIP_RV515_7187 0x7187
190 #define PCI_CHIP_RV515_7188 0x7188
191 #define PCI_CHIP_RV515_718A 0x718A
192 #define PCI_CHIP_RV515_718B 0x718B
193 #define PCI_CHIP_RV515_718C 0x718C
194 #define PCI_CHIP_RV515_718D 0x718D
195 #define PCI_CHIP_RV515_718F 0x718F
196 #define PCI_CHIP_RV515_7193 0x7193
197 #define PCI_CHIP_RV515_7196 0x7196
198 #define PCI_CHIP_RV515_719B 0x719B
199 #define PCI_CHIP_RV515_719F 0x719F
200 #define PCI_CHIP_RV530_71C0 0x71C0
201 #define PCI_CHIP_RV530_71C1 0x71C1
202 #define PCI_CHIP_RV530_71C2 0x71C2
203 #define PCI_CHIP_RV530_71C3 0x71C3
204 #define PCI_CHIP_RV530_71C4 0x71C4
205 #define PCI_CHIP_RV530_71C5 0x71C5
206 #define PCI_CHIP_RV530_71C6 0x71C6
207 #define PCI_CHIP_RV530_71C7 0x71C7
208 #define PCI_CHIP_RV530_71CD 0x71CD
209 #define PCI_CHIP_RV530_71CE 0x71CE
210 #define PCI_CHIP_RV530_71D2 0x71D2
211 #define PCI_CHIP_RV530_71D4 0x71D4
212 #define PCI_CHIP_RV530_71D5 0x71D5
213 #define PCI_CHIP_RV530_71D6 0x71D6
214 #define PCI_CHIP_RV530_71DA 0x71DA
215 #define PCI_CHIP_RV530_71DE 0x71DE
216 #define PCI_CHIP_RV515_7200 0x7200
217 #define PCI_CHIP_RV515_7210 0x7210
218 #define PCI_CHIP_RV515_7211 0x7211
219 #define PCI_CHIP_R580_7240 0x7240
220 #define PCI_CHIP_R580_7243 0x7243
221 #define PCI_CHIP_R580_7244 0x7244
222 #define PCI_CHIP_R580_7245 0x7245
223 #define PCI_CHIP_R580_7246 0x7246
224 #define PCI_CHIP_R580_7247 0x7247
225 #define PCI_CHIP_R580_7248 0x7248
226 #define PCI_CHIP_R580_7249 0x7249
227 #define PCI_CHIP_R580_724A 0x724A
228 #define PCI_CHIP_R580_724B 0x724B
229 #define PCI_CHIP_R580_724C 0x724C
230 #define PCI_CHIP_R580_724D 0x724D
231 #define PCI_CHIP_R580_724E 0x724E
232 #define PCI_CHIP_R580_724F 0x724F
233 #define PCI_CHIP_RV570_7280 0x7280
234 #define PCI_CHIP_RV560_7281 0x7281
235 #define PCI_CHIP_RV560_7283 0x7283
236 #define PCI_CHIP_R580_7284 0x7284
237 #define PCI_CHIP_RV560_7287 0x7287
238 #define PCI_CHIP_RV570_7288 0x7288
239 #define PCI_CHIP_RV570_7289 0x7289
240 #define PCI_CHIP_RV570_728B 0x728B
241 #define PCI_CHIP_RV570_728C 0x728C
242 #define PCI_CHIP_RV560_7290 0x7290
243 #define PCI_CHIP_RV560_7291 0x7291
244 #define PCI_CHIP_RV560_7293 0x7293
245 #define PCI_CHIP_RV560_7297 0x7297
246
247 #define PCI_CHIP_RS350_7834 0x7834
248 #define PCI_CHIP_RS350_7835 0x7835
249 #define PCI_CHIP_RS690_791E 0x791E
250 #define PCI_CHIP_RS690_791F 0x791F
251 #define PCI_CHIP_RS600_793F 0x793F
252 #define PCI_CHIP_RS600_7941 0x7941
253 #define PCI_CHIP_RS600_7942 0x7942
254 #define PCI_CHIP_RS740_796C 0x796C
255 #define PCI_CHIP_RS740_796D 0x796D
256 #define PCI_CHIP_RS740_796E 0x796E
257 #define PCI_CHIP_RS740_796F 0x796F
258
259 #define PCI_CHIP_R600_9400 0x9400
260 #define PCI_CHIP_R600_9401 0x9401
261 #define PCI_CHIP_R600_9402 0x9402
262 #define PCI_CHIP_R600_9403 0x9403
263 #define PCI_CHIP_R600_9405 0x9405
264 #define PCI_CHIP_R600_940A 0x940A
265 #define PCI_CHIP_R600_940B 0x940B
266 #define PCI_CHIP_R600_940F 0x940F
267
268 #define PCI_CHIP_RV610_94C0 0x94C0
269 #define PCI_CHIP_RV610_94C1 0x94C1
270 #define PCI_CHIP_RV610_94C3 0x94C3
271 #define PCI_CHIP_RV610_94C4 0x94C4
272 #define PCI_CHIP_RV610_94C5 0x94C5
273 #define PCI_CHIP_RV610_94C6 0x94C6
274 #define PCI_CHIP_RV610_94C7 0x94C7
275 #define PCI_CHIP_RV610_94C8 0x94C8
276 #define PCI_CHIP_RV610_94C9 0x94C9
277 #define PCI_CHIP_RV610_94CB 0x94CB
278 #define PCI_CHIP_RV610_94CC 0x94CC
279 #define PCI_CHIP_RV610_94CD 0x94CD
280
281 #define PCI_CHIP_RV630_9580 0x9580
282 #define PCI_CHIP_RV630_9581 0x9581
283 #define PCI_CHIP_RV630_9583 0x9583
284 #define PCI_CHIP_RV630_9586 0x9586
285 #define PCI_CHIP_RV630_9587 0x9587
286 #define PCI_CHIP_RV630_9588 0x9588
287 #define PCI_CHIP_RV630_9589 0x9589
288 #define PCI_CHIP_RV630_958A 0x958A
289 #define PCI_CHIP_RV630_958B 0x958B
290 #define PCI_CHIP_RV630_958C 0x958C
291 #define PCI_CHIP_RV630_958D 0x958D
292 #define PCI_CHIP_RV630_958E 0x958E
293 #define PCI_CHIP_RV630_958F 0x958F
294
295 #define PCI_CHIP_RV670_9500 0x9500
296 #define PCI_CHIP_RV670_9501 0x9501
297 #define PCI_CHIP_RV670_9504 0x9504
298 #define PCI_CHIP_RV670_9505 0x9505
299 #define PCI_CHIP_RV670_9506 0x9506
300 #define PCI_CHIP_RV670_9507 0x9507
301 #define PCI_CHIP_RV670_9508 0x9508
302 #define PCI_CHIP_RV670_9509 0x9509
303 #define PCI_CHIP_RV670_950F 0x950F
304 #define PCI_CHIP_RV670_9511 0x9511
305 #define PCI_CHIP_RV670_9515 0x9515
306 #define PCI_CHIP_RV670_9517 0x9517
307 #define PCI_CHIP_RV670_9519 0x9519
308
309 #define PCI_CHIP_RV620_95C0 0x95C0
310 #define PCI_CHIP_RV620_95C2 0x95C2
311 #define PCI_CHIP_RV620_95C4 0x95C4
312 #define PCI_CHIP_RV620_95C5 0x95C5
313 #define PCI_CHIP_RV620_95C6 0x95C6
314 #define PCI_CHIP_RV620_95C7 0x95C7
315 #define PCI_CHIP_RV620_95C9 0x95C9
316 #define PCI_CHIP_RV620_95CC 0x95CC
317 #define PCI_CHIP_RV620_95CD 0x95CD
318 #define PCI_CHIP_RV620_95CE 0x95CE
319 #define PCI_CHIP_RV620_95CF 0x95CF
320
321 #define PCI_CHIP_RV635_9590 0x9590
322 #define PCI_CHIP_RV635_9591 0x9591
323 #define PCI_CHIP_RV635_9593 0x9593
324 #define PCI_CHIP_RV635_9595 0x9595
325 #define PCI_CHIP_RV635_9596 0x9596
326 #define PCI_CHIP_RV635_9597 0x9597
327 #define PCI_CHIP_RV635_9598 0x9598
328 #define PCI_CHIP_RV635_9599 0x9599
329 #define PCI_CHIP_RV635_959B 0x959B
330
331 #define PCI_CHIP_RS780_9610 0x9610
332 #define PCI_CHIP_RS780_9611 0x9611
333 #define PCI_CHIP_RS780_9612 0x9612
334 #define PCI_CHIP_RS780_9613 0x9613
335 #define PCI_CHIP_RS780_9614 0x9614
336 #define PCI_CHIP_RS780_9615 0x9615
337 #define PCI_CHIP_RS780_9616 0x9616
338
339 #define PCI_CHIP_RS880_9710 0x9710
340 #define PCI_CHIP_RS880_9711 0x9711
341 #define PCI_CHIP_RS880_9712 0x9712
342 #define PCI_CHIP_RS880_9713 0x9713
343 #define PCI_CHIP_RS880_9714 0x9714
344 #define PCI_CHIP_RS880_9715 0x9715
345
346 #define PCI_CHIP_RV770_9440 0x9440
347 #define PCI_CHIP_RV770_9441 0x9441
348 #define PCI_CHIP_RV770_9442 0x9442
349 #define PCI_CHIP_RV770_9443 0x9443
350 #define PCI_CHIP_RV770_9444 0x9444
351 #define PCI_CHIP_RV770_9446 0x9446
352 #define PCI_CHIP_RV770_944A 0x944A
353 #define PCI_CHIP_RV770_944B 0x944B
354 #define PCI_CHIP_RV770_944C 0x944C
355 #define PCI_CHIP_RV770_944E 0x944E
356 #define PCI_CHIP_RV770_9450 0x9450
357 #define PCI_CHIP_RV770_9452 0x9452
358 #define PCI_CHIP_RV770_9456 0x9456
359 #define PCI_CHIP_RV770_945A 0x945A
360 #define PCI_CHIP_RV770_945B 0x945B
361 #define PCI_CHIP_RV770_945E 0x945E
362 #define PCI_CHIP_RV790_9460 0x9460
363 #define PCI_CHIP_RV790_9462 0x9462
364 #define PCI_CHIP_RV770_946A 0x946A
365 #define PCI_CHIP_RV770_946B 0x946B
366 #define PCI_CHIP_RV770_947A 0x947A
367 #define PCI_CHIP_RV770_947B 0x947B
368
369 #define PCI_CHIP_RV730_9480 0x9480
370 #define PCI_CHIP_RV730_9487 0x9487
371 #define PCI_CHIP_RV730_9488 0x9488
372 #define PCI_CHIP_RV730_9489 0x9489
373 #define PCI_CHIP_RV730_948A 0x948A
374 #define PCI_CHIP_RV730_948F 0x948F
375 #define PCI_CHIP_RV730_9490 0x9490
376 #define PCI_CHIP_RV730_9491 0x9491
377 #define PCI_CHIP_RV730_9495 0x9495
378 #define PCI_CHIP_RV730_9498 0x9498
379 #define PCI_CHIP_RV730_949C 0x949C
380 #define PCI_CHIP_RV730_949E 0x949E
381 #define PCI_CHIP_RV730_949F 0x949F
382
383 #define PCI_CHIP_RV710_9540 0x9540
384 #define PCI_CHIP_RV710_9541 0x9541
385 #define PCI_CHIP_RV710_9542 0x9542
386 #define PCI_CHIP_RV710_954E 0x954E
387 #define PCI_CHIP_RV710_954F 0x954F
388 #define PCI_CHIP_RV710_9552 0x9552
389 #define PCI_CHIP_RV710_9553 0x9553
390 #define PCI_CHIP_RV710_9555 0x9555
391 #define PCI_CHIP_RV710_9557 0x9557
392 #define PCI_CHIP_RV710_955F 0x955F
393
394 #define PCI_CHIP_RV740_94A0 0x94A0
395 #define PCI_CHIP_RV740_94A1 0x94A1
396 #define PCI_CHIP_RV740_94A3 0x94A3
397 #define PCI_CHIP_RV740_94B1 0x94B1
398 #define PCI_CHIP_RV740_94B3 0x94B3
399 #define PCI_CHIP_RV740_94B4 0x94B4
400 #define PCI_CHIP_RV740_94B5 0x94B5
401 #define PCI_CHIP_RV740_94B9 0x94B9
402
403 #define PCI_CHIP_CEDAR_68E0 0x68E0
404 #define PCI_CHIP_CEDAR_68E1 0x68E1
405 #define PCI_CHIP_CEDAR_68E4 0x68E4
406 #define PCI_CHIP_CEDAR_68E5 0x68E5
407 #define PCI_CHIP_CEDAR_68E8 0x68E8
408 #define PCI_CHIP_CEDAR_68E9 0x68E9
409 #define PCI_CHIP_CEDAR_68F1 0x68F1
410 #define PCI_CHIP_CEDAR_68F8 0x68F8
411 #define PCI_CHIP_CEDAR_68F9 0x68F9
412 #define PCI_CHIP_CEDAR_68FE 0x68FE
413
414 #define PCI_CHIP_REDWOOD_68C0 0x68C0
415 #define PCI_CHIP_REDWOOD_68C1 0x68C1
416 #define PCI_CHIP_REDWOOD_68C8 0x68C8
417 #define PCI_CHIP_REDWOOD_68C9 0x68C9
418 #define PCI_CHIP_REDWOOD_68D8 0x68D8
419 #define PCI_CHIP_REDWOOD_68D9 0x68D9
420 #define PCI_CHIP_REDWOOD_68DA 0x68DA
421 #define PCI_CHIP_REDWOOD_68DE 0x68DE
422
423 #define PCI_CHIP_JUNIPER_68A0 0x68A0
424 #define PCI_CHIP_JUNIPER_68A1 0x68A1
425 #define PCI_CHIP_JUNIPER_68A8 0x68A8
426 #define PCI_CHIP_JUNIPER_68A9 0x68A9
427 #define PCI_CHIP_JUNIPER_68B0 0x68B0
428 #define PCI_CHIP_JUNIPER_68B8 0x68B8
429 #define PCI_CHIP_JUNIPER_68B9 0x68B9
430 #define PCI_CHIP_JUNIPER_68BE 0x68BE
431
432 #define PCI_CHIP_CYPRESS_6880 0x6880
433 #define PCI_CHIP_CYPRESS_6888 0x6888
434 #define PCI_CHIP_CYPRESS_6889 0x6889
435 #define PCI_CHIP_CYPRESS_688A 0x688A
436 #define PCI_CHIP_CYPRESS_6898 0x6898
437 #define PCI_CHIP_CYPRESS_6899 0x6899
438 #define PCI_CHIP_CYPRESS_689E 0x689E
439
440 #define PCI_CHIP_HEMLOCK_689C 0x689C
441 #define PCI_CHIP_HEMLOCK_689D 0x689D
442
443 enum {
444 CHIP_FAMILY_R100,
445 CHIP_FAMILY_RV100,
446 CHIP_FAMILY_RS100,
447 CHIP_FAMILY_RV200,
448 CHIP_FAMILY_RS200,
449 CHIP_FAMILY_R200,
450 CHIP_FAMILY_RV250,
451 CHIP_FAMILY_RS300,
452 CHIP_FAMILY_RV280,
453 CHIP_FAMILY_R300,
454 CHIP_FAMILY_R350,
455 CHIP_FAMILY_RV350,
456 CHIP_FAMILY_RV380,
457 CHIP_FAMILY_RS400,
458 CHIP_FAMILY_R420,
459 CHIP_FAMILY_RV410,
460 CHIP_FAMILY_RS600,
461 CHIP_FAMILY_RS690,
462 CHIP_FAMILY_RS740,
463 CHIP_FAMILY_RV515,
464 CHIP_FAMILY_R520,
465 CHIP_FAMILY_RV530,
466 CHIP_FAMILY_R580,
467 CHIP_FAMILY_RV560,
468 CHIP_FAMILY_RV570,
469 CHIP_FAMILY_R600,
470 CHIP_FAMILY_RV610,
471 CHIP_FAMILY_RV630,
472 CHIP_FAMILY_RV670,
473 CHIP_FAMILY_RV620,
474 CHIP_FAMILY_RV635,
475 CHIP_FAMILY_RS780,
476 CHIP_FAMILY_RS880,
477 CHIP_FAMILY_RV770,
478 CHIP_FAMILY_RV730,
479 CHIP_FAMILY_RV710,
480 CHIP_FAMILY_RV740,
481 CHIP_FAMILY_CEDAR,
482 CHIP_FAMILY_REDWOOD,
483 CHIP_FAMILY_JUNIPER,
484 CHIP_FAMILY_CYPRESS,
485 CHIP_FAMILY_HEMLOCK,
486 CHIP_FAMILY_LAST
487 };
488
489 /* General classes of Radeons, as described above the device ID section */
490 #define RADEON_CLASS_R100 (0 << 0)
491 #define RADEON_CLASS_R200 (1 << 0)
492 #define RADEON_CLASS_R300 (2 << 0)
493 #define RADEON_CLASS_R600 (3 << 0)
494 #define RADEON_CLASS_MASK (3 << 0)
495
496 #define RADEON_CHIPSET_TCL (1 << 2) /* tcl support - any radeon */
497 #define RADEON_CHIPSET_BROKEN_STENCIL (1 << 3) /* r100 stencil bug */
498 #define R200_CHIPSET_YCBCR_BROKEN (1 << 4) /* r200 ycbcr bug */
499
500 #endif /* _RADEON_CHIPSET_H */