1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
33 **************************************************************************/
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
39 #include "drirenderbuffer.h"
40 #include "drivers/common/meta.h"
41 #include "main/context.h"
42 #include "main/renderbuffer.h"
43 #include "main/state.h"
44 #include "main/simple_list.h"
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
49 #define DRIVER_DATE "20090101"
52 int RADEON_DEBUG
= (0);
56 static const char* get_chip_family_name(int chip_family
)
59 case CHIP_FAMILY_R100
: return "R100";
60 case CHIP_FAMILY_RV100
: return "RV100";
61 case CHIP_FAMILY_RS100
: return "RS100";
62 case CHIP_FAMILY_RV200
: return "RV200";
63 case CHIP_FAMILY_RS200
: return "RS200";
64 case CHIP_FAMILY_R200
: return "R200";
65 case CHIP_FAMILY_RV250
: return "RV250";
66 case CHIP_FAMILY_RS300
: return "RS300";
67 case CHIP_FAMILY_RV280
: return "RV280";
68 case CHIP_FAMILY_R300
: return "R300";
69 case CHIP_FAMILY_R350
: return "R350";
70 case CHIP_FAMILY_RV350
: return "RV350";
71 case CHIP_FAMILY_RV380
: return "RV380";
72 case CHIP_FAMILY_R420
: return "R420";
73 case CHIP_FAMILY_RV410
: return "RV410";
74 case CHIP_FAMILY_RS400
: return "RS400";
75 case CHIP_FAMILY_RS600
: return "RS600";
76 case CHIP_FAMILY_RS690
: return "RS690";
77 case CHIP_FAMILY_RS740
: return "RS740";
78 case CHIP_FAMILY_RV515
: return "RV515";
79 case CHIP_FAMILY_R520
: return "R520";
80 case CHIP_FAMILY_RV530
: return "RV530";
81 case CHIP_FAMILY_R580
: return "R580";
82 case CHIP_FAMILY_RV560
: return "RV560";
83 case CHIP_FAMILY_RV570
: return "RV570";
84 case CHIP_FAMILY_R600
: return "R600";
85 case CHIP_FAMILY_RV610
: return "RV610";
86 case CHIP_FAMILY_RV630
: return "RV630";
87 case CHIP_FAMILY_RV670
: return "RV670";
88 case CHIP_FAMILY_RV620
: return "RV620";
89 case CHIP_FAMILY_RV635
: return "RV635";
90 case CHIP_FAMILY_RS780
: return "RS780";
91 case CHIP_FAMILY_RS880
: return "RS880";
92 case CHIP_FAMILY_RV770
: return "RV770";
93 case CHIP_FAMILY_RV730
: return "RV730";
94 case CHIP_FAMILY_RV710
: return "RV710";
95 case CHIP_FAMILY_RV740
: return "RV740";
96 case CHIP_FAMILY_CEDAR
: return "CEDAR";
97 case CHIP_FAMILY_REDWOOD
: return "REDWOOD";
98 case CHIP_FAMILY_JUNIPER
: return "JUNIPER";
99 case CHIP_FAMILY_CYPRESS
: return "CYPRESS";
100 case CHIP_FAMILY_HEMLOCK
: return "HEMLOCK";
101 default: return "unknown";
106 /* Return various strings for glGetString().
108 static const GLubyte
*radeonGetString(GLcontext
* ctx
, GLenum name
)
110 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
111 static char buffer
[128];
115 if (IS_R600_CLASS(radeon
->radeonScreen
))
116 return (GLubyte
*) "Advanced Micro Devices, Inc.";
117 else if (IS_R300_CLASS(radeon
->radeonScreen
))
118 return (GLubyte
*) "DRI R300 Project";
120 return (GLubyte
*) "Tungsten Graphics, Inc.";
125 GLuint agp_mode
= (radeon
->radeonScreen
->card_type
==RADEON_CARD_PCI
) ? 0 :
126 radeon
->radeonScreen
->AGPMode
;
127 const char* chipclass
;
128 char hardwarename
[32];
130 if (IS_R600_CLASS(radeon
->radeonScreen
))
132 else if (IS_R300_CLASS(radeon
->radeonScreen
))
134 else if (IS_R200_CLASS(radeon
->radeonScreen
))
139 sprintf(hardwarename
, "%s (%s %04X)",
141 get_chip_family_name(radeon
->radeonScreen
->chip_family
),
142 radeon
->radeonScreen
->device_id
);
144 offset
= driGetRendererString(buffer
, hardwarename
, DRIVER_DATE
,
147 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
148 sprintf(&buffer
[offset
], " TCL");
149 } else if (IS_R300_CLASS(radeon
->radeonScreen
)) {
150 sprintf(&buffer
[offset
], " %sTCL",
151 (radeon
->radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
)
154 sprintf(&buffer
[offset
], " %sTCL",
155 !(radeon
->TclFallback
& RADEON_TCL_FALLBACK_TCL_DISABLE
)
159 if (radeon
->radeonScreen
->driScreen
->dri2
.enabled
)
160 strcat(buffer
, " DRI2");
162 return (GLubyte
*) buffer
;
170 /* Initialize the driver's misc functions.
172 static void radeonInitDriverFuncs(struct dd_function_table
*functions
)
174 functions
->GetString
= radeonGetString
;
178 * Create and initialize all common fields of the context,
179 * including the Mesa context itself.
181 GLboolean
radeonInitContext(radeonContextPtr radeon
,
182 struct dd_function_table
* functions
,
183 const __GLcontextModes
* glVisual
,
184 __DRIcontext
* driContextPriv
,
185 void *sharedContextPrivate
)
187 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
188 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
193 /* Fill in additional standard functions. */
194 radeonInitDriverFuncs(functions
);
196 radeon
->radeonScreen
= screen
;
197 /* Allocate and initialize the Mesa context */
198 if (sharedContextPrivate
)
199 shareCtx
= ((radeonContextPtr
)sharedContextPrivate
)->glCtx
;
202 radeon
->glCtx
= _mesa_create_context(glVisual
, shareCtx
,
203 functions
, (void *)radeon
);
208 driContextPriv
->driverPrivate
= radeon
;
210 meta_init_metaops(ctx
, &radeon
->meta
);
212 _mesa_meta_init(ctx
);
215 radeon
->dri
.context
= driContextPriv
;
216 radeon
->dri
.screen
= sPriv
;
217 radeon
->dri
.hwContext
= driContextPriv
->hHWContext
;
218 radeon
->dri
.hwLock
= &sPriv
->pSAREA
->lock
;
219 radeon
->dri
.hwLockCount
= 0;
220 radeon
->dri
.fd
= sPriv
->fd
;
221 radeon
->dri
.drmMinor
= sPriv
->drm_version
.minor
;
223 radeon
->sarea
= (drm_radeon_sarea_t
*) ((GLubyte
*) sPriv
->pSAREA
+
224 screen
->sarea_priv_offset
);
227 fthrottle_mode
= driQueryOptioni(&radeon
->optionCache
, "fthrottle_mode");
228 radeon
->iw
.irq_seq
= -1;
229 radeon
->irqsEmitted
= 0;
230 radeon
->do_irqs
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_IRQS
&&
231 radeon
->radeonScreen
->irq
);
233 radeon
->do_usleeps
= (fthrottle_mode
== DRI_CONF_FTHROTTLE_USLEEPS
);
235 if (!radeon
->do_irqs
)
237 "IRQ's not enabled, falling back to %s: %d %d\n",
238 radeon
->do_usleeps
? "usleeps" : "busy waits",
239 fthrottle_mode
, radeon
->radeonScreen
->irq
);
241 radeon
->texture_depth
= driQueryOptioni (&radeon
->optionCache
,
243 if (radeon
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FB
)
244 radeon
->texture_depth
= ( glVisual
->rgbBits
> 16 ) ?
245 DRI_CONF_TEXTURE_DEPTH_32
: DRI_CONF_TEXTURE_DEPTH_16
;
247 if (IS_R600_CLASS(radeon
->radeonScreen
)) {
248 radeon
->texture_row_align
= 256;
249 radeon
->texture_rect_row_align
= 256;
250 radeon
->texture_compressed_row_align
= 256;
251 } else if (IS_R200_CLASS(radeon
->radeonScreen
) ||
252 IS_R100_CLASS(radeon
->radeonScreen
)) {
253 radeon
->texture_row_align
= 32;
254 radeon
->texture_rect_row_align
= 64;
255 radeon
->texture_compressed_row_align
= 32;
256 } else { /* R300 - not sure this is all correct */
257 int chip_family
= radeon
->radeonScreen
->chip_family
;
258 if (chip_family
== CHIP_FAMILY_RS600
||
259 chip_family
== CHIP_FAMILY_RS690
||
260 chip_family
== CHIP_FAMILY_RS740
)
261 radeon
->texture_row_align
= 64;
263 radeon
->texture_row_align
= 32;
264 radeon
->texture_rect_row_align
= 64;
265 radeon
->texture_compressed_row_align
= 32;
268 radeon_init_dma(radeon
);
276 * Destroy the command buffer and state atoms.
278 static void radeon_destroy_atom_list(radeonContextPtr radeon
)
280 struct radeon_state_atom
*atom
;
282 foreach(atom
, &radeon
->hw
.atomlist
) {
291 * Cleanup common context fields.
292 * Called by r200DestroyContext/r300DestroyContext
294 void radeonDestroyContext(__DRIcontext
*driContextPriv
)
296 #ifdef RADEON_BO_TRACK
299 GET_CURRENT_CONTEXT(ctx
);
300 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
301 radeonContextPtr current
= ctx
? RADEON_CONTEXT(ctx
) : NULL
;
305 _mesa_meta_free(radeon
->glCtx
);
307 if (radeon
== current
) {
308 _mesa_make_current(NULL
, NULL
, NULL
);
311 radeon_firevertices(radeon
);
312 if (!is_empty_list(&radeon
->dma
.reserved
)) {
313 rcommonFlushCmdBuf( radeon
, __FUNCTION__
);
316 radeonFreeDmaRegions(radeon
);
317 radeonReleaseArrays(radeon
->glCtx
, ~0);
318 meta_destroy_metaops(&radeon
->meta
);
319 if (radeon
->vtbl
.free_context
)
320 radeon
->vtbl
.free_context(radeon
->glCtx
);
321 _swsetup_DestroyContext( radeon
->glCtx
);
322 _tnl_DestroyContext( radeon
->glCtx
);
323 _vbo_DestroyContext( radeon
->glCtx
);
324 _swrast_DestroyContext( radeon
->glCtx
);
327 /* free the Mesa context */
328 _mesa_destroy_context(radeon
->glCtx
);
330 /* _mesa_destroy_context() might result in calls to functions that
331 * depend on the DriverCtx, so don't set it to NULL before.
333 * radeon->glCtx->DriverCtx = NULL;
335 /* free the option cache */
336 driDestroyOptionCache(&radeon
->optionCache
);
338 rcommonDestroyCmdBuf(radeon
);
340 radeon_destroy_atom_list(radeon
);
342 if (radeon
->state
.scissor
.pClipRects
) {
343 FREE(radeon
->state
.scissor
.pClipRects
);
344 radeon
->state
.scissor
.pClipRects
= 0;
346 #ifdef RADEON_BO_TRACK
347 track
= fopen("/tmp/tracklog", "w");
349 radeon_tracker_print(&radeon
->radeonScreen
->bom
->tracker
, track
);
356 /* Force the context `c' to be unbound from its buffer.
358 GLboolean
radeonUnbindContext(__DRIcontext
* driContextPriv
)
360 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
362 if (RADEON_DEBUG
& RADEON_DRI
)
363 fprintf(stderr
, "%s ctx %p\n", __FUNCTION__
,
371 radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon
,
372 struct radeon_framebuffer
*draw
)
374 /* if radeon->fake */
375 struct radeon_renderbuffer
*rb
;
377 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
379 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
380 radeon
->radeonScreen
->frontOffset
,
383 RADEON_GEM_DOMAIN_VRAM
,
386 rb
->cpp
= radeon
->radeonScreen
->cpp
;
387 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
389 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
391 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
392 radeon
->radeonScreen
->backOffset
,
395 RADEON_GEM_DOMAIN_VRAM
,
398 rb
->cpp
= radeon
->radeonScreen
->cpp
;
399 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
401 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
403 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
404 radeon
->radeonScreen
->depthOffset
,
407 RADEON_GEM_DOMAIN_VRAM
,
410 rb
->cpp
= radeon
->radeonScreen
->cpp
;
411 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
413 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
415 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
416 radeon
->radeonScreen
->depthOffset
,
419 RADEON_GEM_DOMAIN_VRAM
,
422 rb
->cpp
= radeon
->radeonScreen
->cpp
;
423 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
428 radeon_make_renderbuffer_current(radeonContextPtr radeon
,
429 struct radeon_framebuffer
*draw
)
431 int size
= 4096*4096*4;
432 /* if radeon->fake */
433 struct radeon_renderbuffer
*rb
;
435 if (radeon
->radeonScreen
->kernel_mm
) {
436 radeon_make_kernel_renderbuffer_current(radeon
, draw
);
441 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_FRONT_LEFT
].Renderbuffer
)) {
443 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
444 radeon
->radeonScreen
->frontOffset
+
445 radeon
->radeonScreen
->fbLocation
,
448 RADEON_GEM_DOMAIN_VRAM
,
451 rb
->cpp
= radeon
->radeonScreen
->cpp
;
452 rb
->pitch
= radeon
->radeonScreen
->frontPitch
* rb
->cpp
;
454 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
)) {
456 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
457 radeon
->radeonScreen
->backOffset
+
458 radeon
->radeonScreen
->fbLocation
,
461 RADEON_GEM_DOMAIN_VRAM
,
464 rb
->cpp
= radeon
->radeonScreen
->cpp
;
465 rb
->pitch
= radeon
->radeonScreen
->backPitch
* rb
->cpp
;
467 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
)) {
469 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
470 radeon
->radeonScreen
->depthOffset
+
471 radeon
->radeonScreen
->fbLocation
,
474 RADEON_GEM_DOMAIN_VRAM
,
477 rb
->cpp
= radeon
->radeonScreen
->cpp
;
478 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
480 if ((rb
= (void *)draw
->base
.Attachment
[BUFFER_STENCIL
].Renderbuffer
)) {
482 rb
->bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
483 radeon
->radeonScreen
->depthOffset
+
484 radeon
->radeonScreen
->fbLocation
,
487 RADEON_GEM_DOMAIN_VRAM
,
490 rb
->cpp
= radeon
->radeonScreen
->cpp
;
491 rb
->pitch
= radeon
->radeonScreen
->depthPitch
* rb
->cpp
;
496 radeon_bits_per_pixel(const struct radeon_renderbuffer
*rb
)
498 return _mesa_get_format_bytes(rb
->base
.Format
) * 8;
502 * Check if drawable has been invalidated by dri2InvalidateDrawable().
503 * Update renderbuffers if so. This prevents a client from accessing
504 * a backbuffer that has a swap pending but not yet completed.
506 * See intel_prepare_render for equivalent code in intel driver.
509 void radeon_prepare_render(radeonContextPtr radeon
)
511 __DRIcontext
*driContext
= radeon
->dri
.context
;
512 __DRIdrawable
*drawable
;
515 screen
= driContext
->driScreenPriv
;
516 if (!screen
->dri2
.loader
)
519 drawable
= driContext
->driDrawablePriv
;
520 if (drawable
->dri2
.stamp
!= driContext
->dri2
.draw_stamp
) {
521 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
522 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
524 /* Intel driver does the equivalent of this, no clue if it is needed:
525 * radeon_draw_buffer(radeon->glCtx, &(drawable->driverPrivate)->base);
527 driContext
->dri2
.draw_stamp
= drawable
->dri2
.stamp
;
530 drawable
= driContext
->driReadablePriv
;
531 if (drawable
->dri2
.stamp
!= driContext
->dri2
.read_stamp
) {
532 if (drawable
->lastStamp
!= drawable
->dri2
.stamp
)
533 radeon_update_renderbuffers(driContext
, drawable
, GL_FALSE
);
534 driContext
->dri2
.read_stamp
= drawable
->dri2
.stamp
;
537 /* If we're currently rendering to the front buffer, the rendering
538 * that will happen next will probably dirty the front buffer. So
539 * mark it as dirty here.
541 if (radeon
->is_front_buffer_rendering
)
542 radeon
->front_buffer_dirty
= GL_TRUE
;
546 radeon_update_renderbuffers(__DRIcontext
*context
, __DRIdrawable
*drawable
,
547 GLboolean front_only
)
549 unsigned int attachments
[10];
550 __DRIbuffer
*buffers
= NULL
;
552 struct radeon_renderbuffer
*rb
;
554 struct radeon_framebuffer
*draw
;
555 radeonContextPtr radeon
;
557 struct radeon_bo
*depth_bo
= NULL
, *bo
;
559 if (RADEON_DEBUG
& RADEON_DRI
)
560 fprintf(stderr
, "enter %s, drawable %p\n", __func__
, drawable
);
562 draw
= drawable
->driverPrivate
;
563 screen
= context
->driScreenPriv
;
564 radeon
= (radeonContextPtr
) context
->driverPrivate
;
566 /* Set this up front, so that in case our buffers get invalidated
567 * while we're getting new buffers, we don't clobber the stamp and
568 * thus ignore the invalidate. */
569 drawable
->lastStamp
= drawable
->dri2
.stamp
;
571 if (screen
->dri2
.loader
572 && (screen
->dri2
.loader
->base
.version
> 2)
573 && (screen
->dri2
.loader
->getBuffersWithFormat
!= NULL
)) {
574 struct radeon_renderbuffer
*depth_rb
;
575 struct radeon_renderbuffer
*stencil_rb
;
578 if ((front_only
|| radeon
->is_front_buffer_rendering
||
579 radeon
->is_front_buffer_reading
||
581 && draw
->color_rb
[0]) {
582 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
583 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[0]);
587 if (draw
->color_rb
[1]) {
588 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
589 attachments
[i
++] = radeon_bits_per_pixel(draw
->color_rb
[1]);
592 depth_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
593 stencil_rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
595 if ((depth_rb
!= NULL
) && (stencil_rb
!= NULL
)) {
596 attachments
[i
++] = __DRI_BUFFER_DEPTH_STENCIL
;
597 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
598 } else if (depth_rb
!= NULL
) {
599 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
600 attachments
[i
++] = radeon_bits_per_pixel(depth_rb
);
601 } else if (stencil_rb
!= NULL
) {
602 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
603 attachments
[i
++] = radeon_bits_per_pixel(stencil_rb
);
607 buffers
= (*screen
->dri2
.loader
->getBuffersWithFormat
)(drawable
,
612 drawable
->loaderPrivate
);
613 } else if (screen
->dri2
.loader
) {
615 if (draw
->color_rb
[0])
616 attachments
[i
++] = __DRI_BUFFER_FRONT_LEFT
;
618 if (draw
->color_rb
[1])
619 attachments
[i
++] = __DRI_BUFFER_BACK_LEFT
;
620 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
))
621 attachments
[i
++] = __DRI_BUFFER_DEPTH
;
622 if (radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
))
623 attachments
[i
++] = __DRI_BUFFER_STENCIL
;
626 buffers
= (*screen
->dri2
.loader
->getBuffers
)(drawable
,
631 drawable
->loaderPrivate
);
637 /* set one cliprect to cover the whole drawable */
642 drawable
->numClipRects
= 1;
643 drawable
->pClipRects
[0].x1
= 0;
644 drawable
->pClipRects
[0].y1
= 0;
645 drawable
->pClipRects
[0].x2
= drawable
->w
;
646 drawable
->pClipRects
[0].y2
= drawable
->h
;
647 drawable
->numBackClipRects
= 1;
648 drawable
->pBackClipRects
[0].x1
= 0;
649 drawable
->pBackClipRects
[0].y1
= 0;
650 drawable
->pBackClipRects
[0].x2
= drawable
->w
;
651 drawable
->pBackClipRects
[0].y2
= drawable
->h
;
652 for (i
= 0; i
< count
; i
++) {
653 switch (buffers
[i
].attachment
) {
654 case __DRI_BUFFER_FRONT_LEFT
:
655 rb
= draw
->color_rb
[0];
656 regname
= "dri2 front buffer";
658 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
659 rb
= draw
->color_rb
[0];
660 regname
= "dri2 fake front buffer";
662 case __DRI_BUFFER_BACK_LEFT
:
663 rb
= draw
->color_rb
[1];
664 regname
= "dri2 back buffer";
666 case __DRI_BUFFER_DEPTH
:
667 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
668 regname
= "dri2 depth buffer";
670 case __DRI_BUFFER_DEPTH_STENCIL
:
671 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_DEPTH
);
672 regname
= "dri2 depth / stencil buffer";
674 case __DRI_BUFFER_STENCIL
:
675 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
676 regname
= "dri2 stencil buffer";
678 case __DRI_BUFFER_ACCUM
:
681 "unhandled buffer attach event, attacment type %d\n",
682 buffers
[i
].attachment
);
690 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
691 if (name
== buffers
[i
].name
)
695 if (RADEON_DEBUG
& RADEON_DRI
)
697 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
698 regname
, buffers
[i
].name
, buffers
[i
].attachment
,
699 buffers
[i
].cpp
, buffers
[i
].pitch
);
701 rb
->cpp
= buffers
[i
].cpp
;
702 rb
->pitch
= buffers
[i
].pitch
;
703 rb
->base
.Width
= drawable
->w
;
704 rb
->base
.Height
= drawable
->h
;
708 rb
->tile_config
= radeon
->radeonScreen
->tile_config
;
709 rb
->group_bytes
= radeon
->radeonScreen
->group_bytes
;
710 rb
->num_channels
= radeon
->radeonScreen
->num_channels
;
711 rb
->num_banks
= radeon
->radeonScreen
->num_banks
;
712 rb
->r7xx_bank_op
= radeon
->radeonScreen
->r7xx_bank_op
;
714 if (buffers
[i
].attachment
== __DRI_BUFFER_STENCIL
&& depth_bo
) {
715 if (RADEON_DEBUG
& RADEON_DRI
)
716 fprintf(stderr
, "(reusing depth buffer as stencil)\n");
720 uint32_t tiling_flags
= 0, pitch
= 0;
723 bo
= radeon_bo_open(radeon
->radeonScreen
->bom
,
727 RADEON_GEM_DOMAIN_VRAM
,
732 fprintf(stderr
, "failed to attach %s %d\n",
733 regname
, buffers
[i
].name
);
737 ret
= radeon_bo_get_tiling(bo
, &tiling_flags
, &pitch
);
738 if (tiling_flags
& RADEON_TILING_MACRO
)
739 bo
->flags
|= RADEON_BO_FLAGS_MACRO_TILE
;
740 if (tiling_flags
& RADEON_TILING_MICRO
)
741 bo
->flags
|= RADEON_BO_FLAGS_MICRO_TILE
;
745 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH
) {
746 if (draw
->base
.Visual
.depthBits
== 16)
751 radeon_renderbuffer_set_bo(rb
, bo
);
754 if (buffers
[i
].attachment
== __DRI_BUFFER_DEPTH_STENCIL
) {
755 rb
= radeon_get_renderbuffer(&draw
->base
, BUFFER_STENCIL
);
757 struct radeon_bo
*stencil_bo
= NULL
;
760 uint32_t name
= radeon_gem_name_bo(rb
->bo
);
761 if (name
== buffers
[i
].name
)
766 radeon_bo_ref(stencil_bo
);
767 radeon_renderbuffer_set_bo(rb
, stencil_bo
);
768 radeon_bo_unref(stencil_bo
);
773 driUpdateFramebufferSize(radeon
->glCtx
, drawable
);
776 /* Force the context `c' to be the current context and associate with it
779 GLboolean
radeonMakeCurrent(__DRIcontext
* driContextPriv
,
780 __DRIdrawable
* driDrawPriv
,
781 __DRIdrawable
* driReadPriv
)
783 radeonContextPtr radeon
;
784 struct radeon_framebuffer
*drfb
;
785 struct gl_framebuffer
*readfb
;
787 if (!driContextPriv
) {
788 if (RADEON_DEBUG
& RADEON_DRI
)
789 fprintf(stderr
, "%s ctx is null\n", __FUNCTION__
);
790 _mesa_make_current(NULL
, NULL
, NULL
);
794 radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
795 drfb
= driDrawPriv
->driverPrivate
;
796 readfb
= driReadPriv
->driverPrivate
;
798 if (driContextPriv
->driScreenPriv
->dri2
.enabled
) {
799 radeon_update_renderbuffers(driContextPriv
, driDrawPriv
, GL_FALSE
);
800 if (driDrawPriv
!= driReadPriv
)
801 radeon_update_renderbuffers(driContextPriv
, driReadPriv
, GL_FALSE
);
802 _mesa_reference_renderbuffer(&radeon
->state
.color
.rb
,
803 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_BACK_LEFT
)->base
));
804 _mesa_reference_renderbuffer(&radeon
->state
.depth
.rb
,
805 &(radeon_get_renderbuffer(&drfb
->base
, BUFFER_DEPTH
)->base
));
807 radeon_make_renderbuffer_current(radeon
, drfb
);
810 if (RADEON_DEBUG
& RADEON_DRI
)
811 fprintf(stderr
, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__
, radeon
->glCtx
, drfb
, readfb
);
813 driUpdateFramebufferSize(radeon
->glCtx
, driDrawPriv
);
814 if (driReadPriv
!= driDrawPriv
)
815 driUpdateFramebufferSize(radeon
->glCtx
, driReadPriv
);
817 _mesa_make_current(radeon
->glCtx
, &drfb
->base
, readfb
);
819 _mesa_update_state(radeon
->glCtx
);
821 if (radeon
->glCtx
->DrawBuffer
== &drfb
->base
) {
822 if (driDrawPriv
->swap_interval
== (unsigned)-1) {
824 driDrawPriv
->vblFlags
=
825 (radeon
->radeonScreen
->irq
!= 0)
826 ? driGetDefaultVBlankFlags(&radeon
->
828 : VBLANK_FLAG_NO_IRQ
;
830 driDrawableInitVBlank(driDrawPriv
);
831 drfb
->vbl_waited
= driDrawPriv
->vblSeq
;
833 for (i
= 0; i
< 2; i
++) {
834 if (drfb
->color_rb
[i
])
835 drfb
->color_rb
[i
]->vbl_pending
= driDrawPriv
->vblSeq
;
840 radeon_window_moved(radeon
);
841 radeon_draw_buffer(radeon
->glCtx
, &drfb
->base
);
845 if (RADEON_DEBUG
& RADEON_DRI
)
846 fprintf(stderr
, "End %s\n", __FUNCTION__
);