drm-uapi: use local files, not system libdrm
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_context.h
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
6
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
10
11 All Rights Reserved.
12
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
20
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
24
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32
33 **************************************************************************/
34
35 /*
36 * Authors:
37 * Gareth Hughes <gareth@valinux.com>
38 * Keith Whitwell <keithw@vmware.com>
39 * Kevin E. Martin <martin@valinux.com>
40 * Nicolai Haehnle <prefect_@gmx.net>
41 */
42
43 #ifndef __RADEON_CONTEXT_H__
44 #define __RADEON_CONTEXT_H__
45
46 #include "tnl/t_vertex.h"
47 #include "dri_util.h"
48 #include "drm-uapi/drm.h"
49 #include "radeon_drm.h"
50 #include "main/macros.h"
51 #include "main/mtypes.h"
52 #include "radeon_screen.h"
53
54 #include "radeon_common.h"
55
56
57 struct r100_context;
58 typedef struct r100_context r100ContextRec;
59 typedef struct r100_context *r100ContextPtr;
60
61
62
63 #define R100_TEX_ALL 0x7
64
65 /* used for both tcl_vtx and vc_frmt tex bits (they are identical) */
66 #define RADEON_ST_BIT(unit) \
67 (unit == 0 ? RADEON_CP_VC_FRMT_ST0 : (RADEON_CP_VC_FRMT_ST1 >> 2) << (2 * unit))
68
69 #define RADEON_Q_BIT(unit) \
70 (unit == 0 ? RADEON_CP_VC_FRMT_Q0 : (RADEON_CP_VC_FRMT_Q1 >> 2) << (2 * unit))
71
72 struct radeon_texture_env_state {
73 radeonTexObjPtr texobj;
74 GLenum format;
75 GLenum envMode;
76 };
77
78 struct radeon_texture_state {
79 struct radeon_texture_env_state unit[RADEON_MAX_TEXTURE_UNITS];
80 };
81
82 /* Trying to keep these relatively short as the variables are becoming
83 * extravagently long. Drop the driver name prefix off the front of
84 * everything - I think we know which driver we're in by now, and keep the
85 * prefix to 3 letters unless absolutely impossible.
86 */
87
88 #define CTX_CMD_0 0
89 #define CTX_PP_MISC 1
90 #define CTX_PP_FOG_COLOR 2
91 #define CTX_RE_SOLID_COLOR 3
92 #define CTX_RB3D_BLENDCNTL 4
93 #define CTX_RB3D_DEPTHOFFSET 5
94 #define CTX_RB3D_DEPTHPITCH 6
95 #define CTX_RB3D_ZSTENCILCNTL 7
96 #define CTX_CMD_1 8
97 #define CTX_PP_CNTL 9
98 #define CTX_RB3D_CNTL 10
99 #define CTX_RB3D_COLOROFFSET 11
100 #define CTX_CMD_2 12
101 #define CTX_RB3D_COLORPITCH 13
102 #define CTX_STATE_SIZE 14
103
104 #define SET_CMD_0 0
105 #define SET_SE_CNTL 1
106 #define SET_SE_COORDFMT 2
107 #define SET_CMD_1 3
108 #define SET_SE_CNTL_STATUS 4
109 #define SET_STATE_SIZE 5
110
111 #define LIN_CMD_0 0
112 #define LIN_RE_LINE_PATTERN 1
113 #define LIN_RE_LINE_STATE 2
114 #define LIN_CMD_1 3
115 #define LIN_SE_LINE_WIDTH 4
116 #define LIN_STATE_SIZE 5
117
118 #define MSK_CMD_0 0
119 #define MSK_RB3D_STENCILREFMASK 1
120 #define MSK_RB3D_ROPCNTL 2
121 #define MSK_RB3D_PLANEMASK 3
122 #define MSK_STATE_SIZE 4
123
124 #define VPT_CMD_0 0
125 #define VPT_SE_VPORT_XSCALE 1
126 #define VPT_SE_VPORT_XOFFSET 2
127 #define VPT_SE_VPORT_YSCALE 3
128 #define VPT_SE_VPORT_YOFFSET 4
129 #define VPT_SE_VPORT_ZSCALE 5
130 #define VPT_SE_VPORT_ZOFFSET 6
131 #define VPT_STATE_SIZE 7
132
133 #define MSC_CMD_0 0
134 #define MSC_RE_MISC 1
135 #define MSC_STATE_SIZE 2
136
137 #define TEX_CMD_0 0
138 #define TEX_PP_TXFILTER 1
139 #define TEX_PP_TXFORMAT 2
140 #define TEX_PP_TXOFFSET 3
141 #define TEX_PP_TXCBLEND 4
142 #define TEX_PP_TXABLEND 5
143 #define TEX_PP_TFACTOR 6
144 #define TEX_CMD_1 7
145 #define TEX_PP_BORDER_COLOR 8
146 #define TEX_STATE_SIZE 9
147
148 #define TXR_CMD_0 0 /* rectangle textures */
149 #define TXR_PP_TEX_SIZE 1 /* 0x1d04, 0x1d0c for NPOT! */
150 #define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */
151 #define TXR_STATE_SIZE 3
152
153 #define CUBE_CMD_0 0
154 #define CUBE_PP_CUBIC_FACES 1
155 #define CUBE_CMD_1 2
156 #define CUBE_PP_CUBIC_OFFSET_0 3
157 #define CUBE_PP_CUBIC_OFFSET_1 4
158 #define CUBE_PP_CUBIC_OFFSET_2 5
159 #define CUBE_PP_CUBIC_OFFSET_3 6
160 #define CUBE_PP_CUBIC_OFFSET_4 7
161 #define CUBE_STATE_SIZE 8
162
163 #define ZBS_CMD_0 0
164 #define ZBS_SE_ZBIAS_FACTOR 1
165 #define ZBS_SE_ZBIAS_CONSTANT 2
166 #define ZBS_STATE_SIZE 3
167
168 #define TCL_CMD_0 0
169 #define TCL_OUTPUT_VTXFMT 1
170 #define TCL_OUTPUT_VTXSEL 2
171 #define TCL_MATRIX_SELECT_0 3
172 #define TCL_MATRIX_SELECT_1 4
173 #define TCL_UCP_VERT_BLEND_CTL 5
174 #define TCL_TEXTURE_PROC_CTL 6
175 #define TCL_LIGHT_MODEL_CTL 7
176 #define TCL_PER_LIGHT_CTL_0 8
177 #define TCL_PER_LIGHT_CTL_1 9
178 #define TCL_PER_LIGHT_CTL_2 10
179 #define TCL_PER_LIGHT_CTL_3 11
180 #define TCL_STATE_SIZE 12
181
182 #define MTL_CMD_0 0
183 #define MTL_EMMISSIVE_RED 1
184 #define MTL_EMMISSIVE_GREEN 2
185 #define MTL_EMMISSIVE_BLUE 3
186 #define MTL_EMMISSIVE_ALPHA 4
187 #define MTL_AMBIENT_RED 5
188 #define MTL_AMBIENT_GREEN 6
189 #define MTL_AMBIENT_BLUE 7
190 #define MTL_AMBIENT_ALPHA 8
191 #define MTL_DIFFUSE_RED 9
192 #define MTL_DIFFUSE_GREEN 10
193 #define MTL_DIFFUSE_BLUE 11
194 #define MTL_DIFFUSE_ALPHA 12
195 #define MTL_SPECULAR_RED 13
196 #define MTL_SPECULAR_GREEN 14
197 #define MTL_SPECULAR_BLUE 15
198 #define MTL_SPECULAR_ALPHA 16
199 #define MTL_SHININESS 17
200 #define MTL_STATE_SIZE 18
201
202 #define VTX_CMD_0 0
203 #define VTX_SE_COORD_FMT 1
204 #define VTX_STATE_SIZE 2
205
206 #define MAT_CMD_0 0
207 #define MAT_ELT_0 1
208 #define MAT_STATE_SIZE 17
209
210 #define GRD_CMD_0 0
211 #define GRD_VERT_GUARD_CLIP_ADJ 1
212 #define GRD_VERT_GUARD_DISCARD_ADJ 2
213 #define GRD_HORZ_GUARD_CLIP_ADJ 3
214 #define GRD_HORZ_GUARD_DISCARD_ADJ 4
215 #define GRD_STATE_SIZE 5
216
217 /* position changes frequently when lighting in modelpos - separate
218 * out to new state item?
219 */
220 #define LIT_CMD_0 0
221 #define LIT_AMBIENT_RED 1
222 #define LIT_AMBIENT_GREEN 2
223 #define LIT_AMBIENT_BLUE 3
224 #define LIT_AMBIENT_ALPHA 4
225 #define LIT_DIFFUSE_RED 5
226 #define LIT_DIFFUSE_GREEN 6
227 #define LIT_DIFFUSE_BLUE 7
228 #define LIT_DIFFUSE_ALPHA 8
229 #define LIT_SPECULAR_RED 9
230 #define LIT_SPECULAR_GREEN 10
231 #define LIT_SPECULAR_BLUE 11
232 #define LIT_SPECULAR_ALPHA 12
233 #define LIT_POSITION_X 13
234 #define LIT_POSITION_Y 14
235 #define LIT_POSITION_Z 15
236 #define LIT_POSITION_W 16
237 #define LIT_DIRECTION_X 17
238 #define LIT_DIRECTION_Y 18
239 #define LIT_DIRECTION_Z 19
240 #define LIT_DIRECTION_W 20
241 #define LIT_ATTEN_QUADRATIC 21
242 #define LIT_ATTEN_LINEAR 22
243 #define LIT_ATTEN_CONST 23
244 #define LIT_ATTEN_XXX 24
245 #define LIT_CMD_1 25
246 #define LIT_SPOT_DCD 26
247 #define LIT_SPOT_EXPONENT 27
248 #define LIT_SPOT_CUTOFF 28
249 #define LIT_SPECULAR_THRESH 29
250 #define LIT_RANGE_CUTOFF 30 /* ? */
251 #define LIT_ATTEN_CONST_INV 31
252 #define LIT_STATE_SIZE 32
253
254 /* Fog
255 */
256 #define FOG_CMD_0 0
257 #define FOG_R 1
258 #define FOG_C 2
259 #define FOG_D 3
260 #define FOG_PAD 4
261 #define FOG_STATE_SIZE 5
262
263 /* UCP
264 */
265 #define UCP_CMD_0 0
266 #define UCP_X 1
267 #define UCP_Y 2
268 #define UCP_Z 3
269 #define UCP_W 4
270 #define UCP_STATE_SIZE 5
271
272 /* GLT - Global ambient
273 */
274 #define GLT_CMD_0 0
275 #define GLT_RED 1
276 #define GLT_GREEN 2
277 #define GLT_BLUE 3
278 #define GLT_ALPHA 4
279 #define GLT_STATE_SIZE 5
280
281 /* EYE
282 */
283 #define EYE_CMD_0 0
284 #define EYE_X 1
285 #define EYE_Y 2
286 #define EYE_Z 3
287 #define EYE_RESCALE_FACTOR 4
288 #define EYE_STATE_SIZE 5
289
290 #define SHN_CMD_0 0
291 #define SHN_SHININESS 1
292 #define SHN_STATE_SIZE 2
293
294 #define R100_QUERYOBJ_CMD_0 0
295 #define R100_QUERYOBJ_DATA_0 1
296 #define R100_QUERYOBJ_CMDSIZE 2
297
298 #define STP_CMD_0 0
299 #define STP_DATA_0 1
300 #define STP_CMD_1 2
301 #define STP_STATE_SIZE 35
302
303 struct r100_hw_state {
304 /* Hardware state, stored as cmdbuf commands:
305 * -- Need to doublebuffer for
306 * - eliding noop statechange loops? (except line stipple count)
307 */
308 struct radeon_state_atom ctx;
309 struct radeon_state_atom set;
310 struct radeon_state_atom lin;
311 struct radeon_state_atom msk;
312 struct radeon_state_atom vpt;
313 struct radeon_state_atom tcl;
314 struct radeon_state_atom msc;
315 struct radeon_state_atom tex[3];
316 struct radeon_state_atom cube[3];
317 struct radeon_state_atom zbs;
318 struct radeon_state_atom mtl;
319 struct radeon_state_atom mat[6];
320 struct radeon_state_atom lit[8]; /* includes vec, scl commands */
321 struct radeon_state_atom ucp[6];
322 struct radeon_state_atom eye; /* eye pos */
323 struct radeon_state_atom grd; /* guard band clipping */
324 struct radeon_state_atom fog;
325 struct radeon_state_atom glt;
326 struct radeon_state_atom txr[3]; /* for NPOT */
327 struct radeon_state_atom stp;
328 };
329
330 struct radeon_stipple_state {
331 GLuint mask[32];
332 };
333
334 struct r100_state {
335 struct radeon_stipple_state stipple;
336 struct radeon_texture_state texture;
337 };
338
339 #define RADEON_CMD_BUF_SZ (8*1024)
340 #define R200_ELT_BUF_SZ (8*1024)
341 /* radeon_tcl.c
342 */
343 struct r100_tcl_info {
344 GLuint vertex_format;
345 GLuint hw_primitive;
346
347 /* Temporary for cases where incoming vertex data is incompatible
348 * with maos code.
349 */
350 GLvector4f ObjClean;
351
352 GLuint *Elts;
353
354 int elt_cmd_offset;
355 int elt_cmd_start;
356 int elt_used;
357 };
358
359 /* radeon_swtcl.c
360 */
361 struct r100_swtcl_info {
362 GLuint vertex_format;
363
364 GLubyte *verts;
365
366 /* Fallback rasterization functions
367 */
368 radeon_point_func draw_point;
369 radeon_line_func draw_line;
370 radeon_tri_func draw_tri;
371
372 /**
373 * Offset of the 4UB color data within a hardware (swtcl) vertex.
374 */
375 GLuint coloroffset;
376
377 /**
378 * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
379 */
380 GLuint specoffset;
381
382 GLboolean needproj;
383 };
384
385
386
387 /* A maximum total of 20 elements per vertex: 3 floats for position, 3
388 * floats for normal, 4 floats for color, 4 bytes for secondary color,
389 * 3 floats for each texture unit (9 floats total).
390 *
391 * The position data is never actually stored here, so 3 elements could be
392 * trimmed out of the buffer. This number is only valid for vtxfmt!
393 */
394 #define RADEON_MAX_VERTEX_SIZE 20
395
396 struct r100_context {
397 struct radeon_context radeon;
398
399 /* Driver and hardware state management
400 */
401 struct r100_hw_state hw;
402 struct r100_state state;
403
404 /* Vertex buffers
405 */
406 struct radeon_ioctl ioctl;
407 struct radeon_store store;
408
409 /* TCL stuff
410 */
411 GLmatrix TexGenMatrix[RADEON_MAX_TEXTURE_UNITS];
412 GLboolean recheck_texgen[RADEON_MAX_TEXTURE_UNITS];
413 GLboolean TexGenNeedNormals[RADEON_MAX_TEXTURE_UNITS];
414 GLuint TexGenEnabled;
415 GLuint NeedTexMatrix;
416 GLuint TexMatColSwap;
417 GLmatrix tmpmat[RADEON_MAX_TEXTURE_UNITS];
418
419 /* radeon_tcl.c
420 */
421 struct r100_tcl_info tcl;
422
423 /* radeon_swtcl.c
424 */
425 struct r100_swtcl_info swtcl;
426
427 GLboolean using_hyperz;
428
429 /* Performance counters
430 */
431 GLuint boxes; /* Draw performance boxes */
432 GLuint hardwareWentIdle;
433 GLuint c_clears;
434 GLuint c_drawWaits;
435 GLuint c_textureSwaps;
436 GLuint c_textureBytes;
437 GLuint c_vertexBuffers;
438
439 };
440
441
442 static inline r100ContextPtr
443 R100_CONTEXT(struct gl_context *ctx)
444 {
445 return (r100ContextPtr) ctx;
446 }
447
448
449
450 #define RADEON_OLD_PACKETS 1
451
452 extern GLboolean r100CreateContext( gl_api api,
453 const struct gl_config *glVisual,
454 __DRIcontext *driContextPriv,
455 const struct __DriverContextConfig *
456 ctx_config,
457 unsigned *error,
458 void *sharedContextPrivate);
459
460
461 #endif /* __RADEON_CONTEXT_H__ */