src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c

   1 /*
   2  * Copyright (C) 2009 Maciej Cencora.
   3  * Copyright (C) 2008 Nicolai Haehnle.
   4  *
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining
   8  * a copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sublicense, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial
  17  * portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  20  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  22  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  23  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  24  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  25  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  */
  28
  29 #include "radeon_mipmap_tree.h"
  30
  31 #include <errno.h>
  32 #include <unistd.h>
  33
  34 #include "main/simple_list.h"
  35 #include "main/texcompress.h"
  36 #include "main/teximage.h"
  37 #include "main/texobj.h"
  38 #include "radeon_texture.h"
  39
  40 static GLuint radeon_compressed_texture_size(GLcontext *ctx,
  41                 GLsizei width, GLsizei height, GLsizei depth,
  42                 gl_format mesaFormat)
  43 {
  44         GLuint size = _mesa_format_image_size(mesaFormat, width, height, depth);
  45
  46         if (mesaFormat == MESA_FORMAT_RGB_DXT1 ||
  47             mesaFormat == MESA_FORMAT_RGBA_DXT1) {
  48                 if (width + 3 < 8)      /* width one block */
  49                         size = size * 4;
  50                 else if (width + 3 < 16)
  51                         size = size * 2;
  52         } else {
  53                 /* DXT3/5, 16 bytes per block */
  54           //            WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n");
  55                 if (width + 3 < 8)
  56                         size = size * 2;
  57         }
  58
  59         return size;
  60 }
  61
  62 /**
  63  * Compute sizes and fill in offset and blit information for the given
  64  * image (determined by \p face and \p level).
  65  *
  66  * \param curOffset points to the offset at which the image is to be stored
  67  * and is updated by this function according to the size of the image.
  68  */
  69 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt,
  70         GLuint face, GLuint level, GLuint* curOffset)
  71 {
  72         radeon_mipmap_level *lvl = &mt->levels[level];
  73         uint32_t row_align;
  74
  75         /* Find image size in bytes */
  76         if (_mesa_is_format_compressed(mt->mesaFormat)) {
  77                 /* TODO: Is this correct? Need test cases for compressed textures! */
  78                 row_align = rmesa->texture_compressed_row_align - 1;
  79                 lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
  80                 lvl->size = radeon_compressed_texture_size(rmesa->glCtx, lvl->width, lvl->height, lvl->depth, mt->mesaFormat);
  81         } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
  82                 row_align = rmesa->texture_rect_row_align - 1;
  83                 lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
  84                 lvl->size = lvl->rowstride * lvl->height;
  85         } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) {
  86                 /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned,
  87                  * though the actual offset may be different (if texture is less than
  88                  * 32 bytes width) to the untiled case */
  89                 lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31;
  90                 lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth;
  91         } else {
  92                 row_align = rmesa->texture_row_align - 1;
  93                 lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
  94                 lvl->size = lvl->rowstride * lvl->height * lvl->depth;
  95         }
  96         assert(lvl->size > 0);
  97
  98         /* All images are aligned to a 32-byte offset */
  99         *curOffset = (*curOffset + 0x1f) & ~0x1f;
 100         lvl->faces[face].offset = *curOffset;
 101         *curOffset += lvl->size;
 102
 103         if (RADEON_DEBUG & RADEON_TEXTURE)
 104           fprintf(stderr,
 105                   "level %d, face %d: rs:%d %dx%d at %d\n",
 106                   level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
 107 }
 108
 109 static GLuint minify(GLuint size, GLuint levels)
 110 {
 111         size = size >> levels;
 112         if (size < 1)
 113                 size = 1;
 114         return size;
 115 }
 116
 117
 118 static void calculate_miptree_layout_r100(radeonContextPtr rmesa, radeon_mipmap_tree *mt)
 119 {
 120         GLuint curOffset;
 121         GLuint i;
 122         GLuint face;
 123
 124         assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
 125
 126         curOffset = 0;
 127         for(face = 0; face < mt->faces; face++) {
 128
 129                 for(i = 0; i < mt->numLevels; i++) {
 130                         mt->levels[i].width = minify(mt->width0, i);
 131                         mt->levels[i].height = minify(mt->height0, i);
 132                         mt->levels[i].depth = minify(mt->depth0, i);
 133                         compute_tex_image_offset(rmesa, mt, face, i, &curOffset);
 134                 }
 135         }
 136
 137         /* Note the required size in memory */
 138         mt->totalsize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
 139 }
 140
 141 static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_tree *mt)
 142 {
 143         GLuint curOffset;
 144         GLuint i;
 145
 146         assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels);
 147
 148         curOffset = 0;
 149         for(i = 0; i < mt->numLevels; i++) {
 150                 GLuint face;
 151
 152                 mt->levels[i].width = minify(mt->width0, i);
 153                 mt->levels[i].height = minify(mt->height0, i);
 154                 mt->levels[i].depth = minify(mt->depth0, i);
 155
 156                 for(face = 0; face < mt->faces; face++)
 157                         compute_tex_image_offset(rmesa, mt, face, i, &curOffset);
 158         }
 159
 160         /* Note the required size in memory */
 161         mt->totalsize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK;
 162 }
 163
 164 /**
 165  * Create a new mipmap tree, calculate its layout and allocate memory.
 166  */
 167 static radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa,
 168                 GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels,
 169                 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits)
 170 {
 171         radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
 172
 173         mt->mesaFormat = mesaFormat;
 174         mt->refcount = 1;
 175         mt->target = target;
 176         mt->faces = (target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
 177         mt->baseLevel = baseLevel;
 178         mt->numLevels = numLevels;
 179         mt->width0 = width0;
 180         mt->height0 = height0;
 181         mt->depth0 = depth0;
 182         mt->tilebits = tilebits;
 183
 184         if (rmesa->radeonScreen->chip_family >= CHIP_FAMILY_R300)
 185                 calculate_miptree_layout_r300(rmesa, mt);
 186         else
 187                 calculate_miptree_layout_r100(rmesa, mt);
 188
 189         mt->bo = radeon_bo_open(rmesa->radeonScreen->bom,
 190                             0, mt->totalsize, 1024,
 191                             RADEON_GEM_DOMAIN_VRAM,
 192                             0);
 193
 194         return mt;
 195 }
 196
 197 void radeon_miptree_reference(radeon_mipmap_tree *mt, radeon_mipmap_tree **ptr)
 198 {
 199         assert(!*ptr);
 200
 201         mt->refcount++;
 202         assert(mt->refcount > 0);
 203
 204         *ptr = mt;
 205 }
 206
 207 void radeon_miptree_unreference(radeon_mipmap_tree **ptr)
 208 {
 209         radeon_mipmap_tree *mt = *ptr;
 210         if (!mt)
 211                 return;
 212
 213         assert(mt->refcount > 0);
 214
 215         mt->refcount--;
 216         if (!mt->refcount) {
 217                 radeon_bo_unref(mt->bo);
 218                 free(mt);
 219         }
 220
 221         *ptr = 0;
 222 }
 223
 224 /**
 225  * Calculate min and max LOD for the given texture object.
 226  * @param[in] tObj texture object whose LOD values to calculate
 227  * @param[out] pminLod minimal LOD
 228  * @param[out] pmaxLod maximal LOD
 229  */
 230 static void calculate_min_max_lod(struct gl_texture_object *tObj,
 231                                        unsigned *pminLod, unsigned *pmaxLod)
 232 {
 233         int minLod, maxLod;
 234         /* Yes, this looks overly complicated, but it's all needed.
 235         */
 236         switch (tObj->Target) {
 237         case GL_TEXTURE_1D:
 238         case GL_TEXTURE_2D:
 239         case GL_TEXTURE_3D:
 240         case GL_TEXTURE_CUBE_MAP:
 241                 if (tObj->MinFilter == GL_NEAREST || tObj->MinFilter == GL_LINEAR) {
 242                         /* GL_NEAREST and GL_LINEAR only care about GL_TEXTURE_BASE_LEVEL.
 243                         */
 244                         minLod = maxLod = tObj->BaseLevel;
 245                 } else {
 246                         minLod = tObj->BaseLevel + (GLint)(tObj->MinLod);
 247                         minLod = MAX2(minLod, tObj->BaseLevel);
 248                         minLod = MIN2(minLod, tObj->MaxLevel);
 249                         maxLod = tObj->BaseLevel + (GLint)(tObj->MaxLod + 0.5);
 250                         maxLod = MIN2(maxLod, tObj->MaxLevel);
 251                         maxLod = MIN2(maxLod, tObj->Image[0][minLod]->MaxLog2 + minLod);
 252                         maxLod = MAX2(maxLod, minLod); /* need at least one level */
 253                 }
 254                 break;
 255         case GL_TEXTURE_RECTANGLE_NV:
 256         case GL_TEXTURE_4D_SGIS:
 257                 minLod = maxLod = 0;
 258                 break;
 259         default:
 260                 return;
 261         }
 262
 263         /* save these values */
 264         *pminLod = minLod;
 265         *pmaxLod = maxLod;
 266 }
 267
 268 /**
 269  * Checks whether the given miptree can hold the given texture image at the
 270  * given face and level.
 271  */
 272 GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 273                 struct gl_texture_image *texImage, GLuint face, GLuint mtLevel)
 274 {
 275         radeon_mipmap_level *lvl;
 276
 277         if (face >= mt->faces || mtLevel > mt->numLevels)
 278                 return GL_FALSE;
 279
 280         if (texImage->TexFormat != mt->mesaFormat)
 281                 return GL_FALSE;
 282
 283         lvl = &mt->levels[mtLevel];
 284         if (lvl->width != texImage->Width ||
 285             lvl->height != texImage->Height ||
 286             lvl->depth != texImage->Depth)
 287                 return GL_FALSE;
 288
 289         return GL_TRUE;
 290 }
 291
 292 /**
 293  * Checks whether the given miptree has the right format to store the given texture object.
 294  */
 295 static GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj)
 296 {
 297         struct gl_texture_image *firstImage;
 298         unsigned numLevels;
 299         radeon_mipmap_level *mtBaseLevel;
 300
 301         if (texObj->BaseLevel < mt->baseLevel)
 302                 return GL_FALSE;
 303
 304         mtBaseLevel = &mt->levels[texObj->BaseLevel - mt->baseLevel];
 305         firstImage = texObj->Image[0][texObj->BaseLevel];
 306         numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, firstImage->MaxLog2 + 1);
 307
 308         if (RADEON_DEBUG & RADEON_TEXTURE) {
 309                 fprintf(stderr, "Checking if miptree %p matches texObj %p\n", mt, texObj);
 310                 fprintf(stderr, "target %d vs %d\n", mt->target, texObj->Target);
 311                 fprintf(stderr, "format %d vs %d\n", mt->mesaFormat, firstImage->TexFormat);
 312                 fprintf(stderr, "numLevels %d vs %d\n", mt->numLevels, numLevels);
 313                 fprintf(stderr, "width0 %d vs %d\n", mtBaseLevel->width, firstImage->Width);
 314                 fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height);
 315                 fprintf(stderr, "depth0 %d vs %d\n", mtBaseLevel->depth, firstImage->Depth);
 316                 if (mt->target == texObj->Target &&
 317                 mt->mesaFormat == firstImage->TexFormat &&
 318                 mt->numLevels >= numLevels &&
 319                 mtBaseLevel->width == firstImage->Width &&
 320                 mtBaseLevel->height == firstImage->Height &&
 321                 mtBaseLevel->depth == firstImage->Depth) {
 322                         fprintf(stderr, "MATCHED\n");
 323                 } else {
 324                         fprintf(stderr, "NOT MATCHED\n");
 325                 }
 326         }
 327
 328         return (mt->target == texObj->Target &&
 329                 mt->mesaFormat == firstImage->TexFormat &&
 330                 mt->numLevels >= numLevels &&
 331                 mtBaseLevel->width == firstImage->Width &&
 332                 mtBaseLevel->height == firstImage->Height &&
 333                 mtBaseLevel->depth == firstImage->Depth);
 334 }
 335
 336 /**
 337  * Try to allocate a mipmap tree for the given texture object.
 338  * @param[in] rmesa radeon context
 339  * @param[in] t radeon texture object
 340  */
 341 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t)
 342 {
 343         struct gl_texture_object *texObj = &t->base;
 344         struct gl_texture_image *texImg = texObj->Image[0][texObj->BaseLevel];
 345         GLuint numLevels;
 346
 347         assert(!t->mt);
 348
 349         if (!texImg)
 350                 return;
 351
 352         numLevels = MIN2(texObj->MaxLevel - texObj->BaseLevel + 1, texImg->MaxLog2 + 1);
 353
 354         t->mt = radeon_miptree_create(rmesa, t->base.Target,
 355                 texImg->TexFormat, texObj->BaseLevel,
 356                 numLevels, texImg->Width, texImg->Height,
 357                 texImg->Depth, t->tile_bits);
 358 }
 359
 360 /* Although we use the image_offset[] array to store relative offsets
 361  * to cube faces, Mesa doesn't know anything about this and expects
 362  * each cube face to be treated as a separate image.
 363  *
 364  * These functions present that view to mesa:
 365  */
 366 void
 367 radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
 368 {
 369         if (mt->target != GL_TEXTURE_3D || mt->faces == 1) {
 370                 offsets[0] = 0;
 371         } else {
 372                 int i;
 373                 for (i = 0; i < 6; i++) {
 374                         offsets[i] = mt->levels[level].faces[i].offset;
 375                 }
 376         }
 377 }
 378
 379 GLuint
 380 radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 381                             GLuint face, GLuint level)
 382 {
 383         if (mt->target == GL_TEXTURE_CUBE_MAP_ARB)
 384                 return (mt->levels[level].faces[face].offset);
 385         else
 386                 return mt->levels[level].faces[0].offset;
 387 }
 388
 389 /**
 390  * Convert radeon miptree texture level to GL texture level
 391  * @param[in] tObj texture object whom level is to be converted
 392  * @param[in] level radeon miptree texture level
 393  * @return GL texture level
 394  */
 395 unsigned radeon_miptree_level_to_gl_level(struct gl_texture_object *tObj, unsigned level)
 396 {
 397         return level + tObj->BaseLevel;
 398 }
 399
 400 /**
 401  * Convert GL texture level to radeon miptree texture level
 402  * @param[in] tObj texture object whom level is to be converted
 403  * @param[in] level GL texture level
 404  * @return radeon miptree texture level
 405  */
 406 unsigned radeon_gl_level_to_miptree_level(struct gl_texture_object *tObj, unsigned level)
 407 {
 408         return level - tObj->BaseLevel;
 409 }
 410
 411 /**
 412  * Ensure that the given image is stored in the given miptree from now on.
 413  */
 414 static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
 415                                                                          radeon_texture_image *image,
 416                                                                          int face, int mtLevel)
 417 {
 418         radeon_mipmap_level *dstlvl = &mt->levels[mtLevel];
 419         unsigned char *dest;
 420
 421         assert(image->mt != mt);
 422         assert(dstlvl->width == image->base.Width);
 423         assert(dstlvl->height == image->base.Height);
 424         assert(dstlvl->depth == image->base.Depth);
 425
 426         radeon_bo_map(mt->bo, GL_TRUE);
 427         dest = mt->bo->ptr + dstlvl->faces[face].offset;
 428
 429         if (image->mt) {
 430                 /* Format etc. should match, so we really just need a memcpy().
 431                  * In fact, that memcpy() could be done by the hardware in many
 432                  * cases, provided that we have a proper memory manager.
 433                  */
 434                 assert(mt->mesaFormat == image->base.TexFormat);
 435
 436                 radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
 437
 438                 assert(srclvl->size == dstlvl->size);
 439                 assert(srclvl->rowstride == dstlvl->rowstride);
 440
 441                 radeon_bo_map(image->mt->bo, GL_FALSE);
 442
 443                 memcpy(dest,
 444                         image->mt->bo->ptr + srclvl->faces[face].offset,
 445                         dstlvl->size);
 446                 radeon_bo_unmap(image->mt->bo);
 447
 448                 radeon_miptree_unreference(&image->mt);
 449         } else {
 450                 /* need to confirm this value is correct */
 451                 if (_mesa_is_format_compressed(image->base.TexFormat)) {
 452                         unsigned size = _mesa_format_image_size(image->base.TexFormat,
 453                                                                                                         image->base.Width,
 454                                                                                                         image->base.Height,
 455                                                                                                         image->base.Depth);
 456                         memcpy(dest, image->base.Data, size);
 457                 } else {
 458                         uint32_t srcrowstride;
 459                         uint32_t height;
 460
 461                         height = image->base.Height * image->base.Depth;
 462                         srcrowstride = image->base.Width * _mesa_get_format_bytes(image->base.TexFormat);
 463                         copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
 464                                         height, srcrowstride);
 465                 }
 466
 467                 _mesa_free_texmemory(image->base.Data);
 468                 image->base.Data = 0;
 469         }
 470
 471         radeon_bo_unmap(mt->bo);
 472
 473         radeon_miptree_reference(mt, &image->mt);
 474         image->mtface = face;
 475         image->mtlevel = mtLevel;
 476 }
 477
 478 /**
 479  * Filter matching miptrees, and select one with the most of data.
 480  * @param[in] texObj radeon texture object
 481  * @param[in] firstLevel first texture level to check
 482  * @param[in] lastLevel last texture level to check
 483  */
 484 static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
 485                                                                                                                  unsigned firstLevel,
 486                                                                                                                  unsigned lastLevel)
 487 {
 488         const unsigned numLevels = lastLevel - firstLevel;
 489         unsigned *mtSizes = calloc(numLevels, sizeof(unsigned));
 490         radeon_mipmap_tree **mts = calloc(numLevels, sizeof(radeon_mipmap_tree *));
 491         unsigned mtCount = 0;
 492         unsigned maxMtIndex = 0;
 493
 494         for (unsigned level = firstLevel; level <= lastLevel; ++level) {
 495                 radeon_texture_image *img = get_radeon_texture_image(texObj->base.Image[0][level]);
 496                 unsigned found = 0;
 497                 // TODO: why this hack??
 498                 if (!img)
 499                         break;
 500
 501                 if (!img->mt || !radeon_miptree_matches_texture(img->mt, &texObj->base))
 502                         continue;
 503
 504                 for (int i = 0; i < mtCount; ++i) {
 505                         if (mts[i] == img->mt) {
 506                                 found = 1;
 507                                 mtSizes[i] += img->mt->levels[img->mtlevel].size;
 508                                 break;
 509                         }
 510                 }
 511
 512                 if (!found) {
 513                         mtSizes[mtCount] += img->mt->levels[img->mtlevel].size;
 514                         mts[mtCount++] = img->mt;
 515                         mtCount++;
 516                 }
 517         }
 518
 519         if (mtCount == 0) {
 520                 return NULL;
 521         }
 522
 523         for (int i = 1; i < mtCount; ++i) {
 524                 if (mtSizes[i] > mtSizes[maxMtIndex]) {
 525                         maxMtIndex = i;
 526                 }
 527         }
 528
 529         return mts[maxMtIndex];
 530 }
 531
 532 /**
 533  * Validate texture mipmap tree.
 534  * If individual images are stored in different mipmap trees
 535  * use the mipmap tree that has the most of the correct data.
 536  */
 537 int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
 538 {
 539         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 540         radeonTexObj *t = radeon_tex_obj(texObj);
 541
 542         if (t->validated || t->image_override) {
 543                 return GL_TRUE;
 544         }
 545
 546         if (texObj->Image[0][texObj->BaseLevel]->Border > 0)
 547                 return GL_FALSE;
 548
 549         _mesa_test_texobj_completeness(rmesa->glCtx, texObj);
 550         if (!texObj->_Complete) {
 551                 return GL_FALSE;
 552         }
 553
 554         calculate_min_max_lod(&t->base, &t->minLod, &t->maxLod);
 555
 556         if (RADEON_DEBUG & RADEON_TEXTURE)
 557                 fprintf(stderr, "%s: Validating texture %p now, minLod = %d, maxLod = %d\n",
 558                                 __FUNCTION__, texObj ,t->minLod, t->maxLod);
 559
 560         radeon_mipmap_tree *dst_miptree;
 561         dst_miptree = get_biggest_matching_miptree(t, t->minLod, t->maxLod);
 562
 563         if (!dst_miptree) {
 564                 radeon_miptree_unreference(&t->mt);
 565                 radeon_try_alloc_miptree(rmesa, t);
 566                 dst_miptree = t->mt;
 567         }
 568
 569         const unsigned faces = texObj->Target == GL_TEXTURE_CUBE_MAP ? 6 : 1;
 570         unsigned face, level;
 571         radeon_texture_image *img;
 572         /* Validate only the levels that will actually be used during rendering */
 573         for (face = 0; face < faces; ++face) {
 574                 for (level = t->minLod; level <= t->maxLod; ++level) {
 575                         img = get_radeon_texture_image(texObj->Image[face][level]);
 576
 577                         if (RADEON_DEBUG & RADEON_TEXTURE) {
 578                                 fprintf(stderr, "Checking image level %d, face %d, mt %p ... ", level, face, img->mt);
 579                         }
 580
 581                         if (img->mt != dst_miptree) {
 582                                 if (RADEON_DEBUG & RADEON_TEXTURE) {
 583                                         fprintf(stderr, "MIGRATING\n");
 584                                 }
 585                                 migrate_image_to_miptree(dst_miptree, img, face, radeon_gl_level_to_miptree_level(texObj, level));
 586                         } else if (RADEON_DEBUG & RADEON_TEXTURE) {
 587                                 fprintf(stderr, "OK\n");
 588                         }
 589                 }
 590         }
 591
 592         t->validated = GL_TRUE;
 593
 594         return GL_TRUE;
 595 }
 596
 597 uint32_t get_base_teximage_offset(radeonTexObj *texObj)
 598 {
 599         if (!texObj->mt) {
 600                 return 0;
 601         } else {
 602                 return radeon_miptree_image_offset(texObj->mt, 0, texObj->minLod);
 603         }
 604 }