src/mesa/drivers/dri/radeon/radeon_screen.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file radeon_screen.c
  32  * Screen initialization functions for the Radeon driver.
  33  *
  34  * \author Kevin E. Martin <martin@valinux.com>
  35  * \author  Gareth Hughes <gareth@valinux.com>
  36  */
  37
  38 #include <errno.h>
  39 #include "main/glheader.h"
  40 #include "main/imports.h"
  41 #include "main/mtypes.h"
  42 #include "main/framebuffer.h"
  43 #include "main/renderbuffer.h"
  44 #include "main/fbobject.h"
  45 #include "swrast/s_renderbuffer.h"
  46
  47 #include "radeon_chipset.h"
  48 #include "radeon_screen.h"
  49 #include "radeon_common.h"
  50 #include "radeon_common_context.h"
  51 #if defined(RADEON_R100)
  52 #include "radeon_context.h"
  53 #include "radeon_tex.h"
  54 #elif defined(RADEON_R200)
  55 #include "r200_context.h"
  56 #include "r200_tex.h"
  57 #endif
  58
  59 #include "utils.h"
  60
  61 #include "GL/internal/dri_interface.h"
  62
  63 /* Radeon configuration
  64  */
  65 #include "xmlpool.h"
  66
  67 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
  68 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
  69         DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
  70         DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
  71 DRI_CONF_OPT_END
  72
  73 #if defined(RADEON_R100)        /* R100 */
  74 static const __DRIconfigOptionsExtension radeon_config_options = {
  75    .base = { __DRI_CONFIG_OPTIONS, 1 },
  76    .xml =
  77 DRI_CONF_BEGIN
  78     DRI_CONF_SECTION_PERFORMANCE
  79         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
  80         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
  81         DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
  82         DRI_CONF_HYPERZ("false")
  83         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
  84     DRI_CONF_SECTION_END
  85     DRI_CONF_SECTION_QUALITY
  86         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
  87         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
  88         DRI_CONF_NO_NEG_LOD_BIAS("false")
  89         DRI_CONF_FORCE_S3TC_ENABLE("false")
  90         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
  91         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
  92         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
  93     DRI_CONF_SECTION_END
  94     DRI_CONF_SECTION_DEBUG
  95         DRI_CONF_NO_RAST("false")
  96     DRI_CONF_SECTION_END
  97 DRI_CONF_END
  98 };
  99
 100 #elif defined(RADEON_R200)
 101 static const __DRIconfigOptionsExtension radeon_config_options = {
 102    .base = { __DRI_CONFIG_OPTIONS, 1 },
 103    .xml =
 104 DRI_CONF_BEGIN
 105     DRI_CONF_SECTION_PERFORMANCE
 106         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
 107         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
 108         DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
 109         DRI_CONF_HYPERZ("false")
 110         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
 111     DRI_CONF_SECTION_END
 112     DRI_CONF_SECTION_QUALITY
 113         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
 114         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
 115         DRI_CONF_NO_NEG_LOD_BIAS("false")
 116         DRI_CONF_FORCE_S3TC_ENABLE("false")
 117         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 118         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
 119         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
 120         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
 121     DRI_CONF_SECTION_END
 122     DRI_CONF_SECTION_DEBUG
 123         DRI_CONF_NO_RAST("false")
 124     DRI_CONF_SECTION_END
 125 DRI_CONF_END
 126 };
 127 #endif
 128
 129 static int
 130 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
 131 {
 132   struct drm_radeon_info info = { 0 };
 133
 134   info.value = (uint64_t)(uintptr_t)value;
 135   switch (param) {
 136   case RADEON_PARAM_DEVICE_ID:
 137     info.request = RADEON_INFO_DEVICE_ID;
 138     break;
 139   case RADEON_PARAM_NUM_GB_PIPES:
 140     info.request = RADEON_INFO_NUM_GB_PIPES;
 141     break;
 142   case RADEON_PARAM_NUM_Z_PIPES:
 143     info.request = RADEON_INFO_NUM_Z_PIPES;
 144     break;
 145   case RADEON_INFO_TILING_CONFIG:
 146     info.request = RADEON_INFO_TILING_CONFIG;
 147     break;
 148   default:
 149     return -EINVAL;
 150   }
 151   return drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
 152 }
 153
 154 #if defined(RADEON_R100)
 155 static const __DRItexBufferExtension radeonTexBufferExtension = {
 156    .base = { __DRI_TEX_BUFFER, 3 },
 157
 158    .setTexBuffer        = radeonSetTexBuffer,
 159    .setTexBuffer2       = radeonSetTexBuffer2,
 160    .releaseTexBuffer    = NULL,
 161 };
 162 #elif defined(RADEON_R200)
 163 static const __DRItexBufferExtension r200TexBufferExtension = {
 164    .base = { __DRI_TEX_BUFFER, 3 },
 165
 166    .setTexBuffer        = r200SetTexBuffer,
 167    .setTexBuffer2       = r200SetTexBuffer2,
 168    .releaseTexBuffer    = NULL,
 169 };
 170 #endif
 171
 172 static void
 173 radeonDRI2Flush(__DRIdrawable *drawable)
 174 {
 175     radeonContextPtr rmesa;
 176
 177     rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
 178     radeonFlush(&rmesa->glCtx);
 179 }
 180
 181 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
 182    .base = { __DRI2_FLUSH, 3 },
 183
 184    .flush               = radeonDRI2Flush,
 185    .invalidate          = dri2InvalidateDrawable,
 186 };
 187
 188 static __DRIimage *
 189 radeon_create_image_from_name(__DRIscreen *screen,
 190                               int width, int height, int format,
 191                               int name, int pitch, void *loaderPrivate)
 192 {
 193    __DRIimage *image;
 194    radeonScreenPtr radeonScreen = screen->driverPrivate;
 195
 196    if (name == 0)
 197       return NULL;
 198
 199    image = calloc(1, sizeof *image);
 200    if (image == NULL)
 201       return NULL;
 202
 203    switch (format) {
 204    case __DRI_IMAGE_FORMAT_RGB565:
 205       image->format = MESA_FORMAT_B5G6R5_UNORM;
 206       image->internal_format = GL_RGB;
 207       image->data_type = GL_UNSIGNED_BYTE;
 208       break;
 209    case __DRI_IMAGE_FORMAT_XRGB8888:
 210       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 211       image->internal_format = GL_RGB;
 212       image->data_type = GL_UNSIGNED_BYTE;
 213       break;
 214    case __DRI_IMAGE_FORMAT_ARGB8888:
 215       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 216       image->internal_format = GL_RGBA;
 217       image->data_type = GL_UNSIGNED_BYTE;
 218       break;
 219    default:
 220       free(image);
 221       return NULL;
 222    }
 223
 224    image->data = loaderPrivate;
 225    image->cpp = _mesa_get_format_bytes(image->format);
 226    image->width = width;
 227    image->pitch = pitch;
 228    image->height = height;
 229
 230    image->bo = radeon_bo_open(radeonScreen->bom,
 231                               (uint32_t)name,
 232                               image->pitch * image->height * image->cpp,
 233                               0,
 234                               RADEON_GEM_DOMAIN_VRAM,
 235                               0);
 236
 237    if (image->bo == NULL) {
 238       free(image);
 239       return NULL;
 240    }
 241
 242    return image;
 243 }
 244
 245 static __DRIimage *
 246 radeon_create_image_from_renderbuffer(__DRIcontext *context,
 247                                       int renderbuffer, void *loaderPrivate)
 248 {
 249    __DRIimage *image;
 250    radeonContextPtr radeon = context->driverPrivate;
 251    struct gl_renderbuffer *rb;
 252    struct radeon_renderbuffer *rrb;
 253
 254    rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
 255    if (!rb) {
 256       _mesa_error(&radeon->glCtx,
 257                   GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 258       return NULL;
 259    }
 260
 261    rrb = radeon_renderbuffer(rb);
 262    image = calloc(1, sizeof *image);
 263    if (image == NULL)
 264       return NULL;
 265
 266    image->internal_format = rb->InternalFormat;
 267    image->format = rb->Format;
 268    image->cpp = rrb->cpp;
 269    image->data_type = GL_UNSIGNED_BYTE;
 270    image->data = loaderPrivate;
 271    radeon_bo_ref(rrb->bo);
 272    image->bo = rrb->bo;
 273
 274    image->width = rb->Width;
 275    image->height = rb->Height;
 276    image->pitch = rrb->pitch / image->cpp;
 277
 278    return image;
 279 }
 280
 281 static void
 282 radeon_destroy_image(__DRIimage *image)
 283 {
 284    radeon_bo_unref(image->bo);
 285    free(image);
 286 }
 287
 288 static __DRIimage *
 289 radeon_create_image(__DRIscreen *screen,
 290                     int width, int height, int format,
 291                     unsigned int use,
 292                     void *loaderPrivate)
 293 {
 294    __DRIimage *image;
 295    radeonScreenPtr radeonScreen = screen->driverPrivate;
 296
 297    image = calloc(1, sizeof *image);
 298    if (image == NULL)
 299       return NULL;
 300
 301    image->dri_format = format;
 302
 303    switch (format) {
 304    case __DRI_IMAGE_FORMAT_RGB565:
 305       image->format = MESA_FORMAT_B5G6R5_UNORM;
 306       image->internal_format = GL_RGB;
 307       image->data_type = GL_UNSIGNED_BYTE;
 308       break;
 309    case __DRI_IMAGE_FORMAT_XRGB8888:
 310       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 311       image->internal_format = GL_RGB;
 312       image->data_type = GL_UNSIGNED_BYTE;
 313       break;
 314    case __DRI_IMAGE_FORMAT_ARGB8888:
 315       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 316       image->internal_format = GL_RGBA;
 317       image->data_type = GL_UNSIGNED_BYTE;
 318       break;
 319    default:
 320       free(image);
 321       return NULL;
 322    }
 323
 324    image->data = loaderPrivate;
 325    image->cpp = _mesa_get_format_bytes(image->format);
 326    image->width = width;
 327    image->height = height;
 328    image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
 329
 330    image->bo = radeon_bo_open(radeonScreen->bom,
 331                               0,
 332                               image->pitch * image->height * image->cpp,
 333                               0,
 334                               RADEON_GEM_DOMAIN_VRAM,
 335                               0);
 336
 337    if (image->bo == NULL) {
 338       free(image);
 339       return NULL;
 340    }
 341
 342    return image;
 343 }
 344
 345 static GLboolean
 346 radeon_query_image(__DRIimage *image, int attrib, int *value)
 347 {
 348    switch (attrib) {
 349    case __DRI_IMAGE_ATTRIB_STRIDE:
 350       *value = image->pitch * image->cpp;
 351       return GL_TRUE;
 352    case __DRI_IMAGE_ATTRIB_HANDLE:
 353       *value = image->bo->handle;
 354       return GL_TRUE;
 355    case __DRI_IMAGE_ATTRIB_NAME:
 356       radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
 357       return GL_TRUE;
 358    default:
 359       return GL_FALSE;
 360    }
 361 }
 362
 363 static const __DRIimageExtension radeonImageExtension = {
 364    .base = { __DRI_IMAGE, 1 },
 365
 366    .createImageFromName         = radeon_create_image_from_name,
 367    .createImageFromRenderbuffer = radeon_create_image_from_renderbuffer,
 368    .destroyImage                = radeon_destroy_image,
 369    .createImage                 = radeon_create_image,
 370    .queryImage                  = radeon_query_image
 371 };
 372
 373 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
 374 {
 375    screen->device_id = device_id;
 376    screen->chip_flags = 0;
 377    switch ( device_id ) {
 378 #if defined(RADEON_R100)
 379    case PCI_CHIP_RN50_515E:
 380    case PCI_CHIP_RN50_5969:
 381         return -1;
 382
 383    case PCI_CHIP_RADEON_LY:
 384    case PCI_CHIP_RADEON_LZ:
 385    case PCI_CHIP_RADEON_QY:
 386    case PCI_CHIP_RADEON_QZ:
 387       screen->chip_family = CHIP_FAMILY_RV100;
 388       break;
 389
 390    case PCI_CHIP_RS100_4136:
 391    case PCI_CHIP_RS100_4336:
 392       screen->chip_family = CHIP_FAMILY_RS100;
 393       break;
 394
 395    case PCI_CHIP_RS200_4137:
 396    case PCI_CHIP_RS200_4337:
 397    case PCI_CHIP_RS250_4237:
 398    case PCI_CHIP_RS250_4437:
 399       screen->chip_family = CHIP_FAMILY_RS200;
 400       break;
 401
 402    case PCI_CHIP_RADEON_QD:
 403    case PCI_CHIP_RADEON_QE:
 404    case PCI_CHIP_RADEON_QF:
 405    case PCI_CHIP_RADEON_QG:
 406       /* all original radeons (7200) presumably have a stencil op bug */
 407       screen->chip_family = CHIP_FAMILY_R100;
 408       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 409       break;
 410
 411    case PCI_CHIP_RV200_QW:
 412    case PCI_CHIP_RV200_QX:
 413    case PCI_CHIP_RADEON_LW:
 414    case PCI_CHIP_RADEON_LX:
 415       screen->chip_family = CHIP_FAMILY_RV200;
 416       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 417       break;
 418
 419 #elif defined(RADEON_R200)
 420    case PCI_CHIP_R200_BB:
 421    case PCI_CHIP_R200_QH:
 422    case PCI_CHIP_R200_QL:
 423    case PCI_CHIP_R200_QM:
 424       screen->chip_family = CHIP_FAMILY_R200;
 425       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 426       break;
 427
 428    case PCI_CHIP_RV250_If:
 429    case PCI_CHIP_RV250_Ig:
 430    case PCI_CHIP_RV250_Ld:
 431    case PCI_CHIP_RV250_Lf:
 432    case PCI_CHIP_RV250_Lg:
 433       screen->chip_family = CHIP_FAMILY_RV250;
 434       screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 435       break;
 436
 437    case PCI_CHIP_RV280_4C6E:
 438    case PCI_CHIP_RV280_5960:
 439    case PCI_CHIP_RV280_5961:
 440    case PCI_CHIP_RV280_5962:
 441    case PCI_CHIP_RV280_5964:
 442    case PCI_CHIP_RV280_5965:
 443    case PCI_CHIP_RV280_5C61:
 444    case PCI_CHIP_RV280_5C63:
 445       screen->chip_family = CHIP_FAMILY_RV280;
 446       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 447       break;
 448
 449    case PCI_CHIP_RS300_5834:
 450    case PCI_CHIP_RS300_5835:
 451    case PCI_CHIP_RS350_7834:
 452    case PCI_CHIP_RS350_7835:
 453       screen->chip_family = CHIP_FAMILY_RS300;
 454       screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 455       break;
 456 #endif
 457
 458    default:
 459       fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
 460               device_id);
 461       return -1;
 462    }
 463
 464    return 0;
 465 }
 466
 467 static int
 468 radeonQueryRendererInteger(__DRIscreen *psp, int param,
 469                                unsigned int *value)
 470 {
 471    radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate;
 472
 473    switch (param) {
 474    case __DRI2_RENDERER_VENDOR_ID:
 475       value[0] = 0x1002;
 476       return 0;
 477    case __DRI2_RENDERER_DEVICE_ID:
 478       value[0] = screen->device_id;
 479       return 0;
 480    case __DRI2_RENDERER_ACCELERATED:
 481       value[0] = 1;
 482       return 0;
 483    case __DRI2_RENDERER_VIDEO_MEMORY: {
 484       struct drm_radeon_gem_info gem_info;
 485       int retval;
 486       memset(&gem_info, 0, sizeof(gem_info));
 487
 488       /* Get GEM info. */
 489       retval = drmCommandWriteRead(psp->fd, DRM_RADEON_GEM_INFO, &gem_info,
 490                                    sizeof(gem_info));
 491
 492       if (retval) {
 493          fprintf(stderr, "radeon: Failed to get MM info, error number %d\n",
 494                 retval);
 495          return -1;
 496
 497       }
 498       /* XXX: Do we want to return vram_size or vram_visible ? */
 499       value[0] = gem_info.vram_size >> 20;
 500       return 0;
 501    }
 502    case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE:
 503       value[0] = 0;
 504       return 0;
 505    default:
 506       return driQueryRendererIntegerCommon(psp, param, value);
 507    }
 508 }
 509
 510 static int
 511 radeonQueryRendererString(__DRIscreen *psp, int param, const char **value)
 512 {
 513    radeonScreenPtr screen = (radeonScreenPtr)psp->driverPrivate;
 514
 515    switch (param) {
 516    case __DRI2_RENDERER_VENDOR_ID:
 517       value[0] = radeonVendorString;
 518       return 0;
 519    case __DRI2_RENDERER_DEVICE_ID:
 520       value[0] = radeonGetRendererString(screen);
 521       return 0;
 522    default:
 523       return -1;
 524    }
 525 }
 526
 527 static const __DRI2rendererQueryExtension radeonRendererQueryExtension = {
 528    .base = { __DRI2_RENDERER_QUERY, 1 },
 529
 530    .queryInteger        = radeonQueryRendererInteger,
 531    .queryString         = radeonQueryRendererString
 532 };
 533
 534
 535 static const __DRIextension *radeon_screen_extensions[] = {
 536     &dri2ConfigQueryExtension.base,
 537 #if defined(RADEON_R100)
 538     &radeonTexBufferExtension.base,
 539 #elif defined(RADEON_R200)
 540     &r200TexBufferExtension.base,
 541 #endif
 542     &radeonFlushExtension.base,
 543     &radeonImageExtension.base,
 544     &radeonRendererQueryExtension.base,
 545     &dri2NoErrorExtension.base,
 546     NULL
 547 };
 548
 549 static radeonScreenPtr
 550 radeonCreateScreen2(__DRIscreen *sPriv)
 551 {
 552    radeonScreenPtr screen;
 553    int ret;
 554    uint32_t device_id = 0;
 555
 556    /* Allocate the private area */
 557    screen = calloc(1, sizeof(*screen));
 558    if ( !screen ) {
 559       fprintf(stderr, "%s: Could not allocate memory for screen structure", __func__);
 560       fprintf(stderr, "leaving here\n");
 561       return NULL;
 562    }
 563
 564    radeon_init_debug();
 565
 566    /* parse information in __driConfigOptions */
 567    driParseOptionInfo (&screen->optionCache, radeon_config_options.xml);
 568
 569    screen->chip_flags = 0;
 570
 571    screen->irq = 1;
 572
 573    ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
 574    if (ret) {
 575      free( screen );
 576      fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
 577      return NULL;
 578    }
 579
 580    ret = radeon_set_screen_flags(screen, device_id);
 581    if (ret == -1) {
 582      free(screen);
 583      return NULL;
 584    }
 585
 586    if (getenv("RADEON_NO_TCL"))
 587            screen->chip_flags &= ~RADEON_CHIPSET_TCL;
 588
 589    sPriv->extensions = radeon_screen_extensions;
 590
 591    screen->driScreen = sPriv;
 592    screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
 593    if (screen->bom == NULL) {
 594        free(screen);
 595        return NULL;
 596    }
 597    return screen;
 598 }
 599
 600 /* Destroy the device specific screen private data struct.
 601  */
 602 static void
 603 radeonDestroyScreen( __DRIscreen *sPriv )
 604 {
 605     radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
 606
 607     if (!screen)
 608         return;
 609
 610 #ifdef RADEON_BO_TRACK
 611     radeon_tracker_print(&screen->bom->tracker, stderr);
 612 #endif
 613     radeon_bo_manager_gem_dtor(screen->bom);
 614
 615     /* free all option information */
 616     driDestroyOptionInfo (&screen->optionCache);
 617
 618     free( screen );
 619     sPriv->driverPrivate = NULL;
 620 }
 621
 622
 623 /* Initialize the driver specific screen private data.
 624  */
 625 static GLboolean
 626 radeonInitDriver( __DRIscreen *sPriv )
 627 {
 628     sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
 629     if ( !sPriv->driverPrivate ) {
 630         radeonDestroyScreen( sPriv );
 631         return GL_FALSE;
 632     }
 633
 634     return GL_TRUE;
 635 }
 636
 637
 638
 639 /**
 640  * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
 641  *
 642  * \todo This function (and its interface) will need to be updated to support
 643  * pbuffers.
 644  */
 645 static GLboolean
 646 radeonCreateBuffer( __DRIscreen *driScrnPriv,
 647                     __DRIdrawable *driDrawPriv,
 648                     const struct gl_config *mesaVis,
 649                     GLboolean isPixmap )
 650 {
 651     radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
 652
 653     const GLboolean swDepth = GL_FALSE;
 654     const GLboolean swAlpha = GL_FALSE;
 655     const GLboolean swAccum = mesaVis->accumRedBits > 0;
 656     const GLboolean swStencil = mesaVis->stencilBits > 0 &&
 657         mesaVis->depthBits != 24;
 658     mesa_format rgbFormat;
 659     struct radeon_framebuffer *rfb;
 660
 661     if (isPixmap)
 662       return GL_FALSE; /* not implemented */
 663
 664     rfb = CALLOC_STRUCT(radeon_framebuffer);
 665     if (!rfb)
 666       return GL_FALSE;
 667
 668     _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 669
 670     if (mesaVis->redBits == 5)
 671         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM;
 672     else if (mesaVis->alphaBits == 0)
 673         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM;
 674     else
 675         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8A8_UNORM : MESA_FORMAT_A8R8G8B8_UNORM;
 676
 677     /* front color renderbuffer */
 678     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 679     _mesa_attach_and_own_rb(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
 680     rfb->color_rb[0]->has_surface = 1;
 681
 682     /* back color renderbuffer */
 683     if (mesaVis->doubleBufferMode) {
 684       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 685         _mesa_attach_and_own_rb(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
 686         rfb->color_rb[1]->has_surface = 1;
 687     }
 688
 689     if (mesaVis->depthBits == 24) {
 690       if (mesaVis->stencilBits == 8) {
 691         struct radeon_renderbuffer *depthStencilRb =
 692            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
 693         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 694         _mesa_attach_and_reference_rb(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 695         depthStencilRb->has_surface = screen->depthHasSurface;
 696       } else {
 697         /* depth renderbuffer */
 698         struct radeon_renderbuffer *depth =
 699            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
 700         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 701         depth->has_surface = screen->depthHasSurface;
 702       }
 703     } else if (mesaVis->depthBits == 16) {
 704         /* just 16-bit depth buffer, no hw stencil */
 705         struct radeon_renderbuffer *depth =
 706            radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv);
 707         _mesa_attach_and_own_rb(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 708         depth->has_surface = screen->depthHasSurface;
 709     }
 710
 711     _swrast_add_soft_renderbuffers(&rfb->base,
 712             GL_FALSE, /* color */
 713             swDepth,
 714             swStencil,
 715             swAccum,
 716             swAlpha,
 717             GL_FALSE /* aux */);
 718     driDrawPriv->driverPrivate = (void *) rfb;
 719
 720     return (driDrawPriv->driverPrivate != NULL);
 721 }
 722
 723
 724 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
 725 {
 726         struct radeon_renderbuffer *rb;
 727
 728         rb = rfb->color_rb[0];
 729         if (rb && rb->bo) {
 730                 radeon_bo_unref(rb->bo);
 731                 rb->bo = NULL;
 732         }
 733         rb = rfb->color_rb[1];
 734         if (rb && rb->bo) {
 735                 radeon_bo_unref(rb->bo);
 736                 rb->bo = NULL;
 737         }
 738         rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
 739         if (rb && rb->bo) {
 740                 radeon_bo_unref(rb->bo);
 741                 rb->bo = NULL;
 742         }
 743 }
 744
 745 void
 746 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
 747 {
 748     struct radeon_framebuffer *rfb;
 749     if (!driDrawPriv)
 750         return;
 751
 752     rfb = (void*)driDrawPriv->driverPrivate;
 753     if (!rfb)
 754         return;
 755     radeon_cleanup_renderbuffers(rfb);
 756     _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 757 }
 758
 759 /**
 760  * This is the driver specific part of the createNewScreen entry point.
 761  * Called when using DRI2.
 762  *
 763  * \return the struct gl_config supported by this driver
 764  */
 765 static const
 766 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 767 {
 768    static const mesa_format formats[3] = {
 769       MESA_FORMAT_B5G6R5_UNORM,
 770       MESA_FORMAT_B8G8R8X8_UNORM,
 771       MESA_FORMAT_B8G8R8A8_UNORM
 772    };
 773    /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
 774     * support pageflipping at all.
 775     */
 776    static const GLenum back_buffer_modes[] = {
 777      GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
 778    };
 779    uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
 780    int color;
 781    __DRIconfig **configs = NULL;
 782
 783    psp->max_gl_compat_version = 13;
 784    psp->max_gl_es1_version = 11;
 785
 786    if (!radeonInitDriver(psp)) {
 787        return NULL;
 788     }
 789    depth_bits[0] = 0;
 790    stencil_bits[0] = 0;
 791    depth_bits[1] = 16;
 792    stencil_bits[1] = 0;
 793    depth_bits[2] = 24;
 794    stencil_bits[2] = 0;
 795    depth_bits[3] = 24;
 796    stencil_bits[3] = 8;
 797
 798    msaa_samples_array[0] = 0;
 799
 800    for (color = 0; color < ARRAY_SIZE(formats); color++) {
 801       __DRIconfig **new_configs;
 802
 803       new_configs = driCreateConfigs(formats[color],
 804                                      depth_bits,
 805                                      stencil_bits,
 806                                      ARRAY_SIZE(depth_bits),
 807                                      back_buffer_modes,
 808                                      ARRAY_SIZE(back_buffer_modes),
 809                                      msaa_samples_array,
 810                                      ARRAY_SIZE(msaa_samples_array),
 811                                      GL_TRUE, GL_FALSE);
 812       configs = driConcatConfigs(configs, new_configs);
 813    }
 814
 815    if (configs == NULL) {
 816       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
 817               __LINE__);
 818       return NULL;
 819    }
 820
 821    return (const __DRIconfig **)configs;
 822 }
 823
 824 static const struct __DriverAPIRec radeon_driver_api = {
 825    .InitScreen      = radeonInitScreen2,
 826    .DestroyScreen   = radeonDestroyScreen,
 827 #if defined(RADEON_R200)
 828    .CreateContext   = r200CreateContext,
 829    .DestroyContext  = r200DestroyContext,
 830 #else
 831    .CreateContext   = r100CreateContext,
 832    .DestroyContext  = radeonDestroyContext,
 833 #endif
 834    .CreateBuffer    = radeonCreateBuffer,
 835    .DestroyBuffer   = radeonDestroyBuffer,
 836    .MakeCurrent     = radeonMakeCurrent,
 837    .UnbindContext   = radeonUnbindContext,
 838 };
 839
 840 static const struct __DRIDriverVtableExtensionRec radeon_vtable = {
 841    .base = { __DRI_DRIVER_VTABLE, 1 },
 842    .vtable = &radeon_driver_api,
 843 };
 844
 845 /* This is the table of extensions that the loader will dlsym() for. */
 846 static const __DRIextension *radeon_driver_extensions[] = {
 847     &driCoreExtension.base,
 848     &driDRI2Extension.base,
 849     &radeon_config_options.base,
 850     &radeon_vtable.base,
 851     NULL
 852 };
 853
 854 #ifdef RADEON_R200
 855 PUBLIC const __DRIextension **__driDriverGetExtensions_r200(void)
 856 {
 857    globalDriverAPI = &radeon_driver_api;
 858
 859    return radeon_driver_extensions;
 860 }
 861 #else
 862 PUBLIC const __DRIextension **__driDriverGetExtensions_radeon(void)
 863 {
 864    globalDriverAPI = &radeon_driver_api;
 865
 866    return radeon_driver_extensions;
 867 }
 868 #endif