Merge branch 'glsl-to-tgsi'
[mesa.git] / src / mesa / program / ir_to_mesa.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25
26 /**
27 * \file ir_to_mesa.cpp
28 *
29 * Translate GLSL IR to Mesa's gl_program representation.
30 */
31
32 #include <stdio.h>
33 #include "main/compiler.h"
34 #include "ir.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 extern "C" {
45 #include "main/mtypes.h"
46 #include "main/shaderapi.h"
47 #include "main/shaderobj.h"
48 #include "main/uniforms.h"
49 #include "program/hash_table.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_uniform.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57 }
58
59 class src_reg;
60 class dst_reg;
61
62 static int swizzle_for_size(int size);
63
64 /**
65 * This struct is a corresponding struct to Mesa prog_src_register, with
66 * wider fields.
67 */
68 class src_reg {
69 public:
70 src_reg(gl_register_file file, int index, const glsl_type *type)
71 {
72 this->file = file;
73 this->index = index;
74 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
75 this->swizzle = swizzle_for_size(type->vector_elements);
76 else
77 this->swizzle = SWIZZLE_XYZW;
78 this->negate = 0;
79 this->reladdr = NULL;
80 }
81
82 src_reg()
83 {
84 this->file = PROGRAM_UNDEFINED;
85 this->index = 0;
86 this->swizzle = 0;
87 this->negate = 0;
88 this->reladdr = NULL;
89 }
90
91 explicit src_reg(dst_reg reg);
92
93 gl_register_file file; /**< PROGRAM_* from Mesa */
94 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
95 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
98 src_reg *reladdr;
99 };
100
101 class dst_reg {
102 public:
103 dst_reg(gl_register_file file, int writemask)
104 {
105 this->file = file;
106 this->index = 0;
107 this->writemask = writemask;
108 this->cond_mask = COND_TR;
109 this->reladdr = NULL;
110 }
111
112 dst_reg()
113 {
114 this->file = PROGRAM_UNDEFINED;
115 this->index = 0;
116 this->writemask = 0;
117 this->cond_mask = COND_TR;
118 this->reladdr = NULL;
119 }
120
121 explicit dst_reg(src_reg reg);
122
123 gl_register_file file; /**< PROGRAM_* from Mesa */
124 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
125 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
126 GLuint cond_mask:4;
127 /** Register index should be offset by the integer in this reg. */
128 src_reg *reladdr;
129 };
130
131 src_reg::src_reg(dst_reg reg)
132 {
133 this->file = reg.file;
134 this->index = reg.index;
135 this->swizzle = SWIZZLE_XYZW;
136 this->negate = 0;
137 this->reladdr = reg.reladdr;
138 }
139
140 dst_reg::dst_reg(src_reg reg)
141 {
142 this->file = reg.file;
143 this->index = reg.index;
144 this->writemask = WRITEMASK_XYZW;
145 this->cond_mask = COND_TR;
146 this->reladdr = reg.reladdr;
147 }
148
149 class ir_to_mesa_instruction : public exec_node {
150 public:
151 /* Callers of this ralloc-based new need not call delete. It's
152 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
153 static void* operator new(size_t size, void *ctx)
154 {
155 void *node;
156
157 node = rzalloc_size(ctx, size);
158 assert(node != NULL);
159
160 return node;
161 }
162
163 enum prog_opcode op;
164 dst_reg dst;
165 src_reg src[3];
166 /** Pointer to the ir source this tree came from for debugging */
167 ir_instruction *ir;
168 GLboolean cond_update;
169 bool saturate;
170 int sampler; /**< sampler index */
171 int tex_target; /**< One of TEXTURE_*_INDEX */
172 GLboolean tex_shadow;
173
174 class function_entry *function; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
175 };
176
177 class variable_storage : public exec_node {
178 public:
179 variable_storage(ir_variable *var, gl_register_file file, int index)
180 : file(file), index(index), var(var)
181 {
182 /* empty */
183 }
184
185 gl_register_file file;
186 int index;
187 ir_variable *var; /* variable that maps to this, if any */
188 };
189
190 class function_entry : public exec_node {
191 public:
192 ir_function_signature *sig;
193
194 /**
195 * identifier of this function signature used by the program.
196 *
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
201 */
202 int sig_id;
203
204 /**
205 * Pointer to first instruction of the function body.
206 *
207 * Set during function body emits after main() is processed.
208 */
209 ir_to_mesa_instruction *bgn_inst;
210
211 /**
212 * Index of the first instruction of the function body in actual
213 * Mesa IR.
214 *
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
216 */
217 int inst;
218
219 /** Storage for the return value. */
220 src_reg return_reg;
221 };
222
223 class ir_to_mesa_visitor : public ir_visitor {
224 public:
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
227
228 function_entry *current_function;
229
230 struct gl_context *ctx;
231 struct gl_program *prog;
232 struct gl_shader_program *shader_program;
233 struct gl_shader_compiler_options *options;
234
235 int next_temp;
236
237 variable_storage *find_variable_storage(ir_variable *var);
238
239 function_entry *get_function_signature(ir_function_signature *sig);
240
241 src_reg get_temp(const glsl_type *type);
242 void reladdr_to_temp(ir_instruction *ir, src_reg *reg, int *num_reladdr);
243
244 src_reg src_reg_for_float(float val);
245
246 /**
247 * \name Visit methods
248 *
249 * As typical for the visitor pattern, there must be one \c visit method for
250 * each concrete subclass of \c ir_instruction. Virtual base classes within
251 * the hierarchy should not have \c visit methods.
252 */
253 /*@{*/
254 virtual void visit(ir_variable *);
255 virtual void visit(ir_loop *);
256 virtual void visit(ir_loop_jump *);
257 virtual void visit(ir_function_signature *);
258 virtual void visit(ir_function *);
259 virtual void visit(ir_expression *);
260 virtual void visit(ir_swizzle *);
261 virtual void visit(ir_dereference_variable *);
262 virtual void visit(ir_dereference_array *);
263 virtual void visit(ir_dereference_record *);
264 virtual void visit(ir_assignment *);
265 virtual void visit(ir_constant *);
266 virtual void visit(ir_call *);
267 virtual void visit(ir_return *);
268 virtual void visit(ir_discard *);
269 virtual void visit(ir_texture *);
270 virtual void visit(ir_if *);
271 /*@}*/
272
273 src_reg result;
274
275 /** List of variable_storage */
276 exec_list variables;
277
278 /** List of function_entry */
279 exec_list function_signatures;
280 int next_signature_id;
281
282 /** List of ir_to_mesa_instruction */
283 exec_list instructions;
284
285 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op);
286
287 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
288 dst_reg dst, src_reg src0);
289
290 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
291 dst_reg dst, src_reg src0, src_reg src1);
292
293 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
294 dst_reg dst,
295 src_reg src0, src_reg src1, src_reg src2);
296
297 /**
298 * Emit the correct dot-product instruction for the type of arguments
299 */
300 void emit_dp(ir_instruction *ir,
301 dst_reg dst,
302 src_reg src0,
303 src_reg src1,
304 unsigned elements);
305
306 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
307 dst_reg dst, src_reg src0);
308
309 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
310 dst_reg dst, src_reg src0, src_reg src1);
311
312 void emit_scs(ir_instruction *ir, enum prog_opcode op,
313 dst_reg dst, const src_reg &src);
314
315 GLboolean try_emit_mad(ir_expression *ir,
316 int mul_operand);
317 GLboolean try_emit_sat(ir_expression *ir);
318
319 void emit_swz(ir_expression *ir);
320
321 bool process_move_condition(ir_rvalue *ir);
322
323 void copy_propagate(void);
324
325 void *mem_ctx;
326 };
327
328 src_reg undef_src = src_reg(PROGRAM_UNDEFINED, 0, NULL);
329
330 dst_reg undef_dst = dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP);
331
332 dst_reg address_reg = dst_reg(PROGRAM_ADDRESS, WRITEMASK_X);
333
334 static int
335 swizzle_for_size(int size)
336 {
337 int size_swizzles[4] = {
338 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
339 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
340 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
341 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
342 };
343
344 assert((size >= 1) && (size <= 4));
345 return size_swizzles[size - 1];
346 }
347
348 ir_to_mesa_instruction *
349 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
350 dst_reg dst,
351 src_reg src0, src_reg src1, src_reg src2)
352 {
353 ir_to_mesa_instruction *inst = new(mem_ctx) ir_to_mesa_instruction();
354 int num_reladdr = 0;
355
356 /* If we have to do relative addressing, we want to load the ARL
357 * reg directly for one of the regs, and preload the other reladdr
358 * sources into temps.
359 */
360 num_reladdr += dst.reladdr != NULL;
361 num_reladdr += src0.reladdr != NULL;
362 num_reladdr += src1.reladdr != NULL;
363 num_reladdr += src2.reladdr != NULL;
364
365 reladdr_to_temp(ir, &src2, &num_reladdr);
366 reladdr_to_temp(ir, &src1, &num_reladdr);
367 reladdr_to_temp(ir, &src0, &num_reladdr);
368
369 if (dst.reladdr) {
370 emit(ir, OPCODE_ARL, address_reg, *dst.reladdr);
371 num_reladdr--;
372 }
373 assert(num_reladdr == 0);
374
375 inst->op = op;
376 inst->dst = dst;
377 inst->src[0] = src0;
378 inst->src[1] = src1;
379 inst->src[2] = src2;
380 inst->ir = ir;
381
382 inst->function = NULL;
383
384 this->instructions.push_tail(inst);
385
386 return inst;
387 }
388
389
390 ir_to_mesa_instruction *
391 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
392 dst_reg dst, src_reg src0, src_reg src1)
393 {
394 return emit(ir, op, dst, src0, src1, undef_src);
395 }
396
397 ir_to_mesa_instruction *
398 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
399 dst_reg dst, src_reg src0)
400 {
401 assert(dst.writemask != 0);
402 return emit(ir, op, dst, src0, undef_src, undef_src);
403 }
404
405 ir_to_mesa_instruction *
406 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op)
407 {
408 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
409 }
410
411 void
412 ir_to_mesa_visitor::emit_dp(ir_instruction *ir,
413 dst_reg dst, src_reg src0, src_reg src1,
414 unsigned elements)
415 {
416 static const gl_inst_opcode dot_opcodes[] = {
417 OPCODE_DP2, OPCODE_DP3, OPCODE_DP4
418 };
419
420 emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
421 }
422
423 /**
424 * Emits Mesa scalar opcodes to produce unique answers across channels.
425 *
426 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
427 * channel determines the result across all channels. So to do a vec4
428 * of this operation, we want to emit a scalar per source channel used
429 * to produce dest channels.
430 */
431 void
432 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
433 dst_reg dst,
434 src_reg orig_src0, src_reg orig_src1)
435 {
436 int i, j;
437 int done_mask = ~dst.writemask;
438
439 /* Mesa RCP is a scalar operation splatting results to all channels,
440 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
441 * dst channels.
442 */
443 for (i = 0; i < 4; i++) {
444 GLuint this_mask = (1 << i);
445 ir_to_mesa_instruction *inst;
446 src_reg src0 = orig_src0;
447 src_reg src1 = orig_src1;
448
449 if (done_mask & this_mask)
450 continue;
451
452 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
453 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
454 for (j = i + 1; j < 4; j++) {
455 /* If there is another enabled component in the destination that is
456 * derived from the same inputs, generate its value on this pass as
457 * well.
458 */
459 if (!(done_mask & (1 << j)) &&
460 GET_SWZ(src0.swizzle, j) == src0_swiz &&
461 GET_SWZ(src1.swizzle, j) == src1_swiz) {
462 this_mask |= (1 << j);
463 }
464 }
465 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
466 src0_swiz, src0_swiz);
467 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
468 src1_swiz, src1_swiz);
469
470 inst = emit(ir, op, dst, src0, src1);
471 inst->dst.writemask = this_mask;
472 done_mask |= this_mask;
473 }
474 }
475
476 void
477 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
478 dst_reg dst, src_reg src0)
479 {
480 src_reg undef = undef_src;
481
482 undef.swizzle = SWIZZLE_XXXX;
483
484 emit_scalar(ir, op, dst, src0, undef);
485 }
486
487 /**
488 * Emit an OPCODE_SCS instruction
489 *
490 * The \c SCS opcode functions a bit differently than the other Mesa (or
491 * ARB_fragment_program) opcodes. Instead of splatting its result across all
492 * four components of the destination, it writes one value to the \c x
493 * component and another value to the \c y component.
494 *
495 * \param ir IR instruction being processed
496 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
497 * value is desired.
498 * \param dst Destination register
499 * \param src Source register
500 */
501 void
502 ir_to_mesa_visitor::emit_scs(ir_instruction *ir, enum prog_opcode op,
503 dst_reg dst,
504 const src_reg &src)
505 {
506 /* Vertex programs cannot use the SCS opcode.
507 */
508 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
509 emit_scalar(ir, op, dst, src);
510 return;
511 }
512
513 const unsigned component = (op == OPCODE_SIN) ? 0 : 1;
514 const unsigned scs_mask = (1U << component);
515 int done_mask = ~dst.writemask;
516 src_reg tmp;
517
518 assert(op == OPCODE_SIN || op == OPCODE_COS);
519
520 /* If there are compnents in the destination that differ from the component
521 * that will be written by the SCS instrution, we'll need a temporary.
522 */
523 if (scs_mask != unsigned(dst.writemask)) {
524 tmp = get_temp(glsl_type::vec4_type);
525 }
526
527 for (unsigned i = 0; i < 4; i++) {
528 unsigned this_mask = (1U << i);
529 src_reg src0 = src;
530
531 if ((done_mask & this_mask) != 0)
532 continue;
533
534 /* The source swizzle specified which component of the source generates
535 * sine / cosine for the current component in the destination. The SCS
536 * instruction requires that this value be swizzle to the X component.
537 * Replace the current swizzle with a swizzle that puts the source in
538 * the X component.
539 */
540 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
541
542 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
543 src0_swiz, src0_swiz);
544 for (unsigned j = i + 1; j < 4; j++) {
545 /* If there is another enabled component in the destination that is
546 * derived from the same inputs, generate its value on this pass as
547 * well.
548 */
549 if (!(done_mask & (1 << j)) &&
550 GET_SWZ(src0.swizzle, j) == src0_swiz) {
551 this_mask |= (1 << j);
552 }
553 }
554
555 if (this_mask != scs_mask) {
556 ir_to_mesa_instruction *inst;
557 dst_reg tmp_dst = dst_reg(tmp);
558
559 /* Emit the SCS instruction.
560 */
561 inst = emit(ir, OPCODE_SCS, tmp_dst, src0);
562 inst->dst.writemask = scs_mask;
563
564 /* Move the result of the SCS instruction to the desired location in
565 * the destination.
566 */
567 tmp.swizzle = MAKE_SWIZZLE4(component, component,
568 component, component);
569 inst = emit(ir, OPCODE_SCS, dst, tmp);
570 inst->dst.writemask = this_mask;
571 } else {
572 /* Emit the SCS instruction to write directly to the destination.
573 */
574 ir_to_mesa_instruction *inst = emit(ir, OPCODE_SCS, dst, src0);
575 inst->dst.writemask = scs_mask;
576 }
577
578 done_mask |= this_mask;
579 }
580 }
581
582 struct src_reg
583 ir_to_mesa_visitor::src_reg_for_float(float val)
584 {
585 src_reg src(PROGRAM_CONSTANT, -1, NULL);
586
587 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
588 (const gl_constant_value *)&val, 1, &src.swizzle);
589
590 return src;
591 }
592
593 static int
594 type_size(const struct glsl_type *type)
595 {
596 unsigned int i;
597 int size;
598
599 switch (type->base_type) {
600 case GLSL_TYPE_UINT:
601 case GLSL_TYPE_INT:
602 case GLSL_TYPE_FLOAT:
603 case GLSL_TYPE_BOOL:
604 if (type->is_matrix()) {
605 return type->matrix_columns;
606 } else {
607 /* Regardless of size of vector, it gets a vec4. This is bad
608 * packing for things like floats, but otherwise arrays become a
609 * mess. Hopefully a later pass over the code can pack scalars
610 * down if appropriate.
611 */
612 return 1;
613 }
614 case GLSL_TYPE_ARRAY:
615 assert(type->length > 0);
616 return type_size(type->fields.array) * type->length;
617 case GLSL_TYPE_STRUCT:
618 size = 0;
619 for (i = 0; i < type->length; i++) {
620 size += type_size(type->fields.structure[i].type);
621 }
622 return size;
623 case GLSL_TYPE_SAMPLER:
624 /* Samplers take up one slot in UNIFORMS[], but they're baked in
625 * at link time.
626 */
627 return 1;
628 default:
629 assert(0);
630 return 0;
631 }
632 }
633
634 /**
635 * In the initial pass of codegen, we assign temporary numbers to
636 * intermediate results. (not SSA -- variable assignments will reuse
637 * storage). Actual register allocation for the Mesa VM occurs in a
638 * pass over the Mesa IR later.
639 */
640 src_reg
641 ir_to_mesa_visitor::get_temp(const glsl_type *type)
642 {
643 src_reg src;
644 int swizzle[4];
645 int i;
646
647 src.file = PROGRAM_TEMPORARY;
648 src.index = next_temp;
649 src.reladdr = NULL;
650 next_temp += type_size(type);
651
652 if (type->is_array() || type->is_record()) {
653 src.swizzle = SWIZZLE_NOOP;
654 } else {
655 for (i = 0; i < type->vector_elements; i++)
656 swizzle[i] = i;
657 for (; i < 4; i++)
658 swizzle[i] = type->vector_elements - 1;
659 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1],
660 swizzle[2], swizzle[3]);
661 }
662 src.negate = 0;
663
664 return src;
665 }
666
667 variable_storage *
668 ir_to_mesa_visitor::find_variable_storage(ir_variable *var)
669 {
670
671 variable_storage *entry;
672
673 foreach_iter(exec_list_iterator, iter, this->variables) {
674 entry = (variable_storage *)iter.get();
675
676 if (entry->var == var)
677 return entry;
678 }
679
680 return NULL;
681 }
682
683 void
684 ir_to_mesa_visitor::visit(ir_variable *ir)
685 {
686 if (strcmp(ir->name, "gl_FragCoord") == 0) {
687 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
688
689 fp->OriginUpperLeft = ir->origin_upper_left;
690 fp->PixelCenterInteger = ir->pixel_center_integer;
691
692 } else if (strcmp(ir->name, "gl_FragDepth") == 0) {
693 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
694 switch (ir->depth_layout) {
695 case ir_depth_layout_none:
696 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_NONE;
697 break;
698 case ir_depth_layout_any:
699 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_ANY;
700 break;
701 case ir_depth_layout_greater:
702 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_GREATER;
703 break;
704 case ir_depth_layout_less:
705 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_LESS;
706 break;
707 case ir_depth_layout_unchanged:
708 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_UNCHANGED;
709 break;
710 default:
711 assert(0);
712 break;
713 }
714 }
715
716 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
717 unsigned int i;
718 const ir_state_slot *const slots = ir->state_slots;
719 assert(ir->state_slots != NULL);
720
721 /* Check if this statevar's setup in the STATE file exactly
722 * matches how we'll want to reference it as a
723 * struct/array/whatever. If not, then we need to move it into
724 * temporary storage and hope that it'll get copy-propagated
725 * out.
726 */
727 for (i = 0; i < ir->num_state_slots; i++) {
728 if (slots[i].swizzle != SWIZZLE_XYZW) {
729 break;
730 }
731 }
732
733 struct variable_storage *storage;
734 dst_reg dst;
735 if (i == ir->num_state_slots) {
736 /* We'll set the index later. */
737 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
738 this->variables.push_tail(storage);
739
740 dst = undef_dst;
741 } else {
742 /* The variable_storage constructor allocates slots based on the size
743 * of the type. However, this had better match the number of state
744 * elements that we're going to copy into the new temporary.
745 */
746 assert((int) ir->num_state_slots == type_size(ir->type));
747
748 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
749 this->next_temp);
750 this->variables.push_tail(storage);
751 this->next_temp += type_size(ir->type);
752
753 dst = dst_reg(src_reg(PROGRAM_TEMPORARY, storage->index, NULL));
754 }
755
756
757 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
758 int index = _mesa_add_state_reference(this->prog->Parameters,
759 (gl_state_index *)slots[i].tokens);
760
761 if (storage->file == PROGRAM_STATE_VAR) {
762 if (storage->index == -1) {
763 storage->index = index;
764 } else {
765 assert(index == storage->index + (int)i);
766 }
767 } else {
768 src_reg src(PROGRAM_STATE_VAR, index, NULL);
769 src.swizzle = slots[i].swizzle;
770 emit(ir, OPCODE_MOV, dst, src);
771 /* even a float takes up a whole vec4 reg in a struct/array. */
772 dst.index++;
773 }
774 }
775
776 if (storage->file == PROGRAM_TEMPORARY &&
777 dst.index != storage->index + (int) ir->num_state_slots) {
778 linker_error(this->shader_program,
779 "failed to load builtin uniform `%s' "
780 "(%d/%d regs loaded)\n",
781 ir->name, dst.index - storage->index,
782 type_size(ir->type));
783 }
784 }
785 }
786
787 void
788 ir_to_mesa_visitor::visit(ir_loop *ir)
789 {
790 ir_dereference_variable *counter = NULL;
791
792 if (ir->counter != NULL)
793 counter = new(mem_ctx) ir_dereference_variable(ir->counter);
794
795 if (ir->from != NULL) {
796 assert(ir->counter != NULL);
797
798 ir_assignment *a =
799 new(mem_ctx) ir_assignment(counter, ir->from, NULL);
800
801 a->accept(this);
802 }
803
804 emit(NULL, OPCODE_BGNLOOP);
805
806 if (ir->to) {
807 ir_expression *e =
808 new(mem_ctx) ir_expression(ir->cmp, glsl_type::bool_type,
809 counter, ir->to);
810 ir_if *if_stmt = new(mem_ctx) ir_if(e);
811
812 ir_loop_jump *brk =
813 new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break);
814
815 if_stmt->then_instructions.push_tail(brk);
816
817 if_stmt->accept(this);
818 }
819
820 visit_exec_list(&ir->body_instructions, this);
821
822 if (ir->increment) {
823 ir_expression *e =
824 new(mem_ctx) ir_expression(ir_binop_add, counter->type,
825 counter, ir->increment);
826
827 ir_assignment *a =
828 new(mem_ctx) ir_assignment(counter, e, NULL);
829
830 a->accept(this);
831 }
832
833 emit(NULL, OPCODE_ENDLOOP);
834 }
835
836 void
837 ir_to_mesa_visitor::visit(ir_loop_jump *ir)
838 {
839 switch (ir->mode) {
840 case ir_loop_jump::jump_break:
841 emit(NULL, OPCODE_BRK);
842 break;
843 case ir_loop_jump::jump_continue:
844 emit(NULL, OPCODE_CONT);
845 break;
846 }
847 }
848
849
850 void
851 ir_to_mesa_visitor::visit(ir_function_signature *ir)
852 {
853 assert(0);
854 (void)ir;
855 }
856
857 void
858 ir_to_mesa_visitor::visit(ir_function *ir)
859 {
860 /* Ignore function bodies other than main() -- we shouldn't see calls to
861 * them since they should all be inlined before we get to ir_to_mesa.
862 */
863 if (strcmp(ir->name, "main") == 0) {
864 const ir_function_signature *sig;
865 exec_list empty;
866
867 sig = ir->matching_signature(&empty);
868
869 assert(sig);
870
871 foreach_iter(exec_list_iterator, iter, sig->body) {
872 ir_instruction *ir = (ir_instruction *)iter.get();
873
874 ir->accept(this);
875 }
876 }
877 }
878
879 GLboolean
880 ir_to_mesa_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
881 {
882 int nonmul_operand = 1 - mul_operand;
883 src_reg a, b, c;
884
885 ir_expression *expr = ir->operands[mul_operand]->as_expression();
886 if (!expr || expr->operation != ir_binop_mul)
887 return false;
888
889 expr->operands[0]->accept(this);
890 a = this->result;
891 expr->operands[1]->accept(this);
892 b = this->result;
893 ir->operands[nonmul_operand]->accept(this);
894 c = this->result;
895
896 this->result = get_temp(ir->type);
897 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, c);
898
899 return true;
900 }
901
902 GLboolean
903 ir_to_mesa_visitor::try_emit_sat(ir_expression *ir)
904 {
905 /* Saturates were only introduced to vertex programs in
906 * NV_vertex_program3, so don't give them to drivers in the VP.
907 */
908 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
909 return false;
910
911 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
912 if (!sat_src)
913 return false;
914
915 sat_src->accept(this);
916 src_reg src = this->result;
917
918 this->result = get_temp(ir->type);
919 ir_to_mesa_instruction *inst;
920 inst = emit(ir, OPCODE_MOV, dst_reg(this->result), src);
921 inst->saturate = true;
922
923 return true;
924 }
925
926 void
927 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction *ir,
928 src_reg *reg, int *num_reladdr)
929 {
930 if (!reg->reladdr)
931 return;
932
933 emit(ir, OPCODE_ARL, address_reg, *reg->reladdr);
934
935 if (*num_reladdr != 1) {
936 src_reg temp = get_temp(glsl_type::vec4_type);
937
938 emit(ir, OPCODE_MOV, dst_reg(temp), *reg);
939 *reg = temp;
940 }
941
942 (*num_reladdr)--;
943 }
944
945 void
946 ir_to_mesa_visitor::emit_swz(ir_expression *ir)
947 {
948 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
949 * This means that each of the operands is either an immediate value of -1,
950 * 0, or 1, or is a component from one source register (possibly with
951 * negation).
952 */
953 uint8_t components[4] = { 0 };
954 bool negate[4] = { false };
955 ir_variable *var = NULL;
956
957 for (unsigned i = 0; i < ir->type->vector_elements; i++) {
958 ir_rvalue *op = ir->operands[i];
959
960 assert(op->type->is_scalar());
961
962 while (op != NULL) {
963 switch (op->ir_type) {
964 case ir_type_constant: {
965
966 assert(op->type->is_scalar());
967
968 const ir_constant *const c = op->as_constant();
969 if (c->is_one()) {
970 components[i] = SWIZZLE_ONE;
971 } else if (c->is_zero()) {
972 components[i] = SWIZZLE_ZERO;
973 } else if (c->is_negative_one()) {
974 components[i] = SWIZZLE_ONE;
975 negate[i] = true;
976 } else {
977 assert(!"SWZ constant must be 0.0 or 1.0.");
978 }
979
980 op = NULL;
981 break;
982 }
983
984 case ir_type_dereference_variable: {
985 ir_dereference_variable *const deref =
986 (ir_dereference_variable *) op;
987
988 assert((var == NULL) || (deref->var == var));
989 components[i] = SWIZZLE_X;
990 var = deref->var;
991 op = NULL;
992 break;
993 }
994
995 case ir_type_expression: {
996 ir_expression *const expr = (ir_expression *) op;
997
998 assert(expr->operation == ir_unop_neg);
999 negate[i] = true;
1000
1001 op = expr->operands[0];
1002 break;
1003 }
1004
1005 case ir_type_swizzle: {
1006 ir_swizzle *const swiz = (ir_swizzle *) op;
1007
1008 components[i] = swiz->mask.x;
1009 op = swiz->val;
1010 break;
1011 }
1012
1013 default:
1014 assert(!"Should not get here.");
1015 return;
1016 }
1017 }
1018 }
1019
1020 assert(var != NULL);
1021
1022 ir_dereference_variable *const deref =
1023 new(mem_ctx) ir_dereference_variable(var);
1024
1025 this->result.file = PROGRAM_UNDEFINED;
1026 deref->accept(this);
1027 if (this->result.file == PROGRAM_UNDEFINED) {
1028 ir_print_visitor v;
1029 printf("Failed to get tree for expression operand:\n");
1030 deref->accept(&v);
1031 exit(1);
1032 }
1033
1034 src_reg src;
1035
1036 src = this->result;
1037 src.swizzle = MAKE_SWIZZLE4(components[0],
1038 components[1],
1039 components[2],
1040 components[3]);
1041 src.negate = ((unsigned(negate[0]) << 0)
1042 | (unsigned(negate[1]) << 1)
1043 | (unsigned(negate[2]) << 2)
1044 | (unsigned(negate[3]) << 3));
1045
1046 /* Storage for our result. Ideally for an assignment we'd be using the
1047 * actual storage for the result here, instead.
1048 */
1049 const src_reg result_src = get_temp(ir->type);
1050 dst_reg result_dst = dst_reg(result_src);
1051
1052 /* Limit writes to the channels that will be used by result_src later.
1053 * This does limit this temp's use as a temporary for multi-instruction
1054 * sequences.
1055 */
1056 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1057
1058 emit(ir, OPCODE_SWZ, result_dst, src);
1059 this->result = result_src;
1060 }
1061
1062 void
1063 ir_to_mesa_visitor::visit(ir_expression *ir)
1064 {
1065 unsigned int operand;
1066 src_reg op[Elements(ir->operands)];
1067 src_reg result_src;
1068 dst_reg result_dst;
1069
1070 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1071 */
1072 if (ir->operation == ir_binop_add) {
1073 if (try_emit_mad(ir, 1))
1074 return;
1075 if (try_emit_mad(ir, 0))
1076 return;
1077 }
1078 if (try_emit_sat(ir))
1079 return;
1080
1081 if (ir->operation == ir_quadop_vector) {
1082 this->emit_swz(ir);
1083 return;
1084 }
1085
1086 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1087 this->result.file = PROGRAM_UNDEFINED;
1088 ir->operands[operand]->accept(this);
1089 if (this->result.file == PROGRAM_UNDEFINED) {
1090 ir_print_visitor v;
1091 printf("Failed to get tree for expression operand:\n");
1092 ir->operands[operand]->accept(&v);
1093 exit(1);
1094 }
1095 op[operand] = this->result;
1096
1097 /* Matrix expression operands should have been broken down to vector
1098 * operations already.
1099 */
1100 assert(!ir->operands[operand]->type->is_matrix());
1101 }
1102
1103 int vector_elements = ir->operands[0]->type->vector_elements;
1104 if (ir->operands[1]) {
1105 vector_elements = MAX2(vector_elements,
1106 ir->operands[1]->type->vector_elements);
1107 }
1108
1109 this->result.file = PROGRAM_UNDEFINED;
1110
1111 /* Storage for our result. Ideally for an assignment we'd be using
1112 * the actual storage for the result here, instead.
1113 */
1114 result_src = get_temp(ir->type);
1115 /* convenience for the emit functions below. */
1116 result_dst = dst_reg(result_src);
1117 /* Limit writes to the channels that will be used by result_src later.
1118 * This does limit this temp's use as a temporary for multi-instruction
1119 * sequences.
1120 */
1121 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1122
1123 switch (ir->operation) {
1124 case ir_unop_logic_not:
1125 emit(ir, OPCODE_SEQ, result_dst, op[0], src_reg_for_float(0.0));
1126 break;
1127 case ir_unop_neg:
1128 op[0].negate = ~op[0].negate;
1129 result_src = op[0];
1130 break;
1131 case ir_unop_abs:
1132 emit(ir, OPCODE_ABS, result_dst, op[0]);
1133 break;
1134 case ir_unop_sign:
1135 emit(ir, OPCODE_SSG, result_dst, op[0]);
1136 break;
1137 case ir_unop_rcp:
1138 emit_scalar(ir, OPCODE_RCP, result_dst, op[0]);
1139 break;
1140
1141 case ir_unop_exp2:
1142 emit_scalar(ir, OPCODE_EX2, result_dst, op[0]);
1143 break;
1144 case ir_unop_exp:
1145 case ir_unop_log:
1146 assert(!"not reached: should be handled by ir_explog_to_explog2");
1147 break;
1148 case ir_unop_log2:
1149 emit_scalar(ir, OPCODE_LG2, result_dst, op[0]);
1150 break;
1151 case ir_unop_sin:
1152 emit_scalar(ir, OPCODE_SIN, result_dst, op[0]);
1153 break;
1154 case ir_unop_cos:
1155 emit_scalar(ir, OPCODE_COS, result_dst, op[0]);
1156 break;
1157 case ir_unop_sin_reduced:
1158 emit_scs(ir, OPCODE_SIN, result_dst, op[0]);
1159 break;
1160 case ir_unop_cos_reduced:
1161 emit_scs(ir, OPCODE_COS, result_dst, op[0]);
1162 break;
1163
1164 case ir_unop_dFdx:
1165 emit(ir, OPCODE_DDX, result_dst, op[0]);
1166 break;
1167 case ir_unop_dFdy:
1168 emit(ir, OPCODE_DDY, result_dst, op[0]);
1169 break;
1170
1171 case ir_unop_noise: {
1172 const enum prog_opcode opcode =
1173 prog_opcode(OPCODE_NOISE1
1174 + (ir->operands[0]->type->vector_elements) - 1);
1175 assert((opcode >= OPCODE_NOISE1) && (opcode <= OPCODE_NOISE4));
1176
1177 emit(ir, opcode, result_dst, op[0]);
1178 break;
1179 }
1180
1181 case ir_binop_add:
1182 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1183 break;
1184 case ir_binop_sub:
1185 emit(ir, OPCODE_SUB, result_dst, op[0], op[1]);
1186 break;
1187
1188 case ir_binop_mul:
1189 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1190 break;
1191 case ir_binop_div:
1192 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1193 case ir_binop_mod:
1194 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1195 break;
1196
1197 case ir_binop_less:
1198 emit(ir, OPCODE_SLT, result_dst, op[0], op[1]);
1199 break;
1200 case ir_binop_greater:
1201 emit(ir, OPCODE_SGT, result_dst, op[0], op[1]);
1202 break;
1203 case ir_binop_lequal:
1204 emit(ir, OPCODE_SLE, result_dst, op[0], op[1]);
1205 break;
1206 case ir_binop_gequal:
1207 emit(ir, OPCODE_SGE, result_dst, op[0], op[1]);
1208 break;
1209 case ir_binop_equal:
1210 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1211 break;
1212 case ir_binop_nequal:
1213 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1214 break;
1215 case ir_binop_all_equal:
1216 /* "==" operator producing a scalar boolean. */
1217 if (ir->operands[0]->type->is_vector() ||
1218 ir->operands[1]->type->is_vector()) {
1219 src_reg temp = get_temp(glsl_type::vec4_type);
1220 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1221 emit_dp(ir, result_dst, temp, temp, vector_elements);
1222 emit(ir, OPCODE_SEQ, result_dst, result_src, src_reg_for_float(0.0));
1223 } else {
1224 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1225 }
1226 break;
1227 case ir_binop_any_nequal:
1228 /* "!=" operator producing a scalar boolean. */
1229 if (ir->operands[0]->type->is_vector() ||
1230 ir->operands[1]->type->is_vector()) {
1231 src_reg temp = get_temp(glsl_type::vec4_type);
1232 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1233 emit_dp(ir, result_dst, temp, temp, vector_elements);
1234 emit(ir, OPCODE_SNE, result_dst, result_src, src_reg_for_float(0.0));
1235 } else {
1236 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1237 }
1238 break;
1239
1240 case ir_unop_any:
1241 assert(ir->operands[0]->type->is_vector());
1242 emit_dp(ir, result_dst, op[0], op[0],
1243 ir->operands[0]->type->vector_elements);
1244 emit(ir, OPCODE_SNE, result_dst, result_src, src_reg_for_float(0.0));
1245 break;
1246
1247 case ir_binop_logic_xor:
1248 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1249 break;
1250
1251 case ir_binop_logic_or:
1252 /* This could be a saturated add and skip the SNE. */
1253 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1254 emit(ir, OPCODE_SNE, result_dst, result_src, src_reg_for_float(0.0));
1255 break;
1256
1257 case ir_binop_logic_and:
1258 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1259 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1260 break;
1261
1262 case ir_binop_dot:
1263 assert(ir->operands[0]->type->is_vector());
1264 assert(ir->operands[0]->type == ir->operands[1]->type);
1265 emit_dp(ir, result_dst, op[0], op[1],
1266 ir->operands[0]->type->vector_elements);
1267 break;
1268
1269 case ir_unop_sqrt:
1270 /* sqrt(x) = x * rsq(x). */
1271 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1272 emit(ir, OPCODE_MUL, result_dst, result_src, op[0]);
1273 /* For incoming channels <= 0, set the result to 0. */
1274 op[0].negate = ~op[0].negate;
1275 emit(ir, OPCODE_CMP, result_dst,
1276 op[0], result_src, src_reg_for_float(0.0));
1277 break;
1278 case ir_unop_rsq:
1279 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1280 break;
1281 case ir_unop_i2f:
1282 case ir_unop_u2f:
1283 case ir_unop_b2f:
1284 case ir_unop_b2i:
1285 case ir_unop_i2u:
1286 case ir_unop_u2i:
1287 /* Mesa IR lacks types, ints are stored as truncated floats. */
1288 result_src = op[0];
1289 break;
1290 case ir_unop_f2i:
1291 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1292 break;
1293 case ir_unop_f2b:
1294 case ir_unop_i2b:
1295 emit(ir, OPCODE_SNE, result_dst,
1296 op[0], src_reg_for_float(0.0));
1297 break;
1298 case ir_unop_trunc:
1299 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1300 break;
1301 case ir_unop_ceil:
1302 op[0].negate = ~op[0].negate;
1303 emit(ir, OPCODE_FLR, result_dst, op[0]);
1304 result_src.negate = ~result_src.negate;
1305 break;
1306 case ir_unop_floor:
1307 emit(ir, OPCODE_FLR, result_dst, op[0]);
1308 break;
1309 case ir_unop_fract:
1310 emit(ir, OPCODE_FRC, result_dst, op[0]);
1311 break;
1312
1313 case ir_binop_min:
1314 emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
1315 break;
1316 case ir_binop_max:
1317 emit(ir, OPCODE_MAX, result_dst, op[0], op[1]);
1318 break;
1319 case ir_binop_pow:
1320 emit_scalar(ir, OPCODE_POW, result_dst, op[0], op[1]);
1321 break;
1322
1323 case ir_unop_bit_not:
1324 case ir_binop_lshift:
1325 case ir_binop_rshift:
1326 case ir_binop_bit_and:
1327 case ir_binop_bit_xor:
1328 case ir_binop_bit_or:
1329 case ir_unop_round_even:
1330 assert(!"GLSL 1.30 features unsupported");
1331 break;
1332
1333 case ir_quadop_vector:
1334 /* This operation should have already been handled.
1335 */
1336 assert(!"Should not get here.");
1337 break;
1338 }
1339
1340 this->result = result_src;
1341 }
1342
1343
1344 void
1345 ir_to_mesa_visitor::visit(ir_swizzle *ir)
1346 {
1347 src_reg src;
1348 int i;
1349 int swizzle[4];
1350
1351 /* Note that this is only swizzles in expressions, not those on the left
1352 * hand side of an assignment, which do write masking. See ir_assignment
1353 * for that.
1354 */
1355
1356 ir->val->accept(this);
1357 src = this->result;
1358 assert(src.file != PROGRAM_UNDEFINED);
1359
1360 for (i = 0; i < 4; i++) {
1361 if (i < ir->type->vector_elements) {
1362 switch (i) {
1363 case 0:
1364 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1365 break;
1366 case 1:
1367 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1368 break;
1369 case 2:
1370 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1371 break;
1372 case 3:
1373 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1374 break;
1375 }
1376 } else {
1377 /* If the type is smaller than a vec4, replicate the last
1378 * channel out.
1379 */
1380 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1381 }
1382 }
1383
1384 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1385
1386 this->result = src;
1387 }
1388
1389 void
1390 ir_to_mesa_visitor::visit(ir_dereference_variable *ir)
1391 {
1392 variable_storage *entry = find_variable_storage(ir->var);
1393 ir_variable *var = ir->var;
1394
1395 if (!entry) {
1396 switch (var->mode) {
1397 case ir_var_uniform:
1398 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1399 var->location);
1400 this->variables.push_tail(entry);
1401 break;
1402 case ir_var_in:
1403 case ir_var_inout:
1404 /* The linker assigns locations for varyings and attributes,
1405 * including deprecated builtins (like gl_Color),
1406 * user-assigned generic attributes (glBindVertexLocation),
1407 * and user-defined varyings.
1408 *
1409 * FINISHME: We would hit this path for function arguments. Fix!
1410 */
1411 assert(var->location != -1);
1412 entry = new(mem_ctx) variable_storage(var,
1413 PROGRAM_INPUT,
1414 var->location);
1415 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1416 var->location >= VERT_ATTRIB_GENERIC0) {
1417 _mesa_add_attribute(this->prog->Attributes,
1418 var->name,
1419 _mesa_sizeof_glsl_type(var->type->gl_type),
1420 var->type->gl_type,
1421 var->location - VERT_ATTRIB_GENERIC0);
1422 }
1423 break;
1424 case ir_var_out:
1425 assert(var->location != -1);
1426 entry = new(mem_ctx) variable_storage(var,
1427 PROGRAM_OUTPUT,
1428 var->location);
1429 break;
1430 case ir_var_system_value:
1431 entry = new(mem_ctx) variable_storage(var,
1432 PROGRAM_SYSTEM_VALUE,
1433 var->location);
1434 break;
1435 case ir_var_auto:
1436 case ir_var_temporary:
1437 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1438 this->next_temp);
1439 this->variables.push_tail(entry);
1440
1441 next_temp += type_size(var->type);
1442 break;
1443 }
1444
1445 if (!entry) {
1446 printf("Failed to make storage for %s\n", var->name);
1447 exit(1);
1448 }
1449 }
1450
1451 this->result = src_reg(entry->file, entry->index, var->type);
1452 }
1453
1454 void
1455 ir_to_mesa_visitor::visit(ir_dereference_array *ir)
1456 {
1457 ir_constant *index;
1458 src_reg src;
1459 int element_size = type_size(ir->type);
1460
1461 index = ir->array_index->constant_expression_value();
1462
1463 ir->array->accept(this);
1464 src = this->result;
1465
1466 if (index) {
1467 src.index += index->value.i[0] * element_size;
1468 } else {
1469 /* Variable index array dereference. It eats the "vec4" of the
1470 * base of the array and an index that offsets the Mesa register
1471 * index.
1472 */
1473 ir->array_index->accept(this);
1474
1475 src_reg index_reg;
1476
1477 if (element_size == 1) {
1478 index_reg = this->result;
1479 } else {
1480 index_reg = get_temp(glsl_type::float_type);
1481
1482 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1483 this->result, src_reg_for_float(element_size));
1484 }
1485
1486 /* If there was already a relative address register involved, add the
1487 * new and the old together to get the new offset.
1488 */
1489 if (src.reladdr != NULL) {
1490 src_reg accum_reg = get_temp(glsl_type::float_type);
1491
1492 emit(ir, OPCODE_ADD, dst_reg(accum_reg),
1493 index_reg, *src.reladdr);
1494
1495 index_reg = accum_reg;
1496 }
1497
1498 src.reladdr = ralloc(mem_ctx, src_reg);
1499 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
1500 }
1501
1502 /* If the type is smaller than a vec4, replicate the last channel out. */
1503 if (ir->type->is_scalar() || ir->type->is_vector())
1504 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1505 else
1506 src.swizzle = SWIZZLE_NOOP;
1507
1508 this->result = src;
1509 }
1510
1511 void
1512 ir_to_mesa_visitor::visit(ir_dereference_record *ir)
1513 {
1514 unsigned int i;
1515 const glsl_type *struct_type = ir->record->type;
1516 int offset = 0;
1517
1518 ir->record->accept(this);
1519
1520 for (i = 0; i < struct_type->length; i++) {
1521 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1522 break;
1523 offset += type_size(struct_type->fields.structure[i].type);
1524 }
1525
1526 /* If the type is smaller than a vec4, replicate the last channel out. */
1527 if (ir->type->is_scalar() || ir->type->is_vector())
1528 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1529 else
1530 this->result.swizzle = SWIZZLE_NOOP;
1531
1532 this->result.index += offset;
1533 }
1534
1535 /**
1536 * We want to be careful in assignment setup to hit the actual storage
1537 * instead of potentially using a temporary like we might with the
1538 * ir_dereference handler.
1539 */
1540 static dst_reg
1541 get_assignment_lhs(ir_dereference *ir, ir_to_mesa_visitor *v)
1542 {
1543 /* The LHS must be a dereference. If the LHS is a variable indexed array
1544 * access of a vector, it must be separated into a series conditional moves
1545 * before reaching this point (see ir_vec_index_to_cond_assign).
1546 */
1547 assert(ir->as_dereference());
1548 ir_dereference_array *deref_array = ir->as_dereference_array();
1549 if (deref_array) {
1550 assert(!deref_array->array->type->is_vector());
1551 }
1552
1553 /* Use the rvalue deref handler for the most part. We'll ignore
1554 * swizzles in it and write swizzles using writemask, though.
1555 */
1556 ir->accept(v);
1557 return dst_reg(v->result);
1558 }
1559
1560 /**
1561 * Process the condition of a conditional assignment
1562 *
1563 * Examines the condition of a conditional assignment to generate the optimal
1564 * first operand of a \c CMP instruction. If the condition is a relational
1565 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1566 * used as the source for the \c CMP instruction. Otherwise the comparison
1567 * is processed to a boolean result, and the boolean result is used as the
1568 * operand to the CMP instruction.
1569 */
1570 bool
1571 ir_to_mesa_visitor::process_move_condition(ir_rvalue *ir)
1572 {
1573 ir_rvalue *src_ir = ir;
1574 bool negate = true;
1575 bool switch_order = false;
1576
1577 ir_expression *const expr = ir->as_expression();
1578 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
1579 bool zero_on_left = false;
1580
1581 if (expr->operands[0]->is_zero()) {
1582 src_ir = expr->operands[1];
1583 zero_on_left = true;
1584 } else if (expr->operands[1]->is_zero()) {
1585 src_ir = expr->operands[0];
1586 zero_on_left = false;
1587 }
1588
1589 /* a is - 0 + - 0 +
1590 * (a < 0) T F F ( a < 0) T F F
1591 * (0 < a) F F T (-a < 0) F F T
1592 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1593 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1594 * (a > 0) F F T (-a < 0) F F T
1595 * (0 > a) T F F ( a < 0) T F F
1596 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1597 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1598 *
1599 * Note that exchanging the order of 0 and 'a' in the comparison simply
1600 * means that the value of 'a' should be negated.
1601 */
1602 if (src_ir != ir) {
1603 switch (expr->operation) {
1604 case ir_binop_less:
1605 switch_order = false;
1606 negate = zero_on_left;
1607 break;
1608
1609 case ir_binop_greater:
1610 switch_order = false;
1611 negate = !zero_on_left;
1612 break;
1613
1614 case ir_binop_lequal:
1615 switch_order = true;
1616 negate = !zero_on_left;
1617 break;
1618
1619 case ir_binop_gequal:
1620 switch_order = true;
1621 negate = zero_on_left;
1622 break;
1623
1624 default:
1625 /* This isn't the right kind of comparison afterall, so make sure
1626 * the whole condition is visited.
1627 */
1628 src_ir = ir;
1629 break;
1630 }
1631 }
1632 }
1633
1634 src_ir->accept(this);
1635
1636 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1637 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1638 * choose which value OPCODE_CMP produces without an extra instruction
1639 * computing the condition.
1640 */
1641 if (negate)
1642 this->result.negate = ~this->result.negate;
1643
1644 return switch_order;
1645 }
1646
1647 void
1648 ir_to_mesa_visitor::visit(ir_assignment *ir)
1649 {
1650 dst_reg l;
1651 src_reg r;
1652 int i;
1653
1654 ir->rhs->accept(this);
1655 r = this->result;
1656
1657 l = get_assignment_lhs(ir->lhs, this);
1658
1659 /* FINISHME: This should really set to the correct maximal writemask for each
1660 * FINISHME: component written (in the loops below). This case can only
1661 * FINISHME: occur for matrices, arrays, and structures.
1662 */
1663 if (ir->write_mask == 0) {
1664 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
1665 l.writemask = WRITEMASK_XYZW;
1666 } else if (ir->lhs->type->is_scalar()) {
1667 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1668 * FINISHME: W component of fragment shader output zero, work correctly.
1669 */
1670 l.writemask = WRITEMASK_XYZW;
1671 } else {
1672 int swizzles[4];
1673 int first_enabled_chan = 0;
1674 int rhs_chan = 0;
1675
1676 assert(ir->lhs->type->is_vector());
1677 l.writemask = ir->write_mask;
1678
1679 for (int i = 0; i < 4; i++) {
1680 if (l.writemask & (1 << i)) {
1681 first_enabled_chan = GET_SWZ(r.swizzle, i);
1682 break;
1683 }
1684 }
1685
1686 /* Swizzle a small RHS vector into the channels being written.
1687 *
1688 * glsl ir treats write_mask as dictating how many channels are
1689 * present on the RHS while Mesa IR treats write_mask as just
1690 * showing which channels of the vec4 RHS get written.
1691 */
1692 for (int i = 0; i < 4; i++) {
1693 if (l.writemask & (1 << i))
1694 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
1695 else
1696 swizzles[i] = first_enabled_chan;
1697 }
1698 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
1699 swizzles[2], swizzles[3]);
1700 }
1701
1702 assert(l.file != PROGRAM_UNDEFINED);
1703 assert(r.file != PROGRAM_UNDEFINED);
1704
1705 if (ir->condition) {
1706 const bool switch_order = this->process_move_condition(ir->condition);
1707 src_reg condition = this->result;
1708
1709 for (i = 0; i < type_size(ir->lhs->type); i++) {
1710 if (switch_order) {
1711 emit(ir, OPCODE_CMP, l, condition, src_reg(l), r);
1712 } else {
1713 emit(ir, OPCODE_CMP, l, condition, r, src_reg(l));
1714 }
1715
1716 l.index++;
1717 r.index++;
1718 }
1719 } else {
1720 for (i = 0; i < type_size(ir->lhs->type); i++) {
1721 emit(ir, OPCODE_MOV, l, r);
1722 l.index++;
1723 r.index++;
1724 }
1725 }
1726 }
1727
1728
1729 void
1730 ir_to_mesa_visitor::visit(ir_constant *ir)
1731 {
1732 src_reg src;
1733 GLfloat stack_vals[4] = { 0 };
1734 GLfloat *values = stack_vals;
1735 unsigned int i;
1736
1737 /* Unfortunately, 4 floats is all we can get into
1738 * _mesa_add_unnamed_constant. So, make a temp to store an
1739 * aggregate constant and move each constant value into it. If we
1740 * get lucky, copy propagation will eliminate the extra moves.
1741 */
1742
1743 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1744 src_reg temp_base = get_temp(ir->type);
1745 dst_reg temp = dst_reg(temp_base);
1746
1747 foreach_iter(exec_list_iterator, iter, ir->components) {
1748 ir_constant *field_value = (ir_constant *)iter.get();
1749 int size = type_size(field_value->type);
1750
1751 assert(size > 0);
1752
1753 field_value->accept(this);
1754 src = this->result;
1755
1756 for (i = 0; i < (unsigned int)size; i++) {
1757 emit(ir, OPCODE_MOV, temp, src);
1758
1759 src.index++;
1760 temp.index++;
1761 }
1762 }
1763 this->result = temp_base;
1764 return;
1765 }
1766
1767 if (ir->type->is_array()) {
1768 src_reg temp_base = get_temp(ir->type);
1769 dst_reg temp = dst_reg(temp_base);
1770 int size = type_size(ir->type->fields.array);
1771
1772 assert(size > 0);
1773
1774 for (i = 0; i < ir->type->length; i++) {
1775 ir->array_elements[i]->accept(this);
1776 src = this->result;
1777 for (int j = 0; j < size; j++) {
1778 emit(ir, OPCODE_MOV, temp, src);
1779
1780 src.index++;
1781 temp.index++;
1782 }
1783 }
1784 this->result = temp_base;
1785 return;
1786 }
1787
1788 if (ir->type->is_matrix()) {
1789 src_reg mat = get_temp(ir->type);
1790 dst_reg mat_column = dst_reg(mat);
1791
1792 for (i = 0; i < ir->type->matrix_columns; i++) {
1793 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
1794 values = &ir->value.f[i * ir->type->vector_elements];
1795
1796 src = src_reg(PROGRAM_CONSTANT, -1, NULL);
1797 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1798 (gl_constant_value *) values,
1799 ir->type->vector_elements,
1800 &src.swizzle);
1801 emit(ir, OPCODE_MOV, mat_column, src);
1802
1803 mat_column.index++;
1804 }
1805
1806 this->result = mat;
1807 return;
1808 }
1809
1810 src.file = PROGRAM_CONSTANT;
1811 switch (ir->type->base_type) {
1812 case GLSL_TYPE_FLOAT:
1813 values = &ir->value.f[0];
1814 break;
1815 case GLSL_TYPE_UINT:
1816 for (i = 0; i < ir->type->vector_elements; i++) {
1817 values[i] = ir->value.u[i];
1818 }
1819 break;
1820 case GLSL_TYPE_INT:
1821 for (i = 0; i < ir->type->vector_elements; i++) {
1822 values[i] = ir->value.i[i];
1823 }
1824 break;
1825 case GLSL_TYPE_BOOL:
1826 for (i = 0; i < ir->type->vector_elements; i++) {
1827 values[i] = ir->value.b[i];
1828 }
1829 break;
1830 default:
1831 assert(!"Non-float/uint/int/bool constant");
1832 }
1833
1834 this->result = src_reg(PROGRAM_CONSTANT, -1, ir->type);
1835 this->result.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1836 (gl_constant_value *) values,
1837 ir->type->vector_elements,
1838 &this->result.swizzle);
1839 }
1840
1841 function_entry *
1842 ir_to_mesa_visitor::get_function_signature(ir_function_signature *sig)
1843 {
1844 function_entry *entry;
1845
1846 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
1847 entry = (function_entry *)iter.get();
1848
1849 if (entry->sig == sig)
1850 return entry;
1851 }
1852
1853 entry = ralloc(mem_ctx, function_entry);
1854 entry->sig = sig;
1855 entry->sig_id = this->next_signature_id++;
1856 entry->bgn_inst = NULL;
1857
1858 /* Allocate storage for all the parameters. */
1859 foreach_iter(exec_list_iterator, iter, sig->parameters) {
1860 ir_variable *param = (ir_variable *)iter.get();
1861 variable_storage *storage;
1862
1863 storage = find_variable_storage(param);
1864 assert(!storage);
1865
1866 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
1867 this->next_temp);
1868 this->variables.push_tail(storage);
1869
1870 this->next_temp += type_size(param->type);
1871 }
1872
1873 if (!sig->return_type->is_void()) {
1874 entry->return_reg = get_temp(sig->return_type);
1875 } else {
1876 entry->return_reg = undef_src;
1877 }
1878
1879 this->function_signatures.push_tail(entry);
1880 return entry;
1881 }
1882
1883 void
1884 ir_to_mesa_visitor::visit(ir_call *ir)
1885 {
1886 ir_to_mesa_instruction *call_inst;
1887 ir_function_signature *sig = ir->get_callee();
1888 function_entry *entry = get_function_signature(sig);
1889 int i;
1890
1891 /* Process in parameters. */
1892 exec_list_iterator sig_iter = sig->parameters.iterator();
1893 foreach_iter(exec_list_iterator, iter, *ir) {
1894 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
1895 ir_variable *param = (ir_variable *)sig_iter.get();
1896
1897 if (param->mode == ir_var_in ||
1898 param->mode == ir_var_inout) {
1899 variable_storage *storage = find_variable_storage(param);
1900 assert(storage);
1901
1902 param_rval->accept(this);
1903 src_reg r = this->result;
1904
1905 dst_reg l;
1906 l.file = storage->file;
1907 l.index = storage->index;
1908 l.reladdr = NULL;
1909 l.writemask = WRITEMASK_XYZW;
1910 l.cond_mask = COND_TR;
1911
1912 for (i = 0; i < type_size(param->type); i++) {
1913 emit(ir, OPCODE_MOV, l, r);
1914 l.index++;
1915 r.index++;
1916 }
1917 }
1918
1919 sig_iter.next();
1920 }
1921 assert(!sig_iter.has_next());
1922
1923 /* Emit call instruction */
1924 call_inst = emit(ir, OPCODE_CAL);
1925 call_inst->function = entry;
1926
1927 /* Process out parameters. */
1928 sig_iter = sig->parameters.iterator();
1929 foreach_iter(exec_list_iterator, iter, *ir) {
1930 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
1931 ir_variable *param = (ir_variable *)sig_iter.get();
1932
1933 if (param->mode == ir_var_out ||
1934 param->mode == ir_var_inout) {
1935 variable_storage *storage = find_variable_storage(param);
1936 assert(storage);
1937
1938 src_reg r;
1939 r.file = storage->file;
1940 r.index = storage->index;
1941 r.reladdr = NULL;
1942 r.swizzle = SWIZZLE_NOOP;
1943 r.negate = 0;
1944
1945 param_rval->accept(this);
1946 dst_reg l = dst_reg(this->result);
1947
1948 for (i = 0; i < type_size(param->type); i++) {
1949 emit(ir, OPCODE_MOV, l, r);
1950 l.index++;
1951 r.index++;
1952 }
1953 }
1954
1955 sig_iter.next();
1956 }
1957 assert(!sig_iter.has_next());
1958
1959 /* Process return value. */
1960 this->result = entry->return_reg;
1961 }
1962
1963 void
1964 ir_to_mesa_visitor::visit(ir_texture *ir)
1965 {
1966 src_reg result_src, coord, lod_info, projector, dx, dy;
1967 dst_reg result_dst, coord_dst;
1968 ir_to_mesa_instruction *inst = NULL;
1969 prog_opcode opcode = OPCODE_NOP;
1970
1971 ir->coordinate->accept(this);
1972
1973 /* Put our coords in a temp. We'll need to modify them for shadow,
1974 * projection, or LOD, so the only case we'd use it as is is if
1975 * we're doing plain old texturing. Mesa IR optimization should
1976 * handle cleaning up our mess in that case.
1977 */
1978 coord = get_temp(glsl_type::vec4_type);
1979 coord_dst = dst_reg(coord);
1980 emit(ir, OPCODE_MOV, coord_dst, this->result);
1981
1982 if (ir->projector) {
1983 ir->projector->accept(this);
1984 projector = this->result;
1985 }
1986
1987 /* Storage for our result. Ideally for an assignment we'd be using
1988 * the actual storage for the result here, instead.
1989 */
1990 result_src = get_temp(glsl_type::vec4_type);
1991 result_dst = dst_reg(result_src);
1992
1993 switch (ir->op) {
1994 case ir_tex:
1995 opcode = OPCODE_TEX;
1996 break;
1997 case ir_txb:
1998 opcode = OPCODE_TXB;
1999 ir->lod_info.bias->accept(this);
2000 lod_info = this->result;
2001 break;
2002 case ir_txl:
2003 opcode = OPCODE_TXL;
2004 ir->lod_info.lod->accept(this);
2005 lod_info = this->result;
2006 break;
2007 case ir_txd:
2008 opcode = OPCODE_TXD;
2009 ir->lod_info.grad.dPdx->accept(this);
2010 dx = this->result;
2011 ir->lod_info.grad.dPdy->accept(this);
2012 dy = this->result;
2013 break;
2014 case ir_txf:
2015 assert(!"GLSL 1.30 features unsupported");
2016 break;
2017 }
2018
2019 if (ir->projector) {
2020 if (opcode == OPCODE_TEX) {
2021 /* Slot the projector in as the last component of the coord. */
2022 coord_dst.writemask = WRITEMASK_W;
2023 emit(ir, OPCODE_MOV, coord_dst, projector);
2024 coord_dst.writemask = WRITEMASK_XYZW;
2025 opcode = OPCODE_TXP;
2026 } else {
2027 src_reg coord_w = coord;
2028 coord_w.swizzle = SWIZZLE_WWWW;
2029
2030 /* For the other TEX opcodes there's no projective version
2031 * since the last slot is taken up by lod info. Do the
2032 * projective divide now.
2033 */
2034 coord_dst.writemask = WRITEMASK_W;
2035 emit(ir, OPCODE_RCP, coord_dst, projector);
2036
2037 /* In the case where we have to project the coordinates "by hand,"
2038 * the shadow comparitor value must also be projected.
2039 */
2040 src_reg tmp_src = coord;
2041 if (ir->shadow_comparitor) {
2042 /* Slot the shadow value in as the second to last component of the
2043 * coord.
2044 */
2045 ir->shadow_comparitor->accept(this);
2046
2047 tmp_src = get_temp(glsl_type::vec4_type);
2048 dst_reg tmp_dst = dst_reg(tmp_src);
2049
2050 tmp_dst.writemask = WRITEMASK_Z;
2051 emit(ir, OPCODE_MOV, tmp_dst, this->result);
2052
2053 tmp_dst.writemask = WRITEMASK_XY;
2054 emit(ir, OPCODE_MOV, tmp_dst, coord);
2055 }
2056
2057 coord_dst.writemask = WRITEMASK_XYZ;
2058 emit(ir, OPCODE_MUL, coord_dst, tmp_src, coord_w);
2059
2060 coord_dst.writemask = WRITEMASK_XYZW;
2061 coord.swizzle = SWIZZLE_XYZW;
2062 }
2063 }
2064
2065 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2066 * comparitor was put in the correct place (and projected) by the code,
2067 * above, that handles by-hand projection.
2068 */
2069 if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) {
2070 /* Slot the shadow value in as the second to last component of the
2071 * coord.
2072 */
2073 ir->shadow_comparitor->accept(this);
2074 coord_dst.writemask = WRITEMASK_Z;
2075 emit(ir, OPCODE_MOV, coord_dst, this->result);
2076 coord_dst.writemask = WRITEMASK_XYZW;
2077 }
2078
2079 if (opcode == OPCODE_TXL || opcode == OPCODE_TXB) {
2080 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2081 coord_dst.writemask = WRITEMASK_W;
2082 emit(ir, OPCODE_MOV, coord_dst, lod_info);
2083 coord_dst.writemask = WRITEMASK_XYZW;
2084 }
2085
2086 if (opcode == OPCODE_TXD)
2087 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2088 else
2089 inst = emit(ir, opcode, result_dst, coord);
2090
2091 if (ir->shadow_comparitor)
2092 inst->tex_shadow = GL_TRUE;
2093
2094 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2095 this->shader_program,
2096 this->prog);
2097
2098 const glsl_type *sampler_type = ir->sampler->type;
2099
2100 switch (sampler_type->sampler_dimensionality) {
2101 case GLSL_SAMPLER_DIM_1D:
2102 inst->tex_target = (sampler_type->sampler_array)
2103 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2104 break;
2105 case GLSL_SAMPLER_DIM_2D:
2106 inst->tex_target = (sampler_type->sampler_array)
2107 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2108 break;
2109 case GLSL_SAMPLER_DIM_3D:
2110 inst->tex_target = TEXTURE_3D_INDEX;
2111 break;
2112 case GLSL_SAMPLER_DIM_CUBE:
2113 inst->tex_target = TEXTURE_CUBE_INDEX;
2114 break;
2115 case GLSL_SAMPLER_DIM_RECT:
2116 inst->tex_target = TEXTURE_RECT_INDEX;
2117 break;
2118 case GLSL_SAMPLER_DIM_BUF:
2119 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2120 break;
2121 default:
2122 assert(!"Should not get here.");
2123 }
2124
2125 this->result = result_src;
2126 }
2127
2128 void
2129 ir_to_mesa_visitor::visit(ir_return *ir)
2130 {
2131 if (ir->get_value()) {
2132 dst_reg l;
2133 int i;
2134
2135 assert(current_function);
2136
2137 ir->get_value()->accept(this);
2138 src_reg r = this->result;
2139
2140 l = dst_reg(current_function->return_reg);
2141
2142 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2143 emit(ir, OPCODE_MOV, l, r);
2144 l.index++;
2145 r.index++;
2146 }
2147 }
2148
2149 emit(ir, OPCODE_RET);
2150 }
2151
2152 void
2153 ir_to_mesa_visitor::visit(ir_discard *ir)
2154 {
2155 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2156
2157 if (ir->condition) {
2158 ir->condition->accept(this);
2159 this->result.negate = ~this->result.negate;
2160 emit(ir, OPCODE_KIL, undef_dst, this->result);
2161 } else {
2162 emit(ir, OPCODE_KIL_NV);
2163 }
2164
2165 fp->UsesKill = GL_TRUE;
2166 }
2167
2168 void
2169 ir_to_mesa_visitor::visit(ir_if *ir)
2170 {
2171 ir_to_mesa_instruction *cond_inst, *if_inst;
2172 ir_to_mesa_instruction *prev_inst;
2173
2174 prev_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2175
2176 ir->condition->accept(this);
2177 assert(this->result.file != PROGRAM_UNDEFINED);
2178
2179 if (this->options->EmitCondCodes) {
2180 cond_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2181
2182 /* See if we actually generated any instruction for generating
2183 * the condition. If not, then cook up a move to a temp so we
2184 * have something to set cond_update on.
2185 */
2186 if (cond_inst == prev_inst) {
2187 src_reg temp = get_temp(glsl_type::bool_type);
2188 cond_inst = emit(ir->condition, OPCODE_MOV, dst_reg(temp), result);
2189 }
2190 cond_inst->cond_update = GL_TRUE;
2191
2192 if_inst = emit(ir->condition, OPCODE_IF);
2193 if_inst->dst.cond_mask = COND_NE;
2194 } else {
2195 if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
2196 }
2197
2198 this->instructions.push_tail(if_inst);
2199
2200 visit_exec_list(&ir->then_instructions, this);
2201
2202 if (!ir->else_instructions.is_empty()) {
2203 emit(ir->condition, OPCODE_ELSE);
2204 visit_exec_list(&ir->else_instructions, this);
2205 }
2206
2207 if_inst = emit(ir->condition, OPCODE_ENDIF);
2208 }
2209
2210 ir_to_mesa_visitor::ir_to_mesa_visitor()
2211 {
2212 result.file = PROGRAM_UNDEFINED;
2213 next_temp = 1;
2214 next_signature_id = 1;
2215 current_function = NULL;
2216 mem_ctx = ralloc_context(NULL);
2217 }
2218
2219 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2220 {
2221 ralloc_free(mem_ctx);
2222 }
2223
2224 static struct prog_src_register
2225 mesa_src_reg_from_ir_src_reg(src_reg reg)
2226 {
2227 struct prog_src_register mesa_reg;
2228
2229 mesa_reg.File = reg.file;
2230 assert(reg.index < (1 << INST_INDEX_BITS));
2231 mesa_reg.Index = reg.index;
2232 mesa_reg.Swizzle = reg.swizzle;
2233 mesa_reg.RelAddr = reg.reladdr != NULL;
2234 mesa_reg.Negate = reg.negate;
2235 mesa_reg.Abs = 0;
2236 mesa_reg.HasIndex2 = GL_FALSE;
2237 mesa_reg.RelAddr2 = 0;
2238 mesa_reg.Index2 = 0;
2239
2240 return mesa_reg;
2241 }
2242
2243 static void
2244 set_branchtargets(ir_to_mesa_visitor *v,
2245 struct prog_instruction *mesa_instructions,
2246 int num_instructions)
2247 {
2248 int if_count = 0, loop_count = 0;
2249 int *if_stack, *loop_stack;
2250 int if_stack_pos = 0, loop_stack_pos = 0;
2251 int i, j;
2252
2253 for (i = 0; i < num_instructions; i++) {
2254 switch (mesa_instructions[i].Opcode) {
2255 case OPCODE_IF:
2256 if_count++;
2257 break;
2258 case OPCODE_BGNLOOP:
2259 loop_count++;
2260 break;
2261 case OPCODE_BRK:
2262 case OPCODE_CONT:
2263 mesa_instructions[i].BranchTarget = -1;
2264 break;
2265 default:
2266 break;
2267 }
2268 }
2269
2270 if_stack = rzalloc_array(v->mem_ctx, int, if_count);
2271 loop_stack = rzalloc_array(v->mem_ctx, int, loop_count);
2272
2273 for (i = 0; i < num_instructions; i++) {
2274 switch (mesa_instructions[i].Opcode) {
2275 case OPCODE_IF:
2276 if_stack[if_stack_pos] = i;
2277 if_stack_pos++;
2278 break;
2279 case OPCODE_ELSE:
2280 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2281 if_stack[if_stack_pos - 1] = i;
2282 break;
2283 case OPCODE_ENDIF:
2284 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2285 if_stack_pos--;
2286 break;
2287 case OPCODE_BGNLOOP:
2288 loop_stack[loop_stack_pos] = i;
2289 loop_stack_pos++;
2290 break;
2291 case OPCODE_ENDLOOP:
2292 loop_stack_pos--;
2293 /* Rewrite any breaks/conts at this nesting level (haven't
2294 * already had a BranchTarget assigned) to point to the end
2295 * of the loop.
2296 */
2297 for (j = loop_stack[loop_stack_pos]; j < i; j++) {
2298 if (mesa_instructions[j].Opcode == OPCODE_BRK ||
2299 mesa_instructions[j].Opcode == OPCODE_CONT) {
2300 if (mesa_instructions[j].BranchTarget == -1) {
2301 mesa_instructions[j].BranchTarget = i;
2302 }
2303 }
2304 }
2305 /* The loop ends point at each other. */
2306 mesa_instructions[i].BranchTarget = loop_stack[loop_stack_pos];
2307 mesa_instructions[loop_stack[loop_stack_pos]].BranchTarget = i;
2308 break;
2309 case OPCODE_CAL:
2310 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
2311 function_entry *entry = (function_entry *)iter.get();
2312
2313 if (entry->sig_id == mesa_instructions[i].BranchTarget) {
2314 mesa_instructions[i].BranchTarget = entry->inst;
2315 break;
2316 }
2317 }
2318 break;
2319 default:
2320 break;
2321 }
2322 }
2323 }
2324
2325 static void
2326 print_program(struct prog_instruction *mesa_instructions,
2327 ir_instruction **mesa_instruction_annotation,
2328 int num_instructions)
2329 {
2330 ir_instruction *last_ir = NULL;
2331 int i;
2332 int indent = 0;
2333
2334 for (i = 0; i < num_instructions; i++) {
2335 struct prog_instruction *mesa_inst = mesa_instructions + i;
2336 ir_instruction *ir = mesa_instruction_annotation[i];
2337
2338 fprintf(stdout, "%3d: ", i);
2339
2340 if (last_ir != ir && ir) {
2341 int j;
2342
2343 for (j = 0; j < indent; j++) {
2344 fprintf(stdout, " ");
2345 }
2346 ir->print();
2347 printf("\n");
2348 last_ir = ir;
2349
2350 fprintf(stdout, " "); /* line number spacing. */
2351 }
2352
2353 indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
2354 PROG_PRINT_DEBUG, NULL);
2355 }
2356 }
2357
2358
2359 /**
2360 * Count resources used by the given gpu program (number of texture
2361 * samplers, etc).
2362 */
2363 static void
2364 count_resources(struct gl_program *prog)
2365 {
2366 unsigned int i;
2367
2368 prog->SamplersUsed = 0;
2369
2370 for (i = 0; i < prog->NumInstructions; i++) {
2371 struct prog_instruction *inst = &prog->Instructions[i];
2372
2373 if (_mesa_is_tex_instruction(inst->Opcode)) {
2374 prog->SamplerTargets[inst->TexSrcUnit] =
2375 (gl_texture_index)inst->TexSrcTarget;
2376 prog->SamplersUsed |= 1 << inst->TexSrcUnit;
2377 if (inst->TexShadow) {
2378 prog->ShadowSamplers |= 1 << inst->TexSrcUnit;
2379 }
2380 }
2381 }
2382
2383 _mesa_update_shader_textures_used(prog);
2384 }
2385
2386
2387 /**
2388 * Check if the given vertex/fragment/shader program is within the
2389 * resource limits of the context (number of texture units, etc).
2390 * If any of those checks fail, record a linker error.
2391 *
2392 * XXX more checks are needed...
2393 */
2394 static void
2395 check_resources(const struct gl_context *ctx,
2396 struct gl_shader_program *shader_program,
2397 struct gl_program *prog)
2398 {
2399 switch (prog->Target) {
2400 case GL_VERTEX_PROGRAM_ARB:
2401 if (_mesa_bitcount(prog->SamplersUsed) >
2402 ctx->Const.MaxVertexTextureImageUnits) {
2403 linker_error(shader_program,
2404 "Too many vertex shader texture samplers");
2405 }
2406 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2407 linker_error(shader_program, "Too many vertex shader constants");
2408 }
2409 break;
2410 case MESA_GEOMETRY_PROGRAM:
2411 if (_mesa_bitcount(prog->SamplersUsed) >
2412 ctx->Const.MaxGeometryTextureImageUnits) {
2413 linker_error(shader_program,
2414 "Too many geometry shader texture samplers");
2415 }
2416 if (prog->Parameters->NumParameters >
2417 MAX_GEOMETRY_UNIFORM_COMPONENTS / 4) {
2418 linker_error(shader_program, "Too many geometry shader constants");
2419 }
2420 break;
2421 case GL_FRAGMENT_PROGRAM_ARB:
2422 if (_mesa_bitcount(prog->SamplersUsed) >
2423 ctx->Const.MaxTextureImageUnits) {
2424 linker_error(shader_program,
2425 "Too many fragment shader texture samplers");
2426 }
2427 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2428 linker_error(shader_program, "Too many fragment shader constants");
2429 }
2430 break;
2431 default:
2432 _mesa_problem(ctx, "unexpected program type in check_resources()");
2433 }
2434 }
2435
2436
2437
2438 struct uniform_sort {
2439 struct gl_uniform *u;
2440 int pos;
2441 };
2442
2443 /* The shader_program->Uniforms list is almost sorted in increasing
2444 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2445 * uniforms shared between targets. We need to add parameters in
2446 * increasing order for the targets.
2447 */
2448 static int
2449 sort_uniforms(const void *a, const void *b)
2450 {
2451 struct uniform_sort *u1 = (struct uniform_sort *)a;
2452 struct uniform_sort *u2 = (struct uniform_sort *)b;
2453
2454 return u1->pos - u2->pos;
2455 }
2456
2457 /* Add the uniforms to the parameters. The linker chose locations
2458 * in our parameters lists (which weren't created yet), which the
2459 * uniforms code will use to poke values into our parameters list
2460 * when uniforms are updated.
2461 */
2462 static void
2463 add_uniforms_to_parameters_list(struct gl_shader_program *shader_program,
2464 struct gl_shader *shader,
2465 struct gl_program *prog)
2466 {
2467 unsigned int i;
2468 unsigned int next_sampler = 0, num_uniforms = 0;
2469 struct uniform_sort *sorted_uniforms;
2470
2471 sorted_uniforms = ralloc_array(NULL, struct uniform_sort,
2472 shader_program->Uniforms->NumUniforms);
2473
2474 for (i = 0; i < shader_program->Uniforms->NumUniforms; i++) {
2475 struct gl_uniform *uniform = shader_program->Uniforms->Uniforms + i;
2476 int parameter_index = -1;
2477
2478 switch (shader->Type) {
2479 case GL_VERTEX_SHADER:
2480 parameter_index = uniform->VertPos;
2481 break;
2482 case GL_FRAGMENT_SHADER:
2483 parameter_index = uniform->FragPos;
2484 break;
2485 case GL_GEOMETRY_SHADER:
2486 parameter_index = uniform->GeomPos;
2487 break;
2488 }
2489
2490 /* Only add uniforms used in our target. */
2491 if (parameter_index != -1) {
2492 sorted_uniforms[num_uniforms].pos = parameter_index;
2493 sorted_uniforms[num_uniforms].u = uniform;
2494 num_uniforms++;
2495 }
2496 }
2497
2498 qsort(sorted_uniforms, num_uniforms, sizeof(struct uniform_sort),
2499 sort_uniforms);
2500
2501 for (i = 0; i < num_uniforms; i++) {
2502 struct gl_uniform *uniform = sorted_uniforms[i].u;
2503 int parameter_index = sorted_uniforms[i].pos;
2504 const glsl_type *type = uniform->Type;
2505 unsigned int size;
2506
2507 if (type->is_vector() ||
2508 type->is_scalar()) {
2509 size = type->vector_elements;
2510 } else {
2511 size = type_size(type) * 4;
2512 }
2513
2514 gl_register_file file;
2515 if (type->is_sampler() ||
2516 (type->is_array() && type->fields.array->is_sampler())) {
2517 file = PROGRAM_SAMPLER;
2518 } else {
2519 file = PROGRAM_UNIFORM;
2520 }
2521
2522 GLint index = _mesa_lookup_parameter_index(prog->Parameters, -1,
2523 uniform->Name);
2524
2525 if (index < 0) {
2526 index = _mesa_add_parameter(prog->Parameters, file,
2527 uniform->Name, size, type->gl_type,
2528 NULL, NULL, 0x0);
2529
2530 /* Sampler uniform values are stored in prog->SamplerUnits,
2531 * and the entry in that array is selected by this index we
2532 * store in ParameterValues[].
2533 */
2534 if (file == PROGRAM_SAMPLER) {
2535 for (unsigned int j = 0; j < size / 4; j++)
2536 prog->Parameters->ParameterValues[index + j][0].f = next_sampler++;
2537 }
2538
2539 /* The location chosen in the Parameters list here (returned
2540 * from _mesa_add_uniform) has to match what the linker chose.
2541 */
2542 if (index != parameter_index) {
2543 linker_error(shader_program,
2544 "Allocation of uniform `%s' to target failed "
2545 "(%d vs %d)\n",
2546 uniform->Name, index, parameter_index);
2547 }
2548 }
2549 }
2550
2551 ralloc_free(sorted_uniforms);
2552 }
2553
2554 static void
2555 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2556 struct gl_shader_program *shader_program,
2557 const char *name, const glsl_type *type,
2558 ir_constant *val)
2559 {
2560 if (type->is_record()) {
2561 ir_constant *field_constant;
2562
2563 field_constant = (ir_constant *)val->components.get_head();
2564
2565 for (unsigned int i = 0; i < type->length; i++) {
2566 const glsl_type *field_type = type->fields.structure[i].type;
2567 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2568 type->fields.structure[i].name);
2569 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2570 field_type, field_constant);
2571 field_constant = (ir_constant *)field_constant->next;
2572 }
2573 return;
2574 }
2575
2576 int loc = _mesa_get_uniform_location(ctx, shader_program, name);
2577
2578 if (loc == -1) {
2579 linker_error(shader_program,
2580 "Couldn't find uniform for initializer %s\n", name);
2581 return;
2582 }
2583
2584 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2585 ir_constant *element;
2586 const glsl_type *element_type;
2587 if (type->is_array()) {
2588 element = val->array_elements[i];
2589 element_type = type->fields.array;
2590 } else {
2591 element = val;
2592 element_type = type;
2593 }
2594
2595 void *values;
2596
2597 if (element_type->base_type == GLSL_TYPE_BOOL) {
2598 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2599 for (unsigned int j = 0; j < element_type->components(); j++) {
2600 conv[j] = element->value.b[j];
2601 }
2602 values = (void *)conv;
2603 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2604 element_type->vector_elements,
2605 1);
2606 } else {
2607 values = &element->value;
2608 }
2609
2610 if (element_type->is_matrix()) {
2611 _mesa_uniform_matrix(ctx, shader_program,
2612 element_type->matrix_columns,
2613 element_type->vector_elements,
2614 loc, 1, GL_FALSE, (GLfloat *)values);
2615 loc += element_type->matrix_columns;
2616 } else {
2617 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2618 values, element_type->gl_type);
2619 loc += type_size(element_type);
2620 }
2621 }
2622 }
2623
2624 static void
2625 set_uniform_initializers(struct gl_context *ctx,
2626 struct gl_shader_program *shader_program)
2627 {
2628 void *mem_ctx = NULL;
2629
2630 for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
2631 struct gl_shader *shader = shader_program->_LinkedShaders[i];
2632
2633 if (shader == NULL)
2634 continue;
2635
2636 foreach_iter(exec_list_iterator, iter, *shader->ir) {
2637 ir_instruction *ir = (ir_instruction *)iter.get();
2638 ir_variable *var = ir->as_variable();
2639
2640 if (!var || var->mode != ir_var_uniform || !var->constant_value)
2641 continue;
2642
2643 if (!mem_ctx)
2644 mem_ctx = ralloc_context(NULL);
2645
2646 set_uniform_initializer(ctx, mem_ctx, shader_program, var->name,
2647 var->type, var->constant_value);
2648 }
2649 }
2650
2651 ralloc_free(mem_ctx);
2652 }
2653
2654 /*
2655 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2656 * channels for copy propagation and updates following instructions to
2657 * use the original versions.
2658 *
2659 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2660 * will occur. As an example, a TXP production before this pass:
2661 *
2662 * 0: MOV TEMP[1], INPUT[4].xyyy;
2663 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2664 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2665 *
2666 * and after:
2667 *
2668 * 0: MOV TEMP[1], INPUT[4].xyyy;
2669 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2670 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2671 *
2672 * which allows for dead code elimination on TEMP[1]'s writes.
2673 */
2674 void
2675 ir_to_mesa_visitor::copy_propagate(void)
2676 {
2677 ir_to_mesa_instruction **acp = rzalloc_array(mem_ctx,
2678 ir_to_mesa_instruction *,
2679 this->next_temp * 4);
2680 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
2681 int level = 0;
2682
2683 foreach_iter(exec_list_iterator, iter, this->instructions) {
2684 ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2685
2686 assert(inst->dst.file != PROGRAM_TEMPORARY
2687 || inst->dst.index < this->next_temp);
2688
2689 /* First, do any copy propagation possible into the src regs. */
2690 for (int r = 0; r < 3; r++) {
2691 ir_to_mesa_instruction *first = NULL;
2692 bool good = true;
2693 int acp_base = inst->src[r].index * 4;
2694
2695 if (inst->src[r].file != PROGRAM_TEMPORARY ||
2696 inst->src[r].reladdr)
2697 continue;
2698
2699 /* See if we can find entries in the ACP consisting of MOVs
2700 * from the same src register for all the swizzled channels
2701 * of this src register reference.
2702 */
2703 for (int i = 0; i < 4; i++) {
2704 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2705 ir_to_mesa_instruction *copy_chan = acp[acp_base + src_chan];
2706
2707 if (!copy_chan) {
2708 good = false;
2709 break;
2710 }
2711
2712 assert(acp_level[acp_base + src_chan] <= level);
2713
2714 if (!first) {
2715 first = copy_chan;
2716 } else {
2717 if (first->src[0].file != copy_chan->src[0].file ||
2718 first->src[0].index != copy_chan->src[0].index) {
2719 good = false;
2720 break;
2721 }
2722 }
2723 }
2724
2725 if (good) {
2726 /* We've now validated that we can copy-propagate to
2727 * replace this src register reference. Do it.
2728 */
2729 inst->src[r].file = first->src[0].file;
2730 inst->src[r].index = first->src[0].index;
2731
2732 int swizzle = 0;
2733 for (int i = 0; i < 4; i++) {
2734 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2735 ir_to_mesa_instruction *copy_inst = acp[acp_base + src_chan];
2736 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
2737 (3 * i));
2738 }
2739 inst->src[r].swizzle = swizzle;
2740 }
2741 }
2742
2743 switch (inst->op) {
2744 case OPCODE_BGNLOOP:
2745 case OPCODE_ENDLOOP:
2746 /* End of a basic block, clear the ACP entirely. */
2747 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2748 break;
2749
2750 case OPCODE_IF:
2751 ++level;
2752 break;
2753
2754 case OPCODE_ENDIF:
2755 case OPCODE_ELSE:
2756 /* Clear all channels written inside the block from the ACP, but
2757 * leaving those that were not touched.
2758 */
2759 for (int r = 0; r < this->next_temp; r++) {
2760 for (int c = 0; c < 4; c++) {
2761 if (!acp[4 * r + c])
2762 continue;
2763
2764 if (acp_level[4 * r + c] >= level)
2765 acp[4 * r + c] = NULL;
2766 }
2767 }
2768 if (inst->op == OPCODE_ENDIF)
2769 --level;
2770 break;
2771
2772 default:
2773 /* Continuing the block, clear any written channels from
2774 * the ACP.
2775 */
2776 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
2777 /* Any temporary might be written, so no copy propagation
2778 * across this instruction.
2779 */
2780 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2781 } else if (inst->dst.file == PROGRAM_OUTPUT &&
2782 inst->dst.reladdr) {
2783 /* Any output might be written, so no copy propagation
2784 * from outputs across this instruction.
2785 */
2786 for (int r = 0; r < this->next_temp; r++) {
2787 for (int c = 0; c < 4; c++) {
2788 if (!acp[4 * r + c])
2789 continue;
2790
2791 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
2792 acp[4 * r + c] = NULL;
2793 }
2794 }
2795 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
2796 inst->dst.file == PROGRAM_OUTPUT) {
2797 /* Clear where it's used as dst. */
2798 if (inst->dst.file == PROGRAM_TEMPORARY) {
2799 for (int c = 0; c < 4; c++) {
2800 if (inst->dst.writemask & (1 << c)) {
2801 acp[4 * inst->dst.index + c] = NULL;
2802 }
2803 }
2804 }
2805
2806 /* Clear where it's used as src. */
2807 for (int r = 0; r < this->next_temp; r++) {
2808 for (int c = 0; c < 4; c++) {
2809 if (!acp[4 * r + c])
2810 continue;
2811
2812 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
2813
2814 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
2815 acp[4 * r + c]->src[0].index == inst->dst.index &&
2816 inst->dst.writemask & (1 << src_chan))
2817 {
2818 acp[4 * r + c] = NULL;
2819 }
2820 }
2821 }
2822 }
2823 break;
2824 }
2825
2826 /* If this is a copy, add it to the ACP. */
2827 if (inst->op == OPCODE_MOV &&
2828 inst->dst.file == PROGRAM_TEMPORARY &&
2829 !inst->dst.reladdr &&
2830 !inst->saturate &&
2831 !inst->src[0].reladdr &&
2832 !inst->src[0].negate) {
2833 for (int i = 0; i < 4; i++) {
2834 if (inst->dst.writemask & (1 << i)) {
2835 acp[4 * inst->dst.index + i] = inst;
2836 acp_level[4 * inst->dst.index + i] = level;
2837 }
2838 }
2839 }
2840 }
2841
2842 ralloc_free(acp_level);
2843 ralloc_free(acp);
2844 }
2845
2846
2847 /**
2848 * Convert a shader's GLSL IR into a Mesa gl_program.
2849 */
2850 static struct gl_program *
2851 get_mesa_program(struct gl_context *ctx,
2852 struct gl_shader_program *shader_program,
2853 struct gl_shader *shader)
2854 {
2855 ir_to_mesa_visitor v;
2856 struct prog_instruction *mesa_instructions, *mesa_inst;
2857 ir_instruction **mesa_instruction_annotation;
2858 int i;
2859 struct gl_program *prog;
2860 GLenum target;
2861 const char *target_string;
2862 GLboolean progress;
2863 struct gl_shader_compiler_options *options =
2864 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
2865
2866 switch (shader->Type) {
2867 case GL_VERTEX_SHADER:
2868 target = GL_VERTEX_PROGRAM_ARB;
2869 target_string = "vertex";
2870 break;
2871 case GL_FRAGMENT_SHADER:
2872 target = GL_FRAGMENT_PROGRAM_ARB;
2873 target_string = "fragment";
2874 break;
2875 case GL_GEOMETRY_SHADER:
2876 target = GL_GEOMETRY_PROGRAM_NV;
2877 target_string = "geometry";
2878 break;
2879 default:
2880 assert(!"should not be reached");
2881 return NULL;
2882 }
2883
2884 validate_ir_tree(shader->ir);
2885
2886 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
2887 if (!prog)
2888 return NULL;
2889 prog->Parameters = _mesa_new_parameter_list();
2890 prog->Varying = _mesa_new_parameter_list();
2891 prog->Attributes = _mesa_new_parameter_list();
2892 v.ctx = ctx;
2893 v.prog = prog;
2894 v.shader_program = shader_program;
2895 v.options = options;
2896
2897 add_uniforms_to_parameters_list(shader_program, shader, prog);
2898
2899 /* Emit Mesa IR for main(). */
2900 visit_exec_list(shader->ir, &v);
2901 v.emit(NULL, OPCODE_END);
2902
2903 /* Now emit bodies for any functions that were used. */
2904 do {
2905 progress = GL_FALSE;
2906
2907 foreach_iter(exec_list_iterator, iter, v.function_signatures) {
2908 function_entry *entry = (function_entry *)iter.get();
2909
2910 if (!entry->bgn_inst) {
2911 v.current_function = entry;
2912
2913 entry->bgn_inst = v.emit(NULL, OPCODE_BGNSUB);
2914 entry->bgn_inst->function = entry;
2915
2916 visit_exec_list(&entry->sig->body, &v);
2917
2918 ir_to_mesa_instruction *last;
2919 last = (ir_to_mesa_instruction *)v.instructions.get_tail();
2920 if (last->op != OPCODE_RET)
2921 v.emit(NULL, OPCODE_RET);
2922
2923 ir_to_mesa_instruction *end;
2924 end = v.emit(NULL, OPCODE_ENDSUB);
2925 end->function = entry;
2926
2927 progress = GL_TRUE;
2928 }
2929 }
2930 } while (progress);
2931
2932 prog->NumTemporaries = v.next_temp;
2933
2934 int num_instructions = 0;
2935 foreach_iter(exec_list_iterator, iter, v.instructions) {
2936 num_instructions++;
2937 }
2938
2939 mesa_instructions =
2940 (struct prog_instruction *)calloc(num_instructions,
2941 sizeof(*mesa_instructions));
2942 mesa_instruction_annotation = ralloc_array(v.mem_ctx, ir_instruction *,
2943 num_instructions);
2944
2945 v.copy_propagate();
2946
2947 /* Convert ir_mesa_instructions into prog_instructions.
2948 */
2949 mesa_inst = mesa_instructions;
2950 i = 0;
2951 foreach_iter(exec_list_iterator, iter, v.instructions) {
2952 const ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2953
2954 mesa_inst->Opcode = inst->op;
2955 mesa_inst->CondUpdate = inst->cond_update;
2956 if (inst->saturate)
2957 mesa_inst->SaturateMode = SATURATE_ZERO_ONE;
2958 mesa_inst->DstReg.File = inst->dst.file;
2959 mesa_inst->DstReg.Index = inst->dst.index;
2960 mesa_inst->DstReg.CondMask = inst->dst.cond_mask;
2961 mesa_inst->DstReg.WriteMask = inst->dst.writemask;
2962 mesa_inst->DstReg.RelAddr = inst->dst.reladdr != NULL;
2963 mesa_inst->SrcReg[0] = mesa_src_reg_from_ir_src_reg(inst->src[0]);
2964 mesa_inst->SrcReg[1] = mesa_src_reg_from_ir_src_reg(inst->src[1]);
2965 mesa_inst->SrcReg[2] = mesa_src_reg_from_ir_src_reg(inst->src[2]);
2966 mesa_inst->TexSrcUnit = inst->sampler;
2967 mesa_inst->TexSrcTarget = inst->tex_target;
2968 mesa_inst->TexShadow = inst->tex_shadow;
2969 mesa_instruction_annotation[i] = inst->ir;
2970
2971 /* Set IndirectRegisterFiles. */
2972 if (mesa_inst->DstReg.RelAddr)
2973 prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File;
2974
2975 /* Update program's bitmask of indirectly accessed register files */
2976 for (unsigned src = 0; src < 3; src++)
2977 if (mesa_inst->SrcReg[src].RelAddr)
2978 prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File;
2979
2980 switch (mesa_inst->Opcode) {
2981 case OPCODE_IF:
2982 if (options->EmitNoIfs) {
2983 linker_warning(shader_program,
2984 "Couldn't flatten if-statement. "
2985 "This will likely result in software "
2986 "rasterization.\n");
2987 }
2988 break;
2989 case OPCODE_BGNLOOP:
2990 if (options->EmitNoLoops) {
2991 linker_warning(shader_program,
2992 "Couldn't unroll loop. "
2993 "This will likely result in software "
2994 "rasterization.\n");
2995 }
2996 break;
2997 case OPCODE_CONT:
2998 if (options->EmitNoCont) {
2999 linker_warning(shader_program,
3000 "Couldn't lower continue-statement. "
3001 "This will likely result in software "
3002 "rasterization.\n");
3003 }
3004 break;
3005 case OPCODE_BGNSUB:
3006 inst->function->inst = i;
3007 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3008 break;
3009 case OPCODE_ENDSUB:
3010 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3011 break;
3012 case OPCODE_CAL:
3013 mesa_inst->BranchTarget = inst->function->sig_id; /* rewritten later */
3014 break;
3015 case OPCODE_ARL:
3016 prog->NumAddressRegs = 1;
3017 break;
3018 default:
3019 break;
3020 }
3021
3022 mesa_inst++;
3023 i++;
3024
3025 if (!shader_program->LinkStatus)
3026 break;
3027 }
3028
3029 if (!shader_program->LinkStatus) {
3030 free(mesa_instructions);
3031 _mesa_reference_program(ctx, &shader->Program, NULL);
3032 return NULL;
3033 }
3034
3035 set_branchtargets(&v, mesa_instructions, num_instructions);
3036
3037 if (ctx->Shader.Flags & GLSL_DUMP) {
3038 printf("\n");
3039 printf("GLSL IR for linked %s program %d:\n", target_string,
3040 shader_program->Name);
3041 _mesa_print_ir(shader->ir, NULL);
3042 printf("\n");
3043 printf("\n");
3044 printf("Mesa IR for linked %s program %d:\n", target_string,
3045 shader_program->Name);
3046 print_program(mesa_instructions, mesa_instruction_annotation,
3047 num_instructions);
3048 }
3049
3050 prog->Instructions = mesa_instructions;
3051 prog->NumInstructions = num_instructions;
3052
3053 do_set_program_inouts(shader->ir, prog);
3054 count_resources(prog);
3055
3056 check_resources(ctx, shader_program, prog);
3057
3058 _mesa_reference_program(ctx, &shader->Program, prog);
3059
3060 if ((ctx->Shader.Flags & GLSL_NO_OPT) == 0) {
3061 _mesa_optimize_program(ctx, prog);
3062 }
3063
3064 return prog;
3065 }
3066
3067 extern "C" {
3068
3069 /**
3070 * Link a shader.
3071 * Called via ctx->Driver.LinkShader()
3072 * This actually involves converting GLSL IR into Mesa gl_programs with
3073 * code lowering and other optimizations.
3074 */
3075 GLboolean
3076 _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3077 {
3078 assert(prog->LinkStatus);
3079
3080 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3081 if (prog->_LinkedShaders[i] == NULL)
3082 continue;
3083
3084 bool progress;
3085 exec_list *ir = prog->_LinkedShaders[i]->ir;
3086 const struct gl_shader_compiler_options *options =
3087 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
3088
3089 do {
3090 progress = false;
3091
3092 /* Lowering */
3093 do_mat_op_to_vec(ir);
3094 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
3095 | LOG_TO_LOG2
3096 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
3097
3098 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
3099
3100 progress = do_common_optimization(ir, true, options->MaxUnrollIterations) || progress;
3101
3102 progress = lower_quadop_vector(ir, true) || progress;
3103
3104 if (options->EmitNoIfs) {
3105 progress = lower_discard(ir) || progress;
3106 progress = lower_if_to_cond_assign(ir) || progress;
3107 }
3108
3109 if (options->EmitNoNoise)
3110 progress = lower_noise(ir) || progress;
3111
3112 /* If there are forms of indirect addressing that the driver
3113 * cannot handle, perform the lowering pass.
3114 */
3115 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
3116 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
3117 progress =
3118 lower_variable_index_to_cond_assign(ir,
3119 options->EmitNoIndirectInput,
3120 options->EmitNoIndirectOutput,
3121 options->EmitNoIndirectTemp,
3122 options->EmitNoIndirectUniform)
3123 || progress;
3124
3125 progress = do_vec_index_to_cond_assign(ir) || progress;
3126 } while (progress);
3127
3128 validate_ir_tree(ir);
3129 }
3130
3131 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3132 struct gl_program *linked_prog;
3133
3134 if (prog->_LinkedShaders[i] == NULL)
3135 continue;
3136
3137 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
3138
3139 if (linked_prog) {
3140 bool ok = true;
3141
3142 switch (prog->_LinkedShaders[i]->Type) {
3143 case GL_VERTEX_SHADER:
3144 _mesa_reference_vertprog(ctx, &prog->VertexProgram,
3145 (struct gl_vertex_program *)linked_prog);
3146 ok = ctx->Driver.ProgramStringNotify(ctx, GL_VERTEX_PROGRAM_ARB,
3147 linked_prog);
3148 break;
3149 case GL_FRAGMENT_SHADER:
3150 _mesa_reference_fragprog(ctx, &prog->FragmentProgram,
3151 (struct gl_fragment_program *)linked_prog);
3152 ok = ctx->Driver.ProgramStringNotify(ctx, GL_FRAGMENT_PROGRAM_ARB,
3153 linked_prog);
3154 break;
3155 case GL_GEOMETRY_SHADER:
3156 _mesa_reference_geomprog(ctx, &prog->GeometryProgram,
3157 (struct gl_geometry_program *)linked_prog);
3158 ok = ctx->Driver.ProgramStringNotify(ctx, GL_GEOMETRY_PROGRAM_NV,
3159 linked_prog);
3160 break;
3161 }
3162 if (!ok) {
3163 return GL_FALSE;
3164 }
3165 }
3166
3167 _mesa_reference_program(ctx, &linked_prog, NULL);
3168 }
3169
3170 return GL_TRUE;
3171 }
3172
3173
3174 /**
3175 * Compile a GLSL shader. Called via glCompileShader().
3176 */
3177 void
3178 _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader)
3179 {
3180 struct _mesa_glsl_parse_state *state =
3181 new(shader) _mesa_glsl_parse_state(ctx, shader->Type, shader);
3182
3183 const char *source = shader->Source;
3184 /* Check if the user called glCompileShader without first calling
3185 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3186 */
3187 if (source == NULL) {
3188 shader->CompileStatus = GL_FALSE;
3189 return;
3190 }
3191
3192 state->error = preprocess(state, &source, &state->info_log,
3193 &ctx->Extensions, ctx->API);
3194
3195 if (ctx->Shader.Flags & GLSL_DUMP) {
3196 printf("GLSL source for %s shader %d:\n",
3197 _mesa_glsl_shader_target_name(state->target), shader->Name);
3198 printf("%s\n", shader->Source);
3199 }
3200
3201 if (!state->error) {
3202 _mesa_glsl_lexer_ctor(state, source);
3203 _mesa_glsl_parse(state);
3204 _mesa_glsl_lexer_dtor(state);
3205 }
3206
3207 ralloc_free(shader->ir);
3208 shader->ir = new(shader) exec_list;
3209 if (!state->error && !state->translation_unit.is_empty())
3210 _mesa_ast_to_hir(shader->ir, state);
3211
3212 if (!state->error && !shader->ir->is_empty()) {
3213 validate_ir_tree(shader->ir);
3214
3215 /* Do some optimization at compile time to reduce shader IR size
3216 * and reduce later work if the same shader is linked multiple times
3217 */
3218 while (do_common_optimization(shader->ir, false, 32))
3219 ;
3220
3221 validate_ir_tree(shader->ir);
3222 }
3223
3224 shader->symbols = state->symbols;
3225
3226 shader->CompileStatus = !state->error;
3227 shader->InfoLog = state->info_log;
3228 shader->Version = state->language_version;
3229 memcpy(shader->builtins_to_link, state->builtins_to_link,
3230 sizeof(shader->builtins_to_link[0]) * state->num_builtins_to_link);
3231 shader->num_builtins_to_link = state->num_builtins_to_link;
3232
3233 if (ctx->Shader.Flags & GLSL_LOG) {
3234 _mesa_write_shader_to_file(shader);
3235 }
3236
3237 if (ctx->Shader.Flags & GLSL_DUMP) {
3238 if (shader->CompileStatus) {
3239 printf("GLSL IR for shader %d:\n", shader->Name);
3240 _mesa_print_ir(shader->ir, NULL);
3241 printf("\n\n");
3242 } else {
3243 printf("GLSL shader %d failed to compile.\n", shader->Name);
3244 }
3245 if (shader->InfoLog && shader->InfoLog[0] != 0) {
3246 printf("GLSL shader %d info log:\n", shader->Name);
3247 printf("%s\n", shader->InfoLog);
3248 }
3249 }
3250
3251 /* Retain any live IR, but trash the rest. */
3252 reparent_ir(shader->ir, shader->ir);
3253
3254 ralloc_free(state);
3255 }
3256
3257
3258 /**
3259 * Link a GLSL shader program. Called via glLinkProgram().
3260 */
3261 void
3262 _mesa_glsl_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3263 {
3264 unsigned int i;
3265
3266 _mesa_clear_shader_program_data(ctx, prog);
3267
3268 prog->LinkStatus = GL_TRUE;
3269
3270 for (i = 0; i < prog->NumShaders; i++) {
3271 if (!prog->Shaders[i]->CompileStatus) {
3272 linker_error(prog, "linking with uncompiled shader");
3273 prog->LinkStatus = GL_FALSE;
3274 }
3275 }
3276
3277 prog->Varying = _mesa_new_parameter_list();
3278 _mesa_reference_vertprog(ctx, &prog->VertexProgram, NULL);
3279 _mesa_reference_fragprog(ctx, &prog->FragmentProgram, NULL);
3280 _mesa_reference_geomprog(ctx, &prog->GeometryProgram, NULL);
3281
3282 if (prog->LinkStatus) {
3283 link_shaders(ctx, prog);
3284 }
3285
3286 if (prog->LinkStatus) {
3287 if (!ctx->Driver.LinkShader(ctx, prog)) {
3288 prog->LinkStatus = GL_FALSE;
3289 }
3290 }
3291
3292 set_uniform_initializers(ctx, prog);
3293
3294 if (ctx->Shader.Flags & GLSL_DUMP) {
3295 if (!prog->LinkStatus) {
3296 printf("GLSL shader program %d failed to link\n", prog->Name);
3297 }
3298
3299 if (prog->InfoLog && prog->InfoLog[0] != 0) {
3300 printf("GLSL shader program %d info log:\n", prog->Name);
3301 printf("%s\n", prog->InfoLog);
3302 }
3303 }
3304 }
3305
3306 } /* extern "C" */