st/mesa: handle lowered IO in st_nir_assign_vs_in_locations
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/context.h"
35 #include "main/mtypes.h"
36 #include "main/errors.h"
37 #include "main/glspirv.h"
38 #include "main/shaderapi.h"
39 #include "main/uniforms.h"
40
41 #include "main/shaderobj.h"
42 #include "st_context.h"
43 #include "st_program.h"
44 #include "st_shader_cache.h"
45
46 #include "compiler/nir/nir.h"
47 #include "compiler/glsl_types.h"
48 #include "compiler/glsl/glsl_to_nir.h"
49 #include "compiler/glsl/gl_nir.h"
50 #include "compiler/glsl/gl_nir_linker.h"
51 #include "compiler/glsl/ir.h"
52 #include "compiler/glsl/ir_optimization.h"
53 #include "compiler/glsl/string_to_uint_map.h"
54
55 static int
56 type_size(const struct glsl_type *type)
57 {
58 return type->count_attribute_slots(false);
59 }
60
61 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
62 * may need to fix up varying slots so the glsl->nir path is aligned
63 * with the anything->tgsi->nir path.
64 */
65 static void
66 st_nir_fixup_varying_slots(struct st_context *st, nir_shader *shader,
67 nir_variable_mode mode)
68 {
69 if (st->needs_texcoord_semantic)
70 return;
71
72 nir_foreach_variable_with_modes(var, shader, mode) {
73 if (var->data.location >= VARYING_SLOT_VAR0) {
74 var->data.location += 9;
75 } else if (var->data.location == VARYING_SLOT_PNTC) {
76 var->data.location = VARYING_SLOT_VAR8;
77 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
78 (var->data.location <= VARYING_SLOT_TEX7)) {
79 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
80 }
81 }
82 }
83
84 static void
85 st_shader_gather_info(nir_shader *nir, struct gl_program *prog)
86 {
87 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
88
89 /* Copy the info we just generated back into the gl_program */
90 const char *prog_name = prog->info.name;
91 const char *prog_label = prog->info.label;
92 prog->info = nir->info;
93 prog->info.name = prog_name;
94 prog->info.label = prog_label;
95 }
96
97 /* input location assignment for VS inputs must be handled specially, so
98 * that it is aligned w/ st's vbo state.
99 * (This isn't the case with, for ex, FS inputs, which only need to agree
100 * on varying-slot w/ the VS outputs)
101 */
102 void
103 st_nir_assign_vs_in_locations(struct nir_shader *nir)
104 {
105 if (nir->info.stage != MESA_SHADER_VERTEX)
106 return;
107
108 nir->num_inputs = util_bitcount64(nir->info.inputs_read);
109
110 if (nir->info.io_lowered) {
111 /* Adjust the locations in load_input intrinsics. */
112 nir_foreach_function(f, nir) {
113 if (f->impl) {
114 nir_foreach_block(block, f->impl) {
115 nir_foreach_instr_safe(instr, block) {
116 if (instr->type == nir_instr_type_intrinsic) {
117 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
118
119 if (intrin->intrinsic == nir_intrinsic_load_input) {
120 unsigned base = nir_intrinsic_base(intrin);
121 unsigned loc = nir_intrinsic_io_semantics(intrin).location;
122
123 assert(nir->info.inputs_read & BITFIELD64_BIT(loc));
124 base = util_bitcount64(nir->info.inputs_read &
125 BITFIELD64_MASK(loc));
126 nir_intrinsic_set_base(intrin, base);
127 }
128 }
129 }
130 }
131 }
132 }
133 return;
134 }
135
136 bool removed_inputs = false;
137
138 nir_foreach_shader_in_variable_safe(var, nir) {
139 /* NIR already assigns dual-slot inputs to two locations so all we have
140 * to do is compact everything down.
141 */
142 if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
143 var->data.driver_location =
144 util_bitcount64(nir->info.inputs_read &
145 BITFIELD64_MASK(var->data.location));
146 } else {
147 /* Convert unused input variables to shader_temp (with no
148 * initialization), to avoid confusing drivers looking through the
149 * inputs array and expecting to find inputs with a driver_location
150 * set.
151 */
152 var->data.mode = nir_var_shader_temp;
153 removed_inputs = true;
154 }
155 }
156
157 /* Re-lower global vars, to deal with any dead VS inputs. */
158 if (removed_inputs)
159 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
160 }
161
162 static int
163 st_nir_lookup_parameter_index(struct gl_program *prog, nir_variable *var)
164 {
165 struct gl_program_parameter_list *params = prog->Parameters;
166
167 /* Lookup the first parameter that the uniform storage that match the
168 * variable location.
169 */
170 for (unsigned i = 0; i < params->NumParameters; i++) {
171 int index = params->Parameters[i].MainUniformStorageIndex;
172 if (index == var->data.location)
173 return i;
174 }
175
176 /* TODO: Handle this fallback for SPIR-V. We need this for GLSL e.g. in
177 * dEQP-GLES2.functional.uniform_api.random.3
178 */
179
180 /* is there a better way to do this? If we have something like:
181 *
182 * struct S {
183 * float f;
184 * vec4 v;
185 * };
186 * uniform S color;
187 *
188 * Then what we get in prog->Parameters looks like:
189 *
190 * 0: Name=color.f, Type=6, DataType=1406, Size=1
191 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
192 *
193 * So the name doesn't match up and _mesa_lookup_parameter_index()
194 * fails. In this case just find the first matching "color.*"..
195 *
196 * Note for arrays you could end up w/ color[n].f, for example.
197 *
198 * glsl_to_tgsi works slightly differently in this regard. It is
199 * emitting something more low level, so it just translates the
200 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
201 * it just calculates the additional offset of struct field members
202 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
203 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
204 * needs to work backwards to get base var loc from the param-list
205 * which already has them separated out.
206 */
207 if (!prog->sh.data->spirv) {
208 int namelen = strlen(var->name);
209 for (unsigned i = 0; i < params->NumParameters; i++) {
210 struct gl_program_parameter *p = &params->Parameters[i];
211 if ((strncmp(p->Name, var->name, namelen) == 0) &&
212 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
213 return i;
214 }
215 }
216 }
217
218 return -1;
219 }
220
221 static void
222 st_nir_assign_uniform_locations(struct gl_context *ctx,
223 struct gl_program *prog,
224 nir_shader *nir)
225 {
226 int shaderidx = 0;
227 int imageidx = 0;
228
229 nir_foreach_uniform_variable(uniform, nir) {
230 int loc;
231
232 const struct glsl_type *type = glsl_without_array(uniform->type);
233 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
234 if (type->is_sampler()) {
235 loc = shaderidx;
236 shaderidx += type_size(uniform->type);
237 } else {
238 loc = imageidx;
239 imageidx += type_size(uniform->type);
240 }
241 } else if (uniform->state_slots) {
242 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
243 /* This state reference has already been setup by ir_to_mesa, but we'll
244 * get the same index back here.
245 */
246
247 unsigned comps;
248 if (glsl_type_is_struct_or_ifc(type)) {
249 comps = 4;
250 } else {
251 comps = glsl_get_vector_elements(type);
252 }
253
254 if (ctx->Const.PackedDriverUniformStorage) {
255 loc = _mesa_add_sized_state_reference(prog->Parameters,
256 stateTokens, comps, false);
257 loc = prog->Parameters->ParameterValueOffset[loc];
258 } else {
259 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
260 }
261 } else {
262 loc = st_nir_lookup_parameter_index(prog, uniform);
263
264 /* We need to check that loc is not -1 here before accessing the
265 * array. It can be negative for example when we have a struct that
266 * only contains opaque types.
267 */
268 if (loc >= 0 && ctx->Const.PackedDriverUniformStorage) {
269 loc = prog->Parameters->ParameterValueOffset[loc];
270 }
271 }
272
273 uniform->data.driver_location = loc;
274 }
275 }
276
277 void
278 st_nir_opts(nir_shader *nir)
279 {
280 bool progress;
281
282 do {
283 progress = false;
284
285 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
286
287 /* Linking deals with unused inputs/outputs, but here we can remove
288 * things local to the shader in the hopes that we can cleanup other
289 * things. This pass will also remove variables with only stores, so we
290 * might be able to make progress after it.
291 */
292 NIR_PASS(progress, nir, nir_remove_dead_variables,
293 (nir_variable_mode)(nir_var_function_temp |
294 nir_var_shader_temp |
295 nir_var_mem_shared),
296 NULL);
297
298 NIR_PASS(progress, nir, nir_opt_copy_prop_vars);
299 NIR_PASS(progress, nir, nir_opt_dead_write_vars);
300
301 if (nir->options->lower_to_scalar) {
302 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
303 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
304 }
305
306 NIR_PASS_V(nir, nir_lower_alu);
307 NIR_PASS_V(nir, nir_lower_pack);
308 NIR_PASS(progress, nir, nir_copy_prop);
309 NIR_PASS(progress, nir, nir_opt_remove_phis);
310 NIR_PASS(progress, nir, nir_opt_dce);
311 if (nir_opt_trivial_continues(nir)) {
312 progress = true;
313 NIR_PASS(progress, nir, nir_copy_prop);
314 NIR_PASS(progress, nir, nir_opt_dce);
315 }
316 NIR_PASS(progress, nir, nir_opt_if, false);
317 NIR_PASS(progress, nir, nir_opt_dead_cf);
318 NIR_PASS(progress, nir, nir_opt_cse);
319 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
320
321 NIR_PASS(progress, nir, nir_opt_algebraic);
322 NIR_PASS(progress, nir, nir_opt_constant_folding);
323
324 if (!nir->info.flrp_lowered) {
325 unsigned lower_flrp =
326 (nir->options->lower_flrp16 ? 16 : 0) |
327 (nir->options->lower_flrp32 ? 32 : 0) |
328 (nir->options->lower_flrp64 ? 64 : 0);
329
330 if (lower_flrp) {
331 bool lower_flrp_progress = false;
332
333 NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp,
334 lower_flrp,
335 false /* always_precise */,
336 nir->options->lower_ffma);
337 if (lower_flrp_progress) {
338 NIR_PASS(progress, nir,
339 nir_opt_constant_folding);
340 progress = true;
341 }
342 }
343
344 /* Nothing should rematerialize any flrps, so we only need to do this
345 * lowering once.
346 */
347 nir->info.flrp_lowered = true;
348 }
349
350 NIR_PASS(progress, nir, nir_opt_undef);
351 NIR_PASS(progress, nir, nir_opt_conditional_discard);
352 if (nir->options->max_unroll_iterations) {
353 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
354 }
355 } while (progress);
356 }
357
358 static void
359 shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
360 {
361 assert(glsl_type_is_vector_or_scalar(type));
362
363 uint32_t comp_size = glsl_type_is_boolean(type)
364 ? 4 : glsl_get_bit_size(type) / 8;
365 unsigned length = glsl_get_vector_elements(type);
366 *size = comp_size * length,
367 *align = comp_size * (length == 3 ? 4 : length);
368 }
369
370 /* First third of converting glsl_to_nir.. this leaves things in a pre-
371 * nir_lower_io state, so that shader variants can more easily insert/
372 * replace variables, etc.
373 */
374 static void
375 st_nir_preprocess(struct st_context *st, struct gl_program *prog,
376 struct gl_shader_program *shader_program,
377 gl_shader_stage stage)
378 {
379 struct pipe_screen *screen = st->pipe->screen;
380 const nir_shader_compiler_options *options =
381 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
382 assert(options);
383 nir_shader *nir = prog->nir;
384
385 /* Set the next shader stage hint for VS and TES. */
386 if (!nir->info.separate_shader &&
387 (nir->info.stage == MESA_SHADER_VERTEX ||
388 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
389
390 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
391 unsigned stages_mask =
392 ~prev_stages & shader_program->data->linked_stages;
393
394 nir->info.next_stage = stages_mask ?
395 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
396 } else {
397 nir->info.next_stage = MESA_SHADER_FRAGMENT;
398 }
399
400 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
401 if (!st->ctx->SoftFP64 && nir->info.uses_64bit &&
402 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
403 st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options);
404 }
405
406 /* ES has strict SSO validation rules for shader IO matching so we can't
407 * remove dead IO until the resource list has been built. Here we skip
408 * removing them until later. This will potentially make the IO lowering
409 * calls below do a little extra work but should otherwise have no impact.
410 */
411 if (!_mesa_is_gles(st->ctx) || !nir->info.separate_shader) {
412 nir_variable_mode mask =
413 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
414 nir_remove_dead_variables(nir, mask, NULL);
415 }
416
417 if (options->lower_all_io_to_temps ||
418 nir->info.stage == MESA_SHADER_VERTEX ||
419 nir->info.stage == MESA_SHADER_GEOMETRY) {
420 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
421 nir_shader_get_entrypoint(nir),
422 true, true);
423 } else if (nir->info.stage == MESA_SHADER_FRAGMENT ||
424 !screen->get_param(screen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) {
425 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
426 nir_shader_get_entrypoint(nir),
427 true, false);
428 }
429
430 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
431 NIR_PASS_V(nir, nir_split_var_copies);
432 NIR_PASS_V(nir, nir_lower_var_copies);
433
434 if (options->lower_to_scalar) {
435 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
436 }
437
438 /* before buffers and vars_to_ssa */
439 NIR_PASS_V(nir, gl_nir_lower_images, true);
440
441 /* TODO: Change GLSL to not lower shared memory. */
442 if (prog->nir->info.stage == MESA_SHADER_COMPUTE &&
443 shader_program->data->spirv) {
444 NIR_PASS_V(prog->nir, nir_lower_vars_to_explicit_types,
445 nir_var_mem_shared, shared_type_info);
446 NIR_PASS_V(prog->nir, nir_lower_explicit_io,
447 nir_var_mem_shared, nir_address_format_32bit_offset);
448 }
449
450 /* Do a round of constant folding to clean up address calculations */
451 NIR_PASS_V(nir, nir_opt_constant_folding);
452 }
453
454 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
455 * info on varyings, etc after NIR link time opts have been applied.
456 */
457 static void
458 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
459 struct gl_shader_program *shader_program)
460 {
461 nir_shader *nir = prog->nir;
462 struct pipe_screen *screen = st->pipe->screen;
463
464 /* Make a pass over the IR to add state references for any built-in
465 * uniforms that are used. This has to be done now (during linking).
466 * Code generation doesn't happen until the first time this shader is
467 * used for rendering. Waiting until then to generate the parameters is
468 * too late. At that point, the values for the built-in uniforms won't
469 * get sent to the shader.
470 */
471 nir_foreach_uniform_variable(var, nir) {
472 const nir_state_slot *const slots = var->state_slots;
473 if (slots != NULL) {
474 const struct glsl_type *type = glsl_without_array(var->type);
475 for (unsigned int i = 0; i < var->num_state_slots; i++) {
476 unsigned comps;
477 if (glsl_type_is_struct_or_ifc(type)) {
478 comps = _mesa_program_state_value_size(slots[i].tokens);
479 } else {
480 comps = glsl_get_vector_elements(type);
481 }
482
483 if (st->ctx->Const.PackedDriverUniformStorage) {
484 _mesa_add_sized_state_reference(prog->Parameters,
485 slots[i].tokens,
486 comps, false);
487 } else {
488 _mesa_add_state_reference(prog->Parameters,
489 slots[i].tokens);
490 }
491 }
492 }
493 }
494
495 /* Avoid reallocation of the program parameter list, because the uniform
496 * storage is only associated with the original parameter list.
497 * This should be enough for Bitmap and DrawPixels constants.
498 */
499 _mesa_reserve_parameter_storage(prog->Parameters, 8);
500
501 /* This has to be done last. Any operation the can cause
502 * prog->ParameterValues to get reallocated (e.g., anything that adds a
503 * program constant) has to happen before creating this linkage.
504 */
505 _mesa_associate_uniform_storage(st->ctx, shader_program, prog);
506
507 st_set_prog_affected_state_flags(prog);
508
509 /* None of the builtins being lowered here can be produced by SPIR-V. See
510 * _mesa_builtin_uniform_desc. Also drivers that support packed uniform
511 * storage don't need to lower builtins.
512 */
513 if (!shader_program->data->spirv &&
514 !st->ctx->Const.PackedDriverUniformStorage)
515 NIR_PASS_V(nir, st_nir_lower_builtin);
516
517 if (!screen->get_param(screen, PIPE_CAP_NIR_ATOMICS_AS_DEREF))
518 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
519
520 NIR_PASS_V(nir, nir_opt_intrinsics);
521
522 /* Lower 64-bit ops. */
523 if (nir->options->lower_int64_options ||
524 nir->options->lower_doubles_options) {
525 bool lowered_64bit_ops = false;
526 if (nir->options->lower_doubles_options) {
527 NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles,
528 st->ctx->SoftFP64, nir->options->lower_doubles_options);
529 }
530 if (nir->options->lower_int64_options)
531 NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64);
532
533 if (lowered_64bit_ops)
534 st_nir_opts(nir);
535 }
536
537 nir_variable_mode mask = (nir_variable_mode)
538 (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp );
539 nir_remove_dead_variables(nir, mask, NULL);
540
541 if (!st->has_hw_atomics && !screen->get_param(screen, PIPE_CAP_NIR_ATOMICS_AS_DEREF))
542 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo);
543
544 st_finalize_nir_before_variants(nir);
545
546 if (st->allow_st_finalize_nir_twice)
547 st_finalize_nir(st, prog, shader_program, nir, true);
548
549 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
550 _mesa_log("\n");
551 _mesa_log("NIR IR for linked %s program %d:\n",
552 _mesa_shader_stage_to_string(prog->info.stage),
553 shader_program->Name);
554 nir_print_shader(nir, _mesa_get_log_file());
555 _mesa_log("\n\n");
556 }
557 }
558
559 static void
560 st_nir_vectorize_io(nir_shader *producer, nir_shader *consumer)
561 {
562 NIR_PASS_V(producer, nir_lower_io_to_vector, nir_var_shader_out);
563 NIR_PASS_V(producer, nir_opt_combine_stores, nir_var_shader_out);
564 NIR_PASS_V(consumer, nir_lower_io_to_vector, nir_var_shader_in);
565
566 if ((producer)->info.stage != MESA_SHADER_TESS_CTRL) {
567 /* Calling lower_io_to_vector creates output variable writes with
568 * write-masks. We only support these for TCS outputs, so for other
569 * stages, we need to call nir_lower_io_to_temporaries to get rid of
570 * them. This, in turn, creates temporary variables and extra
571 * copy_deref intrinsics that we need to clean up.
572 */
573 NIR_PASS_V(producer, nir_lower_io_to_temporaries,
574 nir_shader_get_entrypoint(producer), true, false);
575 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
576 NIR_PASS_V(producer, nir_split_var_copies);
577 NIR_PASS_V(producer, nir_lower_var_copies);
578 }
579 }
580
581 static void
582 st_nir_link_shaders(nir_shader *producer, nir_shader *consumer)
583 {
584 if (producer->options->lower_to_scalar) {
585 NIR_PASS_V(producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
586 NIR_PASS_V(consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
587 }
588
589 nir_lower_io_arrays_to_elements(producer, consumer);
590
591 st_nir_opts(producer);
592 st_nir_opts(consumer);
593
594 if (nir_link_opt_varyings(producer, consumer))
595 st_nir_opts(consumer);
596
597 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out, NULL);
598 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in, NULL);
599
600 if (nir_remove_unused_varyings(producer, consumer)) {
601 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
602 NIR_PASS_V(consumer, nir_lower_global_vars_to_local);
603
604 st_nir_opts(producer);
605 st_nir_opts(consumer);
606
607 /* Optimizations can cause varyings to become unused.
608 * nir_compact_varyings() depends on all dead varyings being removed so
609 * we need to call nir_remove_dead_variables() again here.
610 */
611 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out,
612 NULL);
613 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in,
614 NULL);
615 }
616 }
617
618 static void
619 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
620 {
621 struct gl_linked_shader *linked_tcs =
622 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
623 struct gl_linked_shader *linked_tes =
624 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
625
626 /* If we have a TCS and TES linked together, lower TES patch vertices. */
627 if (linked_tcs && linked_tes) {
628 nir_shader *tcs_nir = linked_tcs->Program->nir;
629 nir_shader *tes_nir = linked_tes->Program->nir;
630
631 /* The TES input vertex count is the TCS output vertex count,
632 * lower TES gl_PatchVerticesIn to a constant.
633 */
634 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
635 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
636 }
637 }
638
639 extern "C" {
640
641 void
642 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
643 struct gl_program *prog,
644 struct pipe_screen *pscreen)
645 {
646 if (nir->info.stage != MESA_SHADER_FRAGMENT)
647 return;
648
649 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
650 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
651 };
652 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
653
654 memcpy(wpos_options.state_tokens, wposTransformState,
655 sizeof(wpos_options.state_tokens));
656 wpos_options.fs_coord_origin_upper_left =
657 pscreen->get_param(pscreen,
658 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
659 wpos_options.fs_coord_origin_lower_left =
660 pscreen->get_param(pscreen,
661 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
662 wpos_options.fs_coord_pixel_center_integer =
663 pscreen->get_param(pscreen,
664 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
665 wpos_options.fs_coord_pixel_center_half_integer =
666 pscreen->get_param(pscreen,
667 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
668
669 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
670 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
671 _mesa_add_state_reference(prog->Parameters, wposTransformState);
672 }
673 }
674
675 bool
676 st_link_nir(struct gl_context *ctx,
677 struct gl_shader_program *shader_program)
678 {
679 struct st_context *st = st_context(ctx);
680 struct gl_linked_shader *linked_shader[MESA_SHADER_STAGES];
681 unsigned num_shaders = 0;
682
683 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
684 if (shader_program->_LinkedShaders[i])
685 linked_shader[num_shaders++] = shader_program->_LinkedShaders[i];
686 }
687
688 for (unsigned i = 0; i < num_shaders; i++) {
689 struct gl_linked_shader *shader = linked_shader[i];
690 const nir_shader_compiler_options *options =
691 st->ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions;
692 struct gl_program *prog = shader->Program;
693 struct st_program *stp = (struct st_program *)prog;
694
695 _mesa_copy_linked_program_data(shader_program, shader);
696
697 assert(!prog->nir);
698 stp->shader_program = shader_program;
699 stp->state.type = PIPE_SHADER_IR_NIR;
700
701 /* Parameters will be filled during NIR linking. */
702 prog->Parameters = _mesa_new_parameter_list();
703
704 if (shader_program->data->spirv) {
705 prog->nir = _mesa_spirv_to_nir(ctx, shader_program, shader->Stage, options);
706 } else {
707 validate_ir_tree(shader->ir);
708
709 if (ctx->_Shader->Flags & GLSL_DUMP) {
710 _mesa_log("\n");
711 _mesa_log("GLSL IR for linked %s program %d:\n",
712 _mesa_shader_stage_to_string(shader->Stage),
713 shader_program->Name);
714 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
715 _mesa_log("\n\n");
716 }
717
718 prog->nir = glsl_to_nir(st->ctx, shader_program, shader->Stage, options);
719 st_nir_preprocess(st, prog, shader_program, shader->Stage);
720 }
721
722 if (options->lower_to_scalar) {
723 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
724 }
725 }
726
727 st_lower_patch_vertices_in(shader_program);
728
729 /* For SPIR-V, we have to perform the NIR linking before applying
730 * st_nir_preprocess.
731 */
732 if (shader_program->data->spirv) {
733 static const gl_nir_linker_options opts = {
734 true /*fill_parameters */
735 };
736 if (!gl_nir_link_spirv(ctx, shader_program, &opts))
737 return GL_FALSE;
738
739 nir_build_program_resource_list(ctx, shader_program, true);
740
741 for (unsigned i = 0; i < num_shaders; i++) {
742 struct gl_linked_shader *shader = linked_shader[i];
743 struct gl_program *prog = shader->Program;
744
745 prog->ExternalSamplersUsed = gl_external_samplers(prog);
746 _mesa_update_shader_textures_used(shader_program, prog);
747 st_nir_preprocess(st, prog, shader_program, shader->Stage);
748 }
749 }
750
751 /* Linking the stages in the opposite order (from fragment to vertex)
752 * ensures that inter-shader outputs written to in an earlier stage
753 * are eliminated if they are (transitively) not used in a later
754 * stage.
755 */
756 for (int i = num_shaders - 2; i >= 0; i--) {
757 st_nir_link_shaders(linked_shader[i]->Program->nir,
758 linked_shader[i + 1]->Program->nir);
759 }
760 /* Linking shaders also optimizes them. Separate shaders, compute shaders
761 * and shaders with a fixed-func VS or FS that don't need linking are
762 * optimized here.
763 */
764 if (num_shaders == 1)
765 st_nir_opts(linked_shader[0]->Program->nir);
766
767 if (!shader_program->data->spirv) {
768 if (!gl_nir_link_glsl(ctx, shader_program))
769 return GL_FALSE;
770
771 for (unsigned i = 0; i < num_shaders; i++) {
772 struct gl_program *prog = linked_shader[i]->Program;
773 prog->ExternalSamplersUsed = gl_external_samplers(prog);
774 _mesa_update_shader_textures_used(shader_program, prog);
775 }
776
777 nir_build_program_resource_list(ctx, shader_program, false);
778 }
779
780 for (unsigned i = 0; i < num_shaders; i++) {
781 struct gl_linked_shader *shader = linked_shader[i];
782 nir_shader *nir = shader->Program->nir;
783
784 /* This needs to run after the initial pass of nir_lower_vars_to_ssa, so
785 * that the buffer indices are constants in nir where they where
786 * constants in GLSL. */
787 NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program);
788
789 /* Remap the locations to slots so those requiring two slots will occupy
790 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
791 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
792 * locations/slots 0 and 1, and attr1 will use location/slot 2
793 */
794 if (nir->info.stage == MESA_SHADER_VERTEX && !shader_program->data->spirv)
795 nir_remap_dual_slot_attributes(nir, &shader->Program->DualSlotInputs);
796
797 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
798 st->pipe->screen);
799
800 NIR_PASS_V(nir, nir_lower_system_values);
801 NIR_PASS_V(nir, nir_lower_compute_system_values, NULL);
802
803 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
804
805 st_shader_gather_info(nir, shader->Program);
806 if (shader->Stage == MESA_SHADER_VERTEX) {
807 /* NIR expands dual-slot inputs out to two locations. We need to
808 * compact things back down GL-style single-slot inputs to avoid
809 * confusing the state tracker.
810 */
811 shader->Program->info.inputs_read =
812 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
813 shader->Program->DualSlotInputs);
814 }
815
816 if (i >= 1) {
817 struct gl_program *prev_shader = linked_shader[i - 1]->Program;
818
819 /* We can't use nir_compact_varyings with transform feedback, since
820 * the pipe_stream_output->output_register field is based on the
821 * pre-compacted driver_locations.
822 */
823 if (!(prev_shader->sh.LinkedTransformFeedback &&
824 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
825 nir_compact_varyings(prev_shader->nir,
826 nir, ctx->API != API_OPENGL_COMPAT);
827
828 if (ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->vectorize_io)
829 st_nir_vectorize_io(prev_shader->nir, nir);
830 }
831 }
832
833 struct shader_info *prev_info = NULL;
834
835 for (unsigned i = 0; i < num_shaders; i++) {
836 struct gl_linked_shader *shader = linked_shader[i];
837 struct shader_info *info = &shader->Program->nir->info;
838
839 if (prev_info &&
840 ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->unify_interfaces) {
841 prev_info->outputs_written |= info->inputs_read &
842 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
843 info->inputs_read |= prev_info->outputs_written &
844 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
845
846 prev_info->patch_outputs_written |= info->patch_inputs_read;
847 info->patch_inputs_read |= prev_info->patch_outputs_written;
848 }
849 prev_info = info;
850 }
851
852 for (unsigned i = 0; i < num_shaders; i++) {
853 struct gl_linked_shader *shader = linked_shader[i];
854 struct gl_program *prog = shader->Program;
855 struct st_program *stp = st_program(prog);
856 st_glsl_to_nir_post_opts(st, prog, shader_program);
857
858 /* Initialize st_vertex_program members. */
859 if (shader->Stage == MESA_SHADER_VERTEX)
860 st_prepare_vertex_program(stp);
861
862 /* Get pipe_stream_output_info. */
863 if (shader->Stage == MESA_SHADER_VERTEX ||
864 shader->Stage == MESA_SHADER_TESS_EVAL ||
865 shader->Stage == MESA_SHADER_GEOMETRY)
866 st_translate_stream_output_info(prog);
867
868 st_store_ir_in_disk_cache(st, prog, true);
869
870 st_release_variants(st, stp);
871 st_finalize_program(st, prog);
872
873 /* The GLSL IR won't be needed anymore. */
874 ralloc_free(shader->ir);
875 shader->ir = NULL;
876 }
877
878 return true;
879 }
880
881 void
882 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
883 {
884 if (nir->info.stage == MESA_SHADER_VERTEX) {
885 nir_assign_io_var_locations(nir, nir_var_shader_out,
886 &nir->num_outputs,
887 nir->info.stage);
888 st_nir_fixup_varying_slots(st, nir, nir_var_shader_out);
889 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
890 nir->info.stage == MESA_SHADER_TESS_CTRL ||
891 nir->info.stage == MESA_SHADER_TESS_EVAL) {
892 nir_assign_io_var_locations(nir, nir_var_shader_in,
893 &nir->num_inputs,
894 nir->info.stage);
895 st_nir_fixup_varying_slots(st, nir, nir_var_shader_in);
896
897 nir_assign_io_var_locations(nir, nir_var_shader_out,
898 &nir->num_outputs,
899 nir->info.stage);
900 st_nir_fixup_varying_slots(st, nir, nir_var_shader_out);
901 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
902 nir_assign_io_var_locations(nir, nir_var_shader_in,
903 &nir->num_inputs,
904 nir->info.stage);
905 st_nir_fixup_varying_slots(st, nir, nir_var_shader_in);
906 nir_assign_io_var_locations(nir, nir_var_shader_out,
907 &nir->num_outputs,
908 nir->info.stage);
909 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
910 /* TODO? */
911 } else {
912 unreachable("invalid shader type");
913 }
914 }
915
916 void
917 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
918 struct gl_shader_program *shader_program,
919 struct gl_program *prog)
920 {
921 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
922 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
923 else
924 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
925
926 if (prog) {
927 prog->info.textures_used = nir->info.textures_used;
928 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
929 prog->info.images_used = nir->info.images_used;
930 }
931 }
932
933 static int
934 st_packed_uniforms_type_size(const struct glsl_type *type, bool bindless)
935 {
936 return glsl_count_dword_slots(type, bindless);
937 }
938
939 static int
940 st_unpacked_uniforms_type_size(const struct glsl_type *type, bool bindless)
941 {
942 return glsl_count_vec4_slots(type, false, bindless);
943 }
944
945 void
946 st_nir_lower_uniforms(struct st_context *st, nir_shader *nir)
947 {
948 if (st->ctx->Const.PackedDriverUniformStorage) {
949 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
950 st_packed_uniforms_type_size,
951 (nir_lower_io_options)0);
952 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
953 } else {
954 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
955 st_unpacked_uniforms_type_size,
956 (nir_lower_io_options)0);
957 }
958 }
959
960 /* Last third of preparing nir from glsl, which happens after shader
961 * variant lowering.
962 */
963 void
964 st_finalize_nir(struct st_context *st, struct gl_program *prog,
965 struct gl_shader_program *shader_program,
966 nir_shader *nir, bool finalize_by_driver)
967 {
968 struct pipe_screen *screen = st->pipe->screen;
969
970 NIR_PASS_V(nir, nir_split_var_copies);
971 NIR_PASS_V(nir, nir_lower_var_copies);
972
973 st_nir_assign_varying_locations(st, nir);
974 st_nir_assign_uniform_locations(st->ctx, prog, nir);
975
976 /* Set num_uniforms in number of attribute slots (vec4s) */
977 nir->num_uniforms = DIV_ROUND_UP(prog->Parameters->NumParameterValues, 4);
978
979 st_nir_lower_uniforms(st, nir);
980 st_nir_lower_samplers(screen, nir, shader_program, prog);
981 if (!screen->get_param(screen, PIPE_CAP_NIR_IMAGES_AS_DEREF))
982 NIR_PASS_V(nir, gl_nir_lower_images, false);
983
984 if (finalize_by_driver && screen->finalize_nir)
985 screen->finalize_nir(screen, nir, false);
986 }
987
988 } /* extern "C" */