mesa: Make atomic lowering put atomics above SSBOs.
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/context.h"
35 #include "main/mtypes.h"
36 #include "main/errors.h"
37 #include "main/glspirv.h"
38 #include "main/shaderapi.h"
39 #include "main/uniforms.h"
40
41 #include "main/shaderobj.h"
42 #include "st_context.h"
43 #include "st_program.h"
44 #include "st_shader_cache.h"
45
46 #include "compiler/nir/nir.h"
47 #include "compiler/glsl_types.h"
48 #include "compiler/glsl/glsl_to_nir.h"
49 #include "compiler/glsl/gl_nir.h"
50 #include "compiler/glsl/gl_nir_linker.h"
51 #include "compiler/glsl/ir.h"
52 #include "compiler/glsl/ir_optimization.h"
53 #include "compiler/glsl/string_to_uint_map.h"
54
55 static int
56 type_size(const struct glsl_type *type)
57 {
58 return type->count_attribute_slots(false);
59 }
60
61 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
62 * may need to fix up varying slots so the glsl->nir path is aligned
63 * with the anything->tgsi->nir path.
64 */
65 static void
66 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
67 {
68 if (st->needs_texcoord_semantic)
69 return;
70
71 nir_foreach_variable(var, var_list) {
72 if (var->data.location >= VARYING_SLOT_VAR0) {
73 var->data.location += 9;
74 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
75 (var->data.location <= VARYING_SLOT_TEX7)) {
76 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
77 }
78 }
79 }
80
81 /* input location assignment for VS inputs must be handled specially, so
82 * that it is aligned w/ st's vbo state.
83 * (This isn't the case with, for ex, FS inputs, which only need to agree
84 * on varying-slot w/ the VS outputs)
85 */
86 void
87 st_nir_assign_vs_in_locations(struct nir_shader *nir)
88 {
89 if (nir->info.stage != MESA_SHADER_VERTEX)
90 return;
91
92 bool removed_inputs = false;
93
94 nir->num_inputs = util_bitcount64(nir->info.inputs_read);
95 nir_foreach_variable_safe(var, &nir->inputs) {
96 /* NIR already assigns dual-slot inputs to two locations so all we have
97 * to do is compact everything down.
98 */
99 if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
100 var->data.driver_location =
101 util_bitcount64(nir->info.inputs_read &
102 BITFIELD64_MASK(var->data.location));
103 } else {
104 /* Move unused input variables to the globals list (with no
105 * initialization), to avoid confusing drivers looking through the
106 * inputs array and expecting to find inputs with a driver_location
107 * set.
108 */
109 exec_node_remove(&var->node);
110 var->data.mode = nir_var_shader_temp;
111 exec_list_push_tail(&nir->globals, &var->node);
112 removed_inputs = true;
113 }
114 }
115
116 /* Re-lower global vars, to deal with any dead VS inputs. */
117 if (removed_inputs)
118 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
119 }
120
121 static int
122 st_nir_lookup_parameter_index(struct gl_program *prog, nir_variable *var)
123 {
124 struct gl_program_parameter_list *params = prog->Parameters;
125
126 /* Lookup the first parameter that the uniform storage that match the
127 * variable location.
128 */
129 for (unsigned i = 0; i < params->NumParameters; i++) {
130 int index = params->Parameters[i].MainUniformStorageIndex;
131 if (index == var->data.location)
132 return i;
133 }
134
135 /* TODO: Handle this fallback for SPIR-V. We need this for GLSL e.g. in
136 * dEQP-GLES2.functional.uniform_api.random.3
137 */
138
139 /* is there a better way to do this? If we have something like:
140 *
141 * struct S {
142 * float f;
143 * vec4 v;
144 * };
145 * uniform S color;
146 *
147 * Then what we get in prog->Parameters looks like:
148 *
149 * 0: Name=color.f, Type=6, DataType=1406, Size=1
150 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
151 *
152 * So the name doesn't match up and _mesa_lookup_parameter_index()
153 * fails. In this case just find the first matching "color.*"..
154 *
155 * Note for arrays you could end up w/ color[n].f, for example.
156 *
157 * glsl_to_tgsi works slightly differently in this regard. It is
158 * emitting something more low level, so it just translates the
159 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
160 * it just calculates the additional offset of struct field members
161 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
162 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
163 * needs to work backwards to get base var loc from the param-list
164 * which already has them separated out.
165 */
166 if (!prog->sh.data->spirv) {
167 int namelen = strlen(var->name);
168 for (unsigned i = 0; i < params->NumParameters; i++) {
169 struct gl_program_parameter *p = &params->Parameters[i];
170 if ((strncmp(p->Name, var->name, namelen) == 0) &&
171 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
172 return i;
173 }
174 }
175 }
176
177 return -1;
178 }
179
180 static void
181 st_nir_assign_uniform_locations(struct gl_context *ctx,
182 struct gl_program *prog,
183 struct exec_list *uniform_list)
184 {
185 int shaderidx = 0;
186 int imageidx = 0;
187
188 nir_foreach_variable(uniform, uniform_list) {
189 int loc;
190
191 /*
192 * UBO's have their own address spaces, so don't count them towards the
193 * number of global uniforms
194 */
195 if (uniform->data.mode == nir_var_mem_ubo || uniform->data.mode == nir_var_mem_ssbo)
196 continue;
197
198 const struct glsl_type *type = glsl_without_array(uniform->type);
199 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
200 if (type->is_sampler()) {
201 loc = shaderidx;
202 shaderidx += type_size(uniform->type);
203 } else {
204 loc = imageidx;
205 imageidx += type_size(uniform->type);
206 }
207 } else if (uniform->state_slots) {
208 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
209 /* This state reference has already been setup by ir_to_mesa, but we'll
210 * get the same index back here.
211 */
212
213 unsigned comps;
214 if (glsl_type_is_struct_or_ifc(type)) {
215 comps = 4;
216 } else {
217 comps = glsl_get_vector_elements(type);
218 }
219
220 if (ctx->Const.PackedDriverUniformStorage) {
221 loc = _mesa_add_sized_state_reference(prog->Parameters,
222 stateTokens, comps, false);
223 loc = prog->Parameters->ParameterValueOffset[loc];
224 } else {
225 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
226 }
227 } else {
228 loc = st_nir_lookup_parameter_index(prog, uniform);
229
230 /* We need to check that loc is not -1 here before accessing the
231 * array. It can be negative for example when we have a struct that
232 * only contains opaque types.
233 */
234 if (loc >= 0 && ctx->Const.PackedDriverUniformStorage) {
235 loc = prog->Parameters->ParameterValueOffset[loc];
236 }
237 }
238
239 uniform->data.driver_location = loc;
240 }
241 }
242
243 void
244 st_nir_opts(nir_shader *nir)
245 {
246 bool progress;
247
248 do {
249 progress = false;
250
251 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
252
253 /* Linking deals with unused inputs/outputs, but here we can remove
254 * things local to the shader in the hopes that we can cleanup other
255 * things. This pass will also remove variables with only stores, so we
256 * might be able to make progress after it.
257 */
258 NIR_PASS(progress, nir, nir_remove_dead_variables,
259 (nir_variable_mode)(nir_var_function_temp |
260 nir_var_shader_temp |
261 nir_var_mem_shared));
262
263 NIR_PASS(progress, nir, nir_opt_copy_prop_vars);
264 NIR_PASS(progress, nir, nir_opt_dead_write_vars);
265
266 if (nir->options->lower_to_scalar) {
267 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
268 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
269 }
270
271 NIR_PASS_V(nir, nir_lower_alu);
272 NIR_PASS_V(nir, nir_lower_pack);
273 NIR_PASS(progress, nir, nir_copy_prop);
274 NIR_PASS(progress, nir, nir_opt_remove_phis);
275 NIR_PASS(progress, nir, nir_opt_dce);
276 if (nir_opt_trivial_continues(nir)) {
277 progress = true;
278 NIR_PASS(progress, nir, nir_copy_prop);
279 NIR_PASS(progress, nir, nir_opt_dce);
280 }
281 NIR_PASS(progress, nir, nir_opt_if, false);
282 NIR_PASS(progress, nir, nir_opt_dead_cf);
283 NIR_PASS(progress, nir, nir_opt_cse);
284 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
285
286 NIR_PASS(progress, nir, nir_opt_algebraic);
287 NIR_PASS(progress, nir, nir_opt_constant_folding);
288
289 if (!nir->info.flrp_lowered) {
290 unsigned lower_flrp =
291 (nir->options->lower_flrp16 ? 16 : 0) |
292 (nir->options->lower_flrp32 ? 32 : 0) |
293 (nir->options->lower_flrp64 ? 64 : 0);
294
295 if (lower_flrp) {
296 bool lower_flrp_progress = false;
297
298 NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp,
299 lower_flrp,
300 false /* always_precise */,
301 nir->options->lower_ffma);
302 if (lower_flrp_progress) {
303 NIR_PASS(progress, nir,
304 nir_opt_constant_folding);
305 progress = true;
306 }
307 }
308
309 /* Nothing should rematerialize any flrps, so we only need to do this
310 * lowering once.
311 */
312 nir->info.flrp_lowered = true;
313 }
314
315 NIR_PASS(progress, nir, nir_opt_undef);
316 NIR_PASS(progress, nir, nir_opt_conditional_discard);
317 if (nir->options->max_unroll_iterations) {
318 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
319 }
320 } while (progress);
321 }
322
323 static void
324 shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
325 {
326 assert(glsl_type_is_vector_or_scalar(type));
327
328 uint32_t comp_size = glsl_type_is_boolean(type)
329 ? 4 : glsl_get_bit_size(type) / 8;
330 unsigned length = glsl_get_vector_elements(type);
331 *size = comp_size * length,
332 *align = comp_size * (length == 3 ? 4 : length);
333 }
334
335 /* First third of converting glsl_to_nir.. this leaves things in a pre-
336 * nir_lower_io state, so that shader variants can more easily insert/
337 * replace variables, etc.
338 */
339 static void
340 st_nir_preprocess(struct st_context *st, struct gl_program *prog,
341 struct gl_shader_program *shader_program,
342 gl_shader_stage stage)
343 {
344 struct pipe_screen *screen = st->pipe->screen;
345 const nir_shader_compiler_options *options =
346 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
347 assert(options);
348 nir_shader *nir = prog->nir;
349
350 /* Set the next shader stage hint for VS and TES. */
351 if (!nir->info.separate_shader &&
352 (nir->info.stage == MESA_SHADER_VERTEX ||
353 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
354
355 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
356 unsigned stages_mask =
357 ~prev_stages & shader_program->data->linked_stages;
358
359 nir->info.next_stage = stages_mask ?
360 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
361 } else {
362 nir->info.next_stage = MESA_SHADER_FRAGMENT;
363 }
364
365 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
366 if (!st->ctx->SoftFP64 && nir->info.uses_64bit &&
367 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
368 st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options);
369 }
370
371 /* ES has strict SSO validation rules for shader IO matching so we can't
372 * remove dead IO until the resource list has been built. Here we skip
373 * removing them until later. This will potentially make the IO lowering
374 * calls below do a little extra work but should otherwise have no impact.
375 */
376 if (!_mesa_is_gles(st->ctx) || !nir->info.separate_shader) {
377 nir_variable_mode mask =
378 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
379 nir_remove_dead_variables(nir, mask);
380 }
381
382 if (options->lower_all_io_to_temps ||
383 nir->info.stage == MESA_SHADER_VERTEX ||
384 nir->info.stage == MESA_SHADER_GEOMETRY) {
385 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
386 nir_shader_get_entrypoint(nir),
387 true, true);
388 } else if (nir->info.stage == MESA_SHADER_FRAGMENT ||
389 !screen->get_param(screen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) {
390 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
391 nir_shader_get_entrypoint(nir),
392 true, false);
393 }
394
395 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
396 NIR_PASS_V(nir, nir_split_var_copies);
397 NIR_PASS_V(nir, nir_lower_var_copies);
398
399 if (options->lower_to_scalar) {
400 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
401 }
402
403 /* before buffers and vars_to_ssa */
404 NIR_PASS_V(nir, gl_nir_lower_bindless_images);
405
406 /* TODO: Change GLSL to not lower shared memory. */
407 if (prog->nir->info.stage == MESA_SHADER_COMPUTE &&
408 shader_program->data->spirv) {
409 NIR_PASS_V(prog->nir, nir_lower_vars_to_explicit_types,
410 nir_var_mem_shared, shared_type_info);
411 NIR_PASS_V(prog->nir, nir_lower_explicit_io,
412 nir_var_mem_shared, nir_address_format_32bit_offset);
413 }
414
415 /* Do a round of constant folding to clean up address calculations */
416 NIR_PASS_V(nir, nir_opt_constant_folding);
417 }
418
419 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
420 * info on varyings, etc after NIR link time opts have been applied.
421 */
422 static void
423 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
424 struct gl_shader_program *shader_program)
425 {
426 nir_shader *nir = prog->nir;
427
428 /* Make a pass over the IR to add state references for any built-in
429 * uniforms that are used. This has to be done now (during linking).
430 * Code generation doesn't happen until the first time this shader is
431 * used for rendering. Waiting until then to generate the parameters is
432 * too late. At that point, the values for the built-in uniforms won't
433 * get sent to the shader.
434 */
435 nir_foreach_variable(var, &nir->uniforms) {
436 const nir_state_slot *const slots = var->state_slots;
437 if (slots != NULL) {
438 const struct glsl_type *type = glsl_without_array(var->type);
439 for (unsigned int i = 0; i < var->num_state_slots; i++) {
440 unsigned comps;
441 if (glsl_type_is_struct_or_ifc(type)) {
442 /* Builtin struct require specical handling for now we just
443 * make all members vec4. See st_nir_lower_builtin.
444 */
445 comps = 4;
446 } else {
447 comps = glsl_get_vector_elements(type);
448 }
449
450 if (st->ctx->Const.PackedDriverUniformStorage) {
451 _mesa_add_sized_state_reference(prog->Parameters,
452 slots[i].tokens,
453 comps, false);
454 } else {
455 _mesa_add_state_reference(prog->Parameters,
456 slots[i].tokens);
457 }
458 }
459 }
460 }
461
462 /* Avoid reallocation of the program parameter list, because the uniform
463 * storage is only associated with the original parameter list.
464 * This should be enough for Bitmap and DrawPixels constants.
465 */
466 _mesa_reserve_parameter_storage(prog->Parameters, 8);
467
468 /* This has to be done last. Any operation the can cause
469 * prog->ParameterValues to get reallocated (e.g., anything that adds a
470 * program constant) has to happen before creating this linkage.
471 */
472 _mesa_associate_uniform_storage(st->ctx, shader_program, prog);
473
474 st_set_prog_affected_state_flags(prog);
475
476 /* None of the builtins being lowered here can be produced by SPIR-V. See
477 * _mesa_builtin_uniform_desc.
478 */
479 if (!shader_program->data->spirv)
480 NIR_PASS_V(nir, st_nir_lower_builtin);
481
482 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
483 NIR_PASS_V(nir, nir_opt_intrinsics);
484
485 /* Lower 64-bit ops. */
486 if (nir->options->lower_int64_options ||
487 nir->options->lower_doubles_options) {
488 bool lowered_64bit_ops = false;
489 if (nir->options->lower_doubles_options) {
490 NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles,
491 st->ctx->SoftFP64, nir->options->lower_doubles_options);
492 }
493 if (nir->options->lower_int64_options) {
494 NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64,
495 nir->options->lower_int64_options);
496 }
497
498 if (lowered_64bit_ops)
499 st_nir_opts(nir);
500 }
501
502 nir_variable_mode mask = (nir_variable_mode)
503 (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp );
504 nir_remove_dead_variables(nir, mask);
505
506 if (!st->has_hw_atomics)
507 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
508 st->ctx->Const.Program[nir->info.stage].MaxShaderStorageBlocks);
509
510 st_finalize_nir_before_variants(nir);
511
512 if (st->allow_st_finalize_nir_twice)
513 st_finalize_nir(st, prog, shader_program, nir, true);
514
515 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
516 _mesa_log("\n");
517 _mesa_log("NIR IR for linked %s program %d:\n",
518 _mesa_shader_stage_to_string(prog->info.stage),
519 shader_program->Name);
520 nir_print_shader(nir, _mesa_get_log_file());
521 _mesa_log("\n\n");
522 }
523 }
524
525 static void
526 st_nir_vectorize_io(nir_shader *producer, nir_shader *consumer)
527 {
528 NIR_PASS_V(producer, nir_lower_io_to_vector, nir_var_shader_out);
529 NIR_PASS_V(producer, nir_opt_combine_stores, nir_var_shader_out);
530 NIR_PASS_V(consumer, nir_lower_io_to_vector, nir_var_shader_in);
531
532 if ((producer)->info.stage != MESA_SHADER_TESS_CTRL) {
533 /* Calling lower_io_to_vector creates output variable writes with
534 * write-masks. We only support these for TCS outputs, so for other
535 * stages, we need to call nir_lower_io_to_temporaries to get rid of
536 * them. This, in turn, creates temporary variables and extra
537 * copy_deref intrinsics that we need to clean up.
538 */
539 NIR_PASS_V(producer, nir_lower_io_to_temporaries,
540 nir_shader_get_entrypoint(producer), true, false);
541 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
542 NIR_PASS_V(producer, nir_split_var_copies);
543 NIR_PASS_V(producer, nir_lower_var_copies);
544 }
545 }
546
547 static void
548 st_nir_link_shaders(nir_shader *producer, nir_shader *consumer)
549 {
550 if (producer->options->lower_to_scalar) {
551 NIR_PASS_V(producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
552 NIR_PASS_V(consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
553 }
554
555 nir_lower_io_arrays_to_elements(producer, consumer);
556
557 st_nir_opts(producer);
558 st_nir_opts(consumer);
559
560 if (nir_link_opt_varyings(producer, consumer))
561 st_nir_opts(consumer);
562
563 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out);
564 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in);
565
566 if (nir_remove_unused_varyings(producer, consumer)) {
567 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
568 NIR_PASS_V(consumer, nir_lower_global_vars_to_local);
569
570 st_nir_opts(producer);
571 st_nir_opts(consumer);
572
573 /* Optimizations can cause varyings to become unused.
574 * nir_compact_varyings() depends on all dead varyings being removed so
575 * we need to call nir_remove_dead_variables() again here.
576 */
577 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out);
578 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in);
579 }
580 }
581
582 static void
583 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
584 {
585 struct gl_linked_shader *linked_tcs =
586 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
587 struct gl_linked_shader *linked_tes =
588 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
589
590 /* If we have a TCS and TES linked together, lower TES patch vertices. */
591 if (linked_tcs && linked_tes) {
592 nir_shader *tcs_nir = linked_tcs->Program->nir;
593 nir_shader *tes_nir = linked_tes->Program->nir;
594
595 /* The TES input vertex count is the TCS output vertex count,
596 * lower TES gl_PatchVerticesIn to a constant.
597 */
598 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
599 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
600 }
601 }
602
603 extern "C" {
604
605 void
606 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
607 struct gl_program *prog,
608 struct pipe_screen *pscreen)
609 {
610 if (nir->info.stage != MESA_SHADER_FRAGMENT)
611 return;
612
613 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
614 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
615 };
616 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
617
618 memcpy(wpos_options.state_tokens, wposTransformState,
619 sizeof(wpos_options.state_tokens));
620 wpos_options.fs_coord_origin_upper_left =
621 pscreen->get_param(pscreen,
622 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
623 wpos_options.fs_coord_origin_lower_left =
624 pscreen->get_param(pscreen,
625 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
626 wpos_options.fs_coord_pixel_center_integer =
627 pscreen->get_param(pscreen,
628 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
629 wpos_options.fs_coord_pixel_center_half_integer =
630 pscreen->get_param(pscreen,
631 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
632
633 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
634 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
635 _mesa_add_state_reference(prog->Parameters, wposTransformState);
636 }
637 }
638
639 bool
640 st_link_nir(struct gl_context *ctx,
641 struct gl_shader_program *shader_program)
642 {
643 struct st_context *st = st_context(ctx);
644 struct gl_linked_shader *linked_shader[MESA_SHADER_STAGES];
645 unsigned num_shaders = 0;
646
647 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
648 if (shader_program->_LinkedShaders[i])
649 linked_shader[num_shaders++] = shader_program->_LinkedShaders[i];
650 }
651
652 for (unsigned i = 0; i < num_shaders; i++) {
653 struct gl_linked_shader *shader = linked_shader[i];
654 const nir_shader_compiler_options *options =
655 st->ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions;
656 struct gl_program *prog = shader->Program;
657 struct st_program *stp = (struct st_program *)prog;
658
659 _mesa_copy_linked_program_data(shader_program, shader);
660
661 assert(!prog->nir);
662 stp->shader_program = shader_program;
663 stp->state.type = PIPE_SHADER_IR_NIR;
664
665 if (shader_program->data->spirv) {
666 prog->Parameters = _mesa_new_parameter_list();
667 /* Parameters will be filled during NIR linking. */
668
669 prog->nir = _mesa_spirv_to_nir(ctx, shader_program, shader->Stage, options);
670 } else {
671 validate_ir_tree(shader->ir);
672
673 prog->Parameters = _mesa_new_parameter_list();
674 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
675 prog->Parameters);
676
677 if (ctx->_Shader->Flags & GLSL_DUMP) {
678 _mesa_log("\n");
679 _mesa_log("GLSL IR for linked %s program %d:\n",
680 _mesa_shader_stage_to_string(shader->Stage),
681 shader_program->Name);
682 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
683 _mesa_log("\n\n");
684 }
685
686 prog->ExternalSamplersUsed = gl_external_samplers(prog);
687 _mesa_update_shader_textures_used(shader_program, prog);
688
689 prog->nir = glsl_to_nir(st->ctx, shader_program, shader->Stage, options);
690 st_nir_preprocess(st, prog, shader_program, shader->Stage);
691 }
692
693 if (options->lower_to_scalar) {
694 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
695 }
696 }
697
698 st_lower_patch_vertices_in(shader_program);
699
700 /* For SPIR-V, we have to perform the NIR linking before applying
701 * st_nir_preprocess.
702 */
703 if (shader_program->data->spirv) {
704 static const gl_nir_linker_options opts = {
705 true /*fill_parameters */
706 };
707 if (!gl_nir_link_spirv(ctx, shader_program, &opts))
708 return GL_FALSE;
709
710 nir_build_program_resource_list(ctx, shader_program, true);
711
712 for (unsigned i = 0; i < num_shaders; i++) {
713 struct gl_linked_shader *shader = linked_shader[i];
714 struct gl_program *prog = shader->Program;
715
716 prog->ExternalSamplersUsed = gl_external_samplers(prog);
717 _mesa_update_shader_textures_used(shader_program, prog);
718 st_nir_preprocess(st, prog, shader_program, shader->Stage);
719 }
720 }
721
722 /* Linking the stages in the opposite order (from fragment to vertex)
723 * ensures that inter-shader outputs written to in an earlier stage
724 * are eliminated if they are (transitively) not used in a later
725 * stage.
726 */
727 for (int i = num_shaders - 2; i >= 0; i--) {
728 st_nir_link_shaders(linked_shader[i]->Program->nir,
729 linked_shader[i + 1]->Program->nir);
730 }
731 /* Linking shaders also optimizes them. Separate shaders, compute shaders
732 * and shaders with a fixed-func VS or FS that don't need linking are
733 * optimized here.
734 */
735 if (num_shaders == 1)
736 st_nir_opts(linked_shader[0]->Program->nir);
737
738 if (!shader_program->data->spirv) {
739 if (!gl_nir_link_glsl(ctx, shader_program))
740 return GL_FALSE;
741
742 nir_build_program_resource_list(ctx, shader_program, false);
743 }
744
745 for (unsigned i = 0; i < num_shaders; i++) {
746 struct gl_linked_shader *shader = linked_shader[i];
747 nir_shader *nir = shader->Program->nir;
748
749 /* This needs to run after the initial pass of nir_lower_vars_to_ssa, so
750 * that the buffer indices are constants in nir where they where
751 * constants in GLSL. */
752 NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program);
753
754 /* Remap the locations to slots so those requiring two slots will occupy
755 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
756 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
757 * locations/slots 0 and 1, and attr1 will use location/slot 2
758 */
759 if (nir->info.stage == MESA_SHADER_VERTEX && !shader_program->data->spirv)
760 nir_remap_dual_slot_attributes(nir, &shader->Program->DualSlotInputs);
761
762 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
763 st->pipe->screen);
764
765 NIR_PASS_V(nir, nir_lower_system_values);
766 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
767
768 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
769 shader->Program->info = nir->info;
770 if (shader->Stage == MESA_SHADER_VERTEX) {
771 /* NIR expands dual-slot inputs out to two locations. We need to
772 * compact things back down GL-style single-slot inputs to avoid
773 * confusing the state tracker.
774 */
775 shader->Program->info.inputs_read =
776 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
777 shader->Program->DualSlotInputs);
778 }
779
780 if (i >= 1) {
781 struct gl_program *prev_shader = linked_shader[i - 1]->Program;
782
783 /* We can't use nir_compact_varyings with transform feedback, since
784 * the pipe_stream_output->output_register field is based on the
785 * pre-compacted driver_locations.
786 */
787 if (!(prev_shader->sh.LinkedTransformFeedback &&
788 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
789 nir_compact_varyings(prev_shader->nir,
790 nir, ctx->API != API_OPENGL_COMPAT);
791
792 if (ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->vectorize_io)
793 st_nir_vectorize_io(prev_shader->nir, nir);
794 }
795 }
796
797 for (unsigned i = 0; i < num_shaders; i++) {
798 struct gl_linked_shader *shader = linked_shader[i];
799 struct gl_program *prog = shader->Program;
800 struct st_program *stp = st_program(prog);
801 st_glsl_to_nir_post_opts(st, prog, shader_program);
802
803 /* Initialize st_vertex_program members. */
804 if (shader->Stage == MESA_SHADER_VERTEX)
805 st_prepare_vertex_program(stp);
806
807 /* Get pipe_stream_output_info. */
808 if (shader->Stage == MESA_SHADER_VERTEX ||
809 shader->Stage == MESA_SHADER_TESS_EVAL ||
810 shader->Stage == MESA_SHADER_GEOMETRY)
811 st_translate_stream_output_info(prog);
812
813 st_store_ir_in_disk_cache(st, prog, true);
814
815 st_release_variants(st, stp);
816 st_finalize_program(st, prog);
817
818 /* The GLSL IR won't be needed anymore. */
819 ralloc_free(shader->ir);
820 shader->ir = NULL;
821 }
822
823 struct shader_info *prev_info = NULL;
824
825 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
826 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
827 if (!shader)
828 continue;
829
830 struct shader_info *info = &shader->Program->nir->info;
831
832 if (prev_info &&
833 ctx->Const.ShaderCompilerOptions[i].NirOptions->unify_interfaces) {
834 prev_info->outputs_written |= info->inputs_read &
835 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
836 info->inputs_read |= prev_info->outputs_written &
837 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
838
839 prev_info->patch_outputs_written |= info->patch_inputs_read;
840 info->patch_inputs_read |= prev_info->patch_outputs_written;
841 }
842 prev_info = info;
843 }
844
845 return true;
846 }
847
848 void
849 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
850 {
851 if (nir->info.stage == MESA_SHADER_VERTEX) {
852 nir_assign_io_var_locations(&nir->outputs,
853 &nir->num_outputs,
854 nir->info.stage);
855 st_nir_fixup_varying_slots(st, &nir->outputs);
856 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
857 nir->info.stage == MESA_SHADER_TESS_CTRL ||
858 nir->info.stage == MESA_SHADER_TESS_EVAL) {
859 nir_assign_io_var_locations(&nir->inputs,
860 &nir->num_inputs,
861 nir->info.stage);
862 st_nir_fixup_varying_slots(st, &nir->inputs);
863
864 nir_assign_io_var_locations(&nir->outputs,
865 &nir->num_outputs,
866 nir->info.stage);
867 st_nir_fixup_varying_slots(st, &nir->outputs);
868 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
869 nir_assign_io_var_locations(&nir->inputs,
870 &nir->num_inputs,
871 nir->info.stage);
872 st_nir_fixup_varying_slots(st, &nir->inputs);
873 nir_assign_io_var_locations(&nir->outputs,
874 &nir->num_outputs,
875 nir->info.stage);
876 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
877 /* TODO? */
878 } else {
879 unreachable("invalid shader type");
880 }
881 }
882
883 void
884 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
885 struct gl_shader_program *shader_program,
886 struct gl_program *prog)
887 {
888 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
889 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
890 else
891 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
892
893 if (prog) {
894 prog->info.textures_used = nir->info.textures_used;
895 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
896 }
897 }
898
899 static int
900 st_packed_uniforms_type_size(const struct glsl_type *type, bool bindless)
901 {
902 return glsl_count_dword_slots(type, bindless);
903 }
904
905 static int
906 st_unpacked_uniforms_type_size(const struct glsl_type *type, bool bindless)
907 {
908 return glsl_count_vec4_slots(type, false, bindless);
909 }
910
911 void
912 st_nir_lower_uniforms(struct st_context *st, nir_shader *nir)
913 {
914 if (st->ctx->Const.PackedDriverUniformStorage) {
915 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
916 st_packed_uniforms_type_size,
917 (nir_lower_io_options)0);
918 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
919 } else {
920 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
921 st_unpacked_uniforms_type_size,
922 (nir_lower_io_options)0);
923 }
924 }
925
926 /* Last third of preparing nir from glsl, which happens after shader
927 * variant lowering.
928 */
929 void
930 st_finalize_nir(struct st_context *st, struct gl_program *prog,
931 struct gl_shader_program *shader_program,
932 nir_shader *nir, bool finalize_by_driver)
933 {
934 struct pipe_screen *screen = st->pipe->screen;
935
936 NIR_PASS_V(nir, nir_split_var_copies);
937 NIR_PASS_V(nir, nir_lower_var_copies);
938
939 st_nir_assign_varying_locations(st, nir);
940 st_nir_assign_uniform_locations(st->ctx, prog,
941 &nir->uniforms);
942
943 /* Set num_uniforms in number of attribute slots (vec4s) */
944 nir->num_uniforms = DIV_ROUND_UP(prog->Parameters->NumParameterValues, 4);
945
946 st_nir_lower_uniforms(st, nir);
947 st_nir_lower_samplers(screen, nir, shader_program, prog);
948
949 if (finalize_by_driver && screen->finalize_nir)
950 screen->finalize_nir(screen, nir, false);
951 }
952
953 } /* extern "C" */