2 * Copyright © 2015 Red Hat
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
39 #include "main/shaderobj.h"
40 #include "st_context.h"
41 #include "st_glsl_types.h"
42 #include "st_program.h"
44 #include "compiler/nir/nir.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/glsl_to_nir.h"
47 #include "compiler/glsl/gl_nir.h"
48 #include "compiler/glsl/ir.h"
49 #include "compiler/glsl/ir_optimization.h"
50 #include "compiler/glsl/string_to_uint_map.h"
53 type_size(const struct glsl_type
*type
)
55 return type
->count_attribute_slots(false);
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
63 st_nir_fixup_varying_slots(struct st_context
*st
, struct exec_list
*var_list
)
65 if (st
->needs_texcoord_semantic
)
68 nir_foreach_variable(var
, var_list
) {
69 if (var
->data
.location
>= VARYING_SLOT_VAR0
) {
70 var
->data
.location
+= 9;
71 } else if ((var
->data
.location
>= VARYING_SLOT_TEX0
) &&
72 (var
->data
.location
<= VARYING_SLOT_TEX7
)) {
73 var
->data
.location
+= VARYING_SLOT_VAR0
- VARYING_SLOT_TEX0
;
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
84 st_nir_assign_vs_in_locations(nir_shader
*nir
)
87 nir_foreach_variable_safe(var
, &nir
->inputs
) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
91 if (var
->data
.location
== VERT_ATTRIB_EDGEFLAG
) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var
->data
.driver_location
= util_bitcount64(nir
->info
.inputs_read
);
94 } else if (nir
->info
.inputs_read
& BITFIELD64_BIT(var
->data
.location
)) {
95 var
->data
.driver_location
=
96 util_bitcount64(nir
->info
.inputs_read
&
97 BITFIELD64_MASK(var
->data
.location
));
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
105 exec_node_remove(&var
->node
);
106 var
->data
.mode
= nir_var_shader_temp
;
107 exec_list_push_tail(&nir
->globals
, &var
->node
);
113 st_nir_lookup_parameter_index(const struct gl_program_parameter_list
*params
,
116 int loc
= _mesa_lookup_parameter_index(params
, name
);
118 /* is there a better way to do this? If we have something like:
126 * Then what we get in prog->Parameters looks like:
128 * 0: Name=color.f, Type=6, DataType=1406, Size=1
129 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
131 * So the name doesn't match up and _mesa_lookup_parameter_index()
132 * fails. In this case just find the first matching "color.*"..
134 * Note for arrays you could end up w/ color[n].f, for example.
136 * glsl_to_tgsi works slightly differently in this regard. It is
137 * emitting something more low level, so it just translates the
138 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
139 * it just calculates the additional offset of struct field members
140 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
141 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
142 * needs to work backwards to get base var loc from the param-list
143 * which already has them separated out.
146 int namelen
= strlen(name
);
147 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
148 struct gl_program_parameter
*p
= ¶ms
->Parameters
[i
];
149 if ((strncmp(p
->Name
, name
, namelen
) == 0) &&
150 ((p
->Name
[namelen
] == '.') || (p
->Name
[namelen
] == '['))) {
161 st_nir_assign_uniform_locations(struct gl_context
*ctx
,
162 struct gl_program
*prog
,
163 struct exec_list
*uniform_list
)
168 nir_foreach_variable(uniform
, uniform_list
) {
172 * UBO's have their own address spaces, so don't count them towards the
173 * number of global uniforms
175 if (uniform
->data
.mode
== nir_var_mem_ubo
|| uniform
->data
.mode
== nir_var_mem_ssbo
)
178 const struct glsl_type
*type
= glsl_without_array(uniform
->type
);
179 if (!uniform
->data
.bindless
&& (type
->is_sampler() || type
->is_image())) {
180 if (type
->is_sampler()) {
182 shaderidx
+= type_size(uniform
->type
);
185 imageidx
+= type_size(uniform
->type
);
187 } else if (strncmp(uniform
->name
, "gl_", 3) == 0) {
188 const gl_state_index16
*const stateTokens
= uniform
->state_slots
[0].tokens
;
189 /* This state reference has already been setup by ir_to_mesa, but we'll
190 * get the same index back here.
194 if (glsl_type_is_struct_or_ifc(type
)) {
197 comps
= glsl_get_vector_elements(type
);
200 if (ctx
->Const
.PackedDriverUniformStorage
) {
201 loc
= _mesa_add_sized_state_reference(prog
->Parameters
,
202 stateTokens
, comps
, false);
203 loc
= prog
->Parameters
->ParameterValueOffset
[loc
];
205 loc
= _mesa_add_state_reference(prog
->Parameters
, stateTokens
);
208 loc
= st_nir_lookup_parameter_index(prog
->Parameters
, uniform
->name
);
210 /* We need to check that loc is not -1 here before accessing the
211 * array. It can be negative for example when we have a struct that
212 * only contains opaque types.
214 if (loc
>= 0 && ctx
->Const
.PackedDriverUniformStorage
) {
215 loc
= prog
->Parameters
->ParameterValueOffset
[loc
];
219 uniform
->data
.driver_location
= loc
;
224 st_nir_opts(nir_shader
*nir
, bool scalar
)
227 unsigned lower_flrp
=
228 (nir
->options
->lower_flrp16
? 16 : 0) |
229 (nir
->options
->lower_flrp32
? 32 : 0) |
230 (nir
->options
->lower_flrp64
? 64 : 0);
235 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
237 NIR_PASS(progress
, nir
, nir_opt_copy_prop_vars
);
238 NIR_PASS(progress
, nir
, nir_opt_dead_write_vars
);
241 NIR_PASS_V(nir
, nir_lower_alu_to_scalar
, NULL
);
242 NIR_PASS_V(nir
, nir_lower_phis_to_scalar
);
245 NIR_PASS_V(nir
, nir_lower_alu
);
246 NIR_PASS_V(nir
, nir_lower_pack
);
247 NIR_PASS(progress
, nir
, nir_copy_prop
);
248 NIR_PASS(progress
, nir
, nir_opt_remove_phis
);
249 NIR_PASS(progress
, nir
, nir_opt_dce
);
250 if (nir_opt_trivial_continues(nir
)) {
252 NIR_PASS(progress
, nir
, nir_copy_prop
);
253 NIR_PASS(progress
, nir
, nir_opt_dce
);
255 NIR_PASS(progress
, nir
, nir_opt_if
, false);
256 NIR_PASS(progress
, nir
, nir_opt_dead_cf
);
257 NIR_PASS(progress
, nir
, nir_opt_cse
);
258 NIR_PASS(progress
, nir
, nir_opt_peephole_select
, 8, true, true);
260 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
261 NIR_PASS(progress
, nir
, nir_opt_constant_folding
);
263 if (lower_flrp
!= 0) {
264 bool lower_flrp_progress
= false;
266 NIR_PASS(lower_flrp_progress
, nir
, nir_lower_flrp
,
268 false /* always_precise */,
269 nir
->options
->lower_ffma
);
270 if (lower_flrp_progress
) {
271 NIR_PASS(progress
, nir
,
272 nir_opt_constant_folding
);
276 /* Nothing should rematerialize any flrps, so we only need to do this
282 NIR_PASS(progress
, nir
, gl_nir_opt_access
);
284 NIR_PASS(progress
, nir
, nir_opt_undef
);
285 NIR_PASS(progress
, nir
, nir_opt_conditional_discard
);
286 if (nir
->options
->max_unroll_iterations
) {
287 NIR_PASS(progress
, nir
, nir_opt_loop_unroll
, (nir_variable_mode
)0);
292 /* First third of converting glsl_to_nir.. this leaves things in a pre-
293 * nir_lower_io state, so that shader variants can more easily insert/
294 * replace variables, etc.
297 st_glsl_to_nir(struct st_context
*st
, struct gl_program
*prog
,
298 struct gl_shader_program
*shader_program
,
299 gl_shader_stage stage
)
301 const nir_shader_compiler_options
*options
=
302 st
->ctx
->Const
.ShaderCompilerOptions
[prog
->info
.stage
].NirOptions
;
303 enum pipe_shader_type type
= pipe_shader_type_from_mesa(stage
);
304 struct pipe_screen
*screen
= st
->pipe
->screen
;
305 bool is_scalar
= screen
->get_shader_param(screen
, type
, PIPE_SHADER_CAP_SCALAR_ISA
);
308 options
->lower_int64_options
|| options
->lower_doubles_options
;
313 nir_shader
*nir
= glsl_to_nir(st
->ctx
, shader_program
, stage
, options
);
315 /* Set the next shader stage hint for VS and TES. */
316 if (!nir
->info
.separate_shader
&&
317 (nir
->info
.stage
== MESA_SHADER_VERTEX
||
318 nir
->info
.stage
== MESA_SHADER_TESS_EVAL
)) {
320 unsigned prev_stages
= (1 << (prog
->info
.stage
+ 1)) - 1;
321 unsigned stages_mask
=
322 ~prev_stages
& shader_program
->data
->linked_stages
;
324 nir
->info
.next_stage
= stages_mask
?
325 (gl_shader_stage
) u_bit_scan(&stages_mask
) : MESA_SHADER_FRAGMENT
;
327 nir
->info
.next_stage
= MESA_SHADER_FRAGMENT
;
330 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
331 if (!st
->ctx
->SoftFP64
&& nir
->info
.uses_64bit
&&
332 (options
->lower_doubles_options
& nir_lower_fp64_full_software
) != 0) {
333 st
->ctx
->SoftFP64
= glsl_float64_funcs_to_nir(st
->ctx
, options
);
336 nir_variable_mode mask
=
337 (nir_variable_mode
) (nir_var_shader_in
| nir_var_shader_out
);
338 nir_remove_dead_variables(nir
, mask
);
340 if (options
->lower_all_io_to_temps
||
341 nir
->info
.stage
== MESA_SHADER_VERTEX
||
342 nir
->info
.stage
== MESA_SHADER_GEOMETRY
) {
343 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
344 nir_shader_get_entrypoint(nir
),
346 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
347 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
348 nir_shader_get_entrypoint(nir
),
352 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
353 NIR_PASS_V(nir
, nir_split_var_copies
);
354 NIR_PASS_V(nir
, nir_lower_var_copies
);
357 NIR_PASS_V(nir
, nir_lower_alu_to_scalar
, NULL
);
360 /* before buffers and vars_to_ssa */
361 NIR_PASS_V(nir
, gl_nir_lower_bindless_images
);
362 st_nir_opts(nir
, is_scalar
);
364 NIR_PASS_V(nir
, gl_nir_lower_buffers
, shader_program
);
365 /* Do a round of constant folding to clean up address calculations */
366 NIR_PASS_V(nir
, nir_opt_constant_folding
);
369 bool lowered_64bit_ops
= false;
370 if (options
->lower_doubles_options
) {
371 NIR_PASS(lowered_64bit_ops
, nir
, nir_lower_doubles
,
372 st
->ctx
->SoftFP64
, options
->lower_doubles_options
);
374 if (options
->lower_int64_options
) {
375 NIR_PASS(lowered_64bit_ops
, nir
, nir_lower_int64
,
376 options
->lower_int64_options
);
379 if (lowered_64bit_ops
)
380 st_nir_opts(nir
, is_scalar
);
386 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
387 * info on varyings, etc after NIR link time opts have been applied.
390 st_glsl_to_nir_post_opts(struct st_context
*st
, struct gl_program
*prog
,
391 struct gl_shader_program
*shader_program
)
393 nir_shader
*nir
= prog
->nir
;
395 /* Make a pass over the IR to add state references for any built-in
396 * uniforms that are used. This has to be done now (during linking).
397 * Code generation doesn't happen until the first time this shader is
398 * used for rendering. Waiting until then to generate the parameters is
399 * too late. At that point, the values for the built-in uniforms won't
400 * get sent to the shader.
402 nir_foreach_variable(var
, &nir
->uniforms
) {
403 if (strncmp(var
->name
, "gl_", 3) == 0) {
404 const nir_state_slot
*const slots
= var
->state_slots
;
405 assert(var
->state_slots
!= NULL
);
407 const struct glsl_type
*type
= glsl_without_array(var
->type
);
408 for (unsigned int i
= 0; i
< var
->num_state_slots
; i
++) {
410 if (glsl_type_is_struct_or_ifc(type
)) {
411 /* Builtin struct require specical handling for now we just
412 * make all members vec4. See st_nir_lower_builtin.
416 comps
= glsl_get_vector_elements(type
);
419 if (st
->ctx
->Const
.PackedDriverUniformStorage
) {
420 _mesa_add_sized_state_reference(prog
->Parameters
,
424 _mesa_add_state_reference(prog
->Parameters
,
431 /* Avoid reallocation of the program parameter list, because the uniform
432 * storage is only associated with the original parameter list.
433 * This should be enough for Bitmap and DrawPixels constants.
435 _mesa_reserve_parameter_storage(prog
->Parameters
, 8);
437 /* This has to be done last. Any operation the can cause
438 * prog->ParameterValues to get reallocated (e.g., anything that adds a
439 * program constant) has to happen before creating this linkage.
441 _mesa_associate_uniform_storage(st
->ctx
, shader_program
, prog
);
443 st_set_prog_affected_state_flags(prog
);
445 NIR_PASS_V(nir
, st_nir_lower_builtin
);
446 NIR_PASS_V(nir
, gl_nir_lower_atomics
, shader_program
, true);
447 NIR_PASS_V(nir
, nir_opt_intrinsics
);
449 nir_variable_mode mask
= nir_var_function_temp
;
450 nir_remove_dead_variables(nir
, mask
);
452 if (st
->ctx
->_Shader
->Flags
& GLSL_DUMP
) {
454 _mesa_log("NIR IR for linked %s program %d:\n",
455 _mesa_shader_stage_to_string(prog
->info
.stage
),
456 shader_program
->Name
);
457 nir_print_shader(nir
, _mesa_get_log_file());
463 set_st_program(struct gl_program
*prog
,
464 struct gl_shader_program
*shader_program
,
467 struct st_vertex_program
*stvp
;
468 struct st_common_program
*stp
;
469 struct st_fragment_program
*stfp
;
470 struct st_compute_program
*stcp
;
472 switch (prog
->info
.stage
) {
473 case MESA_SHADER_VERTEX
:
474 stvp
= (struct st_vertex_program
*)prog
;
475 stvp
->shader_program
= shader_program
;
476 stvp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
477 stvp
->tgsi
.ir
.nir
= nir
;
479 case MESA_SHADER_GEOMETRY
:
480 case MESA_SHADER_TESS_CTRL
:
481 case MESA_SHADER_TESS_EVAL
:
482 stp
= (struct st_common_program
*)prog
;
483 stp
->shader_program
= shader_program
;
484 stp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
485 stp
->tgsi
.ir
.nir
= nir
;
487 case MESA_SHADER_FRAGMENT
:
488 stfp
= (struct st_fragment_program
*)prog
;
489 stfp
->shader_program
= shader_program
;
490 stfp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
491 stfp
->tgsi
.ir
.nir
= nir
;
493 case MESA_SHADER_COMPUTE
:
494 stcp
= (struct st_compute_program
*)prog
;
495 stcp
->shader_program
= shader_program
;
496 stcp
->tgsi
.ir_type
= PIPE_SHADER_IR_NIR
;
497 stcp
->tgsi
.prog
= nir
;
500 unreachable("unknown shader stage");
505 st_nir_get_mesa_program(struct gl_context
*ctx
,
506 struct gl_shader_program
*shader_program
,
507 struct gl_linked_shader
*shader
)
509 struct st_context
*st
= st_context(ctx
);
510 struct pipe_screen
*pscreen
= ctx
->st
->pipe
->screen
;
511 struct gl_program
*prog
;
513 validate_ir_tree(shader
->ir
);
515 prog
= shader
->Program
;
517 prog
->Parameters
= _mesa_new_parameter_list();
519 _mesa_copy_linked_program_data(shader_program
, shader
);
520 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
523 /* Remove reads from output registers. */
524 if (!pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_CAN_READ_OUTPUTS
))
525 lower_output_reads(shader
->Stage
, shader
->ir
);
527 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
529 _mesa_log("GLSL IR for linked %s program %d:\n",
530 _mesa_shader_stage_to_string(shader
->Stage
),
531 shader_program
->Name
);
532 _mesa_print_ir(_mesa_get_log_file(), shader
->ir
, NULL
);
536 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
537 _mesa_update_shader_textures_used(shader_program
, prog
);
539 nir_shader
*nir
= st_glsl_to_nir(st
, prog
, shader_program
, shader
->Stage
);
541 set_st_program(prog
, shader_program
, nir
);
546 st_nir_vectorize_io(nir_shader
*producer
, nir_shader
*consumer
)
548 NIR_PASS_V(producer
, nir_lower_io_to_vector
, nir_var_shader_out
);
549 NIR_PASS_V(producer
, nir_opt_combine_stores
, nir_var_shader_out
);
550 NIR_PASS_V(consumer
, nir_lower_io_to_vector
, nir_var_shader_in
);
552 if ((producer
)->info
.stage
!= MESA_SHADER_TESS_CTRL
) {
553 /* Calling lower_io_to_vector creates output variable writes with
554 * write-masks. We only support these for TCS outputs, so for other
555 * stages, we need to call nir_lower_io_to_temporaries to get rid of
556 * them. This, in turn, creates temporary variables and extra
557 * copy_deref intrinsics that we need to clean up.
559 NIR_PASS_V(producer
, nir_lower_io_to_temporaries
,
560 nir_shader_get_entrypoint(producer
), true, false);
561 NIR_PASS_V(producer
, nir_lower_global_vars_to_local
);
562 NIR_PASS_V(producer
, nir_split_var_copies
);
563 NIR_PASS_V(producer
, nir_lower_var_copies
);
568 st_nir_link_shaders(nir_shader
**producer
, nir_shader
**consumer
, bool scalar
)
571 NIR_PASS_V(*producer
, nir_lower_io_to_scalar_early
, nir_var_shader_out
);
572 NIR_PASS_V(*consumer
, nir_lower_io_to_scalar_early
, nir_var_shader_in
);
575 nir_lower_io_arrays_to_elements(*producer
, *consumer
);
577 st_nir_opts(*producer
, scalar
);
578 st_nir_opts(*consumer
, scalar
);
580 if (nir_link_opt_varyings(*producer
, *consumer
))
581 st_nir_opts(*consumer
, scalar
);
583 NIR_PASS_V(*producer
, nir_remove_dead_variables
, nir_var_shader_out
);
584 NIR_PASS_V(*consumer
, nir_remove_dead_variables
, nir_var_shader_in
);
586 if (nir_remove_unused_varyings(*producer
, *consumer
)) {
587 NIR_PASS_V(*producer
, nir_lower_global_vars_to_local
);
588 NIR_PASS_V(*consumer
, nir_lower_global_vars_to_local
);
590 /* The backend might not be able to handle indirects on
591 * temporaries so we need to lower indirects on any of the
592 * varyings we have demoted here.
594 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
595 * currently smart enough to handle indirects without causing excess
596 * spilling causing the gpu to hang.
598 * See the following thread for more details of the problem:
599 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
601 nir_variable_mode indirect_mask
= nir_var_function_temp
;
603 NIR_PASS_V(*producer
, nir_lower_indirect_derefs
, indirect_mask
);
604 NIR_PASS_V(*consumer
, nir_lower_indirect_derefs
, indirect_mask
);
606 st_nir_opts(*producer
, scalar
);
607 st_nir_opts(*consumer
, scalar
);
609 /* Lowering indirects can cause varying to become unused.
610 * nir_compact_varyings() depends on all dead varyings being removed so
611 * we need to call nir_remove_dead_variables() again here.
613 NIR_PASS_V(*producer
, nir_remove_dead_variables
, nir_var_shader_out
);
614 NIR_PASS_V(*consumer
, nir_remove_dead_variables
, nir_var_shader_in
);
619 st_lower_patch_vertices_in(struct gl_shader_program
*shader_prog
)
621 struct gl_linked_shader
*linked_tcs
=
622 shader_prog
->_LinkedShaders
[MESA_SHADER_TESS_CTRL
];
623 struct gl_linked_shader
*linked_tes
=
624 shader_prog
->_LinkedShaders
[MESA_SHADER_TESS_EVAL
];
626 /* If we have a TCS and TES linked together, lower TES patch vertices. */
627 if (linked_tcs
&& linked_tes
) {
628 nir_shader
*tcs_nir
= linked_tcs
->Program
->nir
;
629 nir_shader
*tes_nir
= linked_tes
->Program
->nir
;
631 /* The TES input vertex count is the TCS output vertex count,
632 * lower TES gl_PatchVerticesIn to a constant.
634 uint32_t tes_patch_verts
= tcs_nir
->info
.tess
.tcs_vertices_out
;
635 NIR_PASS_V(tes_nir
, nir_lower_patch_vertices
, tes_patch_verts
, NULL
);
642 st_nir_lower_wpos_ytransform(struct nir_shader
*nir
,
643 struct gl_program
*prog
,
644 struct pipe_screen
*pscreen
)
646 if (nir
->info
.stage
!= MESA_SHADER_FRAGMENT
)
649 static const gl_state_index16 wposTransformState
[STATE_LENGTH
] = {
650 STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
652 nir_lower_wpos_ytransform_options wpos_options
= { { 0 } };
654 memcpy(wpos_options
.state_tokens
, wposTransformState
,
655 sizeof(wpos_options
.state_tokens
));
656 wpos_options
.fs_coord_origin_upper_left
=
657 pscreen
->get_param(pscreen
,
658 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
);
659 wpos_options
.fs_coord_origin_lower_left
=
660 pscreen
->get_param(pscreen
,
661 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
662 wpos_options
.fs_coord_pixel_center_integer
=
663 pscreen
->get_param(pscreen
,
664 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
665 wpos_options
.fs_coord_pixel_center_half_integer
=
666 pscreen
->get_param(pscreen
,
667 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
);
669 if (nir_lower_wpos_ytransform(nir
, &wpos_options
)) {
670 nir_validate_shader(nir
, "after nir_lower_wpos_ytransform");
671 _mesa_add_state_reference(prog
->Parameters
, wposTransformState
);
676 st_link_nir(struct gl_context
*ctx
,
677 struct gl_shader_program
*shader_program
)
679 struct st_context
*st
= st_context(ctx
);
680 struct pipe_screen
*screen
= st
->pipe
->screen
;
681 bool is_scalar
[MESA_SHADER_STAGES
];
683 unsigned last_stage
= 0;
684 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
685 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
689 /* Determine scalar property of each shader stage */
690 enum pipe_shader_type type
= pipe_shader_type_from_mesa(shader
->Stage
);
691 is_scalar
[i
] = screen
->get_shader_param(screen
, type
,
692 PIPE_SHADER_CAP_SCALAR_ISA
);
694 st_nir_get_mesa_program(ctx
, shader_program
, shader
);
698 NIR_PASS_V(shader
->Program
->nir
, nir_lower_load_const_to_scalar
);
702 /* Linking the stages in the opposite order (from fragment to vertex)
703 * ensures that inter-shader outputs written to in an earlier stage
704 * are eliminated if they are (transitively) not used in a later
707 int next
= last_stage
;
708 for (int i
= next
- 1; i
>= 0; i
--) {
709 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
713 st_nir_link_shaders(&shader
->Program
->nir
,
714 &shader_program
->_LinkedShaders
[next
]->Program
->nir
,
720 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
721 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
725 nir_shader
*nir
= shader
->Program
->nir
;
727 NIR_PASS_V(nir
, st_nir_lower_wpos_ytransform
, shader
->Program
,
730 NIR_PASS_V(nir
, nir_lower_system_values
);
731 NIR_PASS_V(nir
, nir_lower_clip_cull_distance_arrays
);
733 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
734 shader
->Program
->info
= nir
->info
;
735 if (i
== MESA_SHADER_VERTEX
) {
736 /* NIR expands dual-slot inputs out to two locations. We need to
737 * compact things back down GL-style single-slot inputs to avoid
738 * confusing the state tracker.
740 shader
->Program
->info
.inputs_read
=
741 nir_get_single_slot_attribs_mask(nir
->info
.inputs_read
,
742 shader
->Program
->DualSlotInputs
);
746 struct gl_program
*prev_shader
=
747 shader_program
->_LinkedShaders
[prev
]->Program
;
749 /* We can't use nir_compact_varyings with transform feedback, since
750 * the pipe_stream_output->output_register field is based on the
751 * pre-compacted driver_locations.
753 if (!(prev_shader
->sh
.LinkedTransformFeedback
&&
754 prev_shader
->sh
.LinkedTransformFeedback
->NumVarying
> 0))
755 nir_compact_varyings(shader_program
->_LinkedShaders
[prev
]->Program
->nir
,
756 nir
, ctx
->API
!= API_OPENGL_COMPAT
);
758 if (ctx
->Const
.ShaderCompilerOptions
[i
].NirOptions
->vectorize_io
)
759 st_nir_vectorize_io(prev_shader
->nir
, nir
);
764 st_lower_patch_vertices_in(shader_program
);
766 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
767 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
771 st_glsl_to_nir_post_opts(st
, shader
->Program
, shader_program
);
773 assert(shader
->Program
);
774 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
775 _mesa_shader_stage_to_program(i
),
777 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
781 nir_sweep(shader
->Program
->nir
);
783 /* The GLSL IR won't be needed anymore. */
784 ralloc_free(shader
->ir
);
792 st_nir_assign_varying_locations(struct st_context
*st
, nir_shader
*nir
)
794 if (nir
->info
.stage
== MESA_SHADER_VERTEX
) {
795 /* Needs special handling so drvloc matches the vbo state: */
796 st_nir_assign_vs_in_locations(nir
);
797 /* Re-lower global vars, to deal with any dead VS inputs. */
798 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
800 nir_assign_io_var_locations(&nir
->outputs
,
803 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
804 } else if (nir
->info
.stage
== MESA_SHADER_GEOMETRY
||
805 nir
->info
.stage
== MESA_SHADER_TESS_CTRL
||
806 nir
->info
.stage
== MESA_SHADER_TESS_EVAL
) {
807 nir_assign_io_var_locations(&nir
->inputs
,
810 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
812 nir_assign_io_var_locations(&nir
->outputs
,
815 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
816 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
817 nir_assign_io_var_locations(&nir
->inputs
,
820 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
821 nir_assign_io_var_locations(&nir
->outputs
,
824 } else if (nir
->info
.stage
== MESA_SHADER_COMPUTE
) {
827 unreachable("invalid shader type");
832 st_nir_lower_samplers(struct pipe_screen
*screen
, nir_shader
*nir
,
833 struct gl_shader_program
*shader_program
,
834 struct gl_program
*prog
)
836 if (screen
->get_param(screen
, PIPE_CAP_NIR_SAMPLERS_AS_DEREF
))
837 NIR_PASS_V(nir
, gl_nir_lower_samplers_as_deref
, shader_program
);
839 NIR_PASS_V(nir
, gl_nir_lower_samplers
, shader_program
);
842 prog
->info
.textures_used
= nir
->info
.textures_used
;
843 prog
->info
.textures_used_by_txf
= nir
->info
.textures_used_by_txf
;
847 /* Last third of preparing nir from glsl, which happens after shader
851 st_finalize_nir(struct st_context
*st
, struct gl_program
*prog
,
852 struct gl_shader_program
*shader_program
, nir_shader
*nir
)
854 struct pipe_screen
*screen
= st
->pipe
->screen
;
855 const nir_shader_compiler_options
*options
=
856 st
->ctx
->Const
.ShaderCompilerOptions
[prog
->info
.stage
].NirOptions
;
858 NIR_PASS_V(nir
, nir_split_var_copies
);
859 NIR_PASS_V(nir
, nir_lower_var_copies
);
860 if (options
->lower_all_io_to_temps
||
861 options
->lower_all_io_to_elements
||
862 nir
->info
.stage
== MESA_SHADER_VERTEX
||
863 nir
->info
.stage
== MESA_SHADER_GEOMETRY
) {
864 NIR_PASS_V(nir
, nir_lower_io_arrays_to_elements_no_indirects
, false);
865 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
866 NIR_PASS_V(nir
, nir_lower_io_arrays_to_elements_no_indirects
, true);
869 st_nir_assign_varying_locations(st
, nir
);
871 NIR_PASS_V(nir
, nir_lower_atomics_to_ssbo
,
872 st
->ctx
->Const
.Program
[nir
->info
.stage
].MaxAtomicBuffers
);
874 st_nir_assign_uniform_locations(st
->ctx
, prog
,
877 /* Set num_uniforms in number of attribute slots (vec4s) */
878 nir
->num_uniforms
= DIV_ROUND_UP(prog
->Parameters
->NumParameterValues
, 4);
880 if (st
->ctx
->Const
.PackedDriverUniformStorage
) {
881 NIR_PASS_V(nir
, nir_lower_io
, nir_var_uniform
, st_glsl_type_dword_size
,
882 (nir_lower_io_options
)0);
883 NIR_PASS_V(nir
, nir_lower_uniforms_to_ubo
, 4);
885 NIR_PASS_V(nir
, nir_lower_io
, nir_var_uniform
, st_glsl_uniforms_type_size
,
886 (nir_lower_io_options
)0);
889 st_nir_lower_samplers(screen
, nir
, shader_program
, prog
);