st/nir: Fix assigning PointCoord location with !PIPE_CAP_TEXCOORD
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/context.h"
35 #include "main/mtypes.h"
36 #include "main/errors.h"
37 #include "main/glspirv.h"
38 #include "main/shaderapi.h"
39 #include "main/uniforms.h"
40
41 #include "main/shaderobj.h"
42 #include "st_context.h"
43 #include "st_program.h"
44 #include "st_shader_cache.h"
45
46 #include "compiler/nir/nir.h"
47 #include "compiler/glsl_types.h"
48 #include "compiler/glsl/glsl_to_nir.h"
49 #include "compiler/glsl/gl_nir.h"
50 #include "compiler/glsl/gl_nir_linker.h"
51 #include "compiler/glsl/ir.h"
52 #include "compiler/glsl/ir_optimization.h"
53 #include "compiler/glsl/string_to_uint_map.h"
54
55 static int
56 type_size(const struct glsl_type *type)
57 {
58 return type->count_attribute_slots(false);
59 }
60
61 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
62 * may need to fix up varying slots so the glsl->nir path is aligned
63 * with the anything->tgsi->nir path.
64 */
65 static void
66 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
67 {
68 if (st->needs_texcoord_semantic)
69 return;
70
71 nir_foreach_variable(var, var_list) {
72 if (var->data.location >= VARYING_SLOT_VAR0) {
73 var->data.location += 9;
74 } else if (var->data.location == VARYING_SLOT_PNTC) {
75 var->data.location = VARYING_SLOT_VAR8;
76 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
77 (var->data.location <= VARYING_SLOT_TEX7)) {
78 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
79 }
80 }
81 }
82
83 /* input location assignment for VS inputs must be handled specially, so
84 * that it is aligned w/ st's vbo state.
85 * (This isn't the case with, for ex, FS inputs, which only need to agree
86 * on varying-slot w/ the VS outputs)
87 */
88 void
89 st_nir_assign_vs_in_locations(struct nir_shader *nir)
90 {
91 if (nir->info.stage != MESA_SHADER_VERTEX)
92 return;
93
94 bool removed_inputs = false;
95
96 nir->num_inputs = util_bitcount64(nir->info.inputs_read);
97 nir_foreach_variable_safe(var, &nir->inputs) {
98 /* NIR already assigns dual-slot inputs to two locations so all we have
99 * to do is compact everything down.
100 */
101 if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
102 var->data.driver_location =
103 util_bitcount64(nir->info.inputs_read &
104 BITFIELD64_MASK(var->data.location));
105 } else {
106 /* Move unused input variables to the globals list (with no
107 * initialization), to avoid confusing drivers looking through the
108 * inputs array and expecting to find inputs with a driver_location
109 * set.
110 */
111 exec_node_remove(&var->node);
112 var->data.mode = nir_var_shader_temp;
113 exec_list_push_tail(&nir->globals, &var->node);
114 removed_inputs = true;
115 }
116 }
117
118 /* Re-lower global vars, to deal with any dead VS inputs. */
119 if (removed_inputs)
120 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
121 }
122
123 static int
124 st_nir_lookup_parameter_index(struct gl_program *prog, nir_variable *var)
125 {
126 struct gl_program_parameter_list *params = prog->Parameters;
127
128 /* Lookup the first parameter that the uniform storage that match the
129 * variable location.
130 */
131 for (unsigned i = 0; i < params->NumParameters; i++) {
132 int index = params->Parameters[i].MainUniformStorageIndex;
133 if (index == var->data.location)
134 return i;
135 }
136
137 /* TODO: Handle this fallback for SPIR-V. We need this for GLSL e.g. in
138 * dEQP-GLES2.functional.uniform_api.random.3
139 */
140
141 /* is there a better way to do this? If we have something like:
142 *
143 * struct S {
144 * float f;
145 * vec4 v;
146 * };
147 * uniform S color;
148 *
149 * Then what we get in prog->Parameters looks like:
150 *
151 * 0: Name=color.f, Type=6, DataType=1406, Size=1
152 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
153 *
154 * So the name doesn't match up and _mesa_lookup_parameter_index()
155 * fails. In this case just find the first matching "color.*"..
156 *
157 * Note for arrays you could end up w/ color[n].f, for example.
158 *
159 * glsl_to_tgsi works slightly differently in this regard. It is
160 * emitting something more low level, so it just translates the
161 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
162 * it just calculates the additional offset of struct field members
163 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
164 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
165 * needs to work backwards to get base var loc from the param-list
166 * which already has them separated out.
167 */
168 if (!prog->sh.data->spirv) {
169 int namelen = strlen(var->name);
170 for (unsigned i = 0; i < params->NumParameters; i++) {
171 struct gl_program_parameter *p = &params->Parameters[i];
172 if ((strncmp(p->Name, var->name, namelen) == 0) &&
173 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
174 return i;
175 }
176 }
177 }
178
179 return -1;
180 }
181
182 static void
183 st_nir_assign_uniform_locations(struct gl_context *ctx,
184 struct gl_program *prog,
185 struct exec_list *uniform_list)
186 {
187 int shaderidx = 0;
188 int imageidx = 0;
189
190 nir_foreach_variable(uniform, uniform_list) {
191 int loc;
192
193 /*
194 * UBO's have their own address spaces, so don't count them towards the
195 * number of global uniforms
196 */
197 if (uniform->data.mode == nir_var_mem_ubo || uniform->data.mode == nir_var_mem_ssbo)
198 continue;
199
200 const struct glsl_type *type = glsl_without_array(uniform->type);
201 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
202 if (type->is_sampler()) {
203 loc = shaderidx;
204 shaderidx += type_size(uniform->type);
205 } else {
206 loc = imageidx;
207 imageidx += type_size(uniform->type);
208 }
209 } else if (uniform->state_slots) {
210 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
211 /* This state reference has already been setup by ir_to_mesa, but we'll
212 * get the same index back here.
213 */
214
215 unsigned comps;
216 if (glsl_type_is_struct_or_ifc(type)) {
217 comps = 4;
218 } else {
219 comps = glsl_get_vector_elements(type);
220 }
221
222 if (ctx->Const.PackedDriverUniformStorage) {
223 loc = _mesa_add_sized_state_reference(prog->Parameters,
224 stateTokens, comps, false);
225 loc = prog->Parameters->ParameterValueOffset[loc];
226 } else {
227 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
228 }
229 } else {
230 loc = st_nir_lookup_parameter_index(prog, uniform);
231
232 /* We need to check that loc is not -1 here before accessing the
233 * array. It can be negative for example when we have a struct that
234 * only contains opaque types.
235 */
236 if (loc >= 0 && ctx->Const.PackedDriverUniformStorage) {
237 loc = prog->Parameters->ParameterValueOffset[loc];
238 }
239 }
240
241 uniform->data.driver_location = loc;
242 }
243 }
244
245 void
246 st_nir_opts(nir_shader *nir)
247 {
248 bool progress;
249
250 do {
251 progress = false;
252
253 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
254
255 /* Linking deals with unused inputs/outputs, but here we can remove
256 * things local to the shader in the hopes that we can cleanup other
257 * things. This pass will also remove variables with only stores, so we
258 * might be able to make progress after it.
259 */
260 NIR_PASS(progress, nir, nir_remove_dead_variables,
261 (nir_variable_mode)(nir_var_function_temp |
262 nir_var_shader_temp |
263 nir_var_mem_shared));
264
265 NIR_PASS(progress, nir, nir_opt_copy_prop_vars);
266 NIR_PASS(progress, nir, nir_opt_dead_write_vars);
267
268 if (nir->options->lower_to_scalar) {
269 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
270 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
271 }
272
273 NIR_PASS_V(nir, nir_lower_alu);
274 NIR_PASS_V(nir, nir_lower_pack);
275 NIR_PASS(progress, nir, nir_copy_prop);
276 NIR_PASS(progress, nir, nir_opt_remove_phis);
277 NIR_PASS(progress, nir, nir_opt_dce);
278 if (nir_opt_trivial_continues(nir)) {
279 progress = true;
280 NIR_PASS(progress, nir, nir_copy_prop);
281 NIR_PASS(progress, nir, nir_opt_dce);
282 }
283 NIR_PASS(progress, nir, nir_opt_if, false);
284 NIR_PASS(progress, nir, nir_opt_dead_cf);
285 NIR_PASS(progress, nir, nir_opt_cse);
286 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
287
288 NIR_PASS(progress, nir, nir_opt_algebraic);
289 NIR_PASS(progress, nir, nir_opt_constant_folding);
290
291 if (!nir->info.flrp_lowered) {
292 unsigned lower_flrp =
293 (nir->options->lower_flrp16 ? 16 : 0) |
294 (nir->options->lower_flrp32 ? 32 : 0) |
295 (nir->options->lower_flrp64 ? 64 : 0);
296
297 if (lower_flrp) {
298 bool lower_flrp_progress = false;
299
300 NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp,
301 lower_flrp,
302 false /* always_precise */,
303 nir->options->lower_ffma);
304 if (lower_flrp_progress) {
305 NIR_PASS(progress, nir,
306 nir_opt_constant_folding);
307 progress = true;
308 }
309 }
310
311 /* Nothing should rematerialize any flrps, so we only need to do this
312 * lowering once.
313 */
314 nir->info.flrp_lowered = true;
315 }
316
317 NIR_PASS(progress, nir, nir_opt_undef);
318 NIR_PASS(progress, nir, nir_opt_conditional_discard);
319 if (nir->options->max_unroll_iterations) {
320 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
321 }
322 } while (progress);
323 }
324
325 static void
326 shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
327 {
328 assert(glsl_type_is_vector_or_scalar(type));
329
330 uint32_t comp_size = glsl_type_is_boolean(type)
331 ? 4 : glsl_get_bit_size(type) / 8;
332 unsigned length = glsl_get_vector_elements(type);
333 *size = comp_size * length,
334 *align = comp_size * (length == 3 ? 4 : length);
335 }
336
337 /* First third of converting glsl_to_nir.. this leaves things in a pre-
338 * nir_lower_io state, so that shader variants can more easily insert/
339 * replace variables, etc.
340 */
341 static void
342 st_nir_preprocess(struct st_context *st, struct gl_program *prog,
343 struct gl_shader_program *shader_program,
344 gl_shader_stage stage)
345 {
346 struct pipe_screen *screen = st->pipe->screen;
347 const nir_shader_compiler_options *options =
348 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
349 assert(options);
350 nir_shader *nir = prog->nir;
351
352 /* Set the next shader stage hint for VS and TES. */
353 if (!nir->info.separate_shader &&
354 (nir->info.stage == MESA_SHADER_VERTEX ||
355 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
356
357 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
358 unsigned stages_mask =
359 ~prev_stages & shader_program->data->linked_stages;
360
361 nir->info.next_stage = stages_mask ?
362 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
363 } else {
364 nir->info.next_stage = MESA_SHADER_FRAGMENT;
365 }
366
367 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
368 if (!st->ctx->SoftFP64 && nir->info.uses_64bit &&
369 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
370 st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options);
371 }
372
373 /* ES has strict SSO validation rules for shader IO matching so we can't
374 * remove dead IO until the resource list has been built. Here we skip
375 * removing them until later. This will potentially make the IO lowering
376 * calls below do a little extra work but should otherwise have no impact.
377 */
378 if (!_mesa_is_gles(st->ctx) || !nir->info.separate_shader) {
379 nir_variable_mode mask =
380 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
381 nir_remove_dead_variables(nir, mask);
382 }
383
384 if (options->lower_all_io_to_temps ||
385 nir->info.stage == MESA_SHADER_VERTEX ||
386 nir->info.stage == MESA_SHADER_GEOMETRY) {
387 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
388 nir_shader_get_entrypoint(nir),
389 true, true);
390 } else if (nir->info.stage == MESA_SHADER_FRAGMENT ||
391 !screen->get_param(screen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) {
392 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
393 nir_shader_get_entrypoint(nir),
394 true, false);
395 }
396
397 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
398 NIR_PASS_V(nir, nir_split_var_copies);
399 NIR_PASS_V(nir, nir_lower_var_copies);
400
401 if (options->lower_to_scalar) {
402 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
403 }
404
405 /* before buffers and vars_to_ssa */
406 NIR_PASS_V(nir, gl_nir_lower_images, true);
407
408 /* TODO: Change GLSL to not lower shared memory. */
409 if (prog->nir->info.stage == MESA_SHADER_COMPUTE &&
410 shader_program->data->spirv) {
411 NIR_PASS_V(prog->nir, nir_lower_vars_to_explicit_types,
412 nir_var_mem_shared, shared_type_info);
413 NIR_PASS_V(prog->nir, nir_lower_explicit_io,
414 nir_var_mem_shared, nir_address_format_32bit_offset);
415 }
416
417 /* Do a round of constant folding to clean up address calculations */
418 NIR_PASS_V(nir, nir_opt_constant_folding);
419 }
420
421 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
422 * info on varyings, etc after NIR link time opts have been applied.
423 */
424 static void
425 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
426 struct gl_shader_program *shader_program)
427 {
428 nir_shader *nir = prog->nir;
429
430 /* Make a pass over the IR to add state references for any built-in
431 * uniforms that are used. This has to be done now (during linking).
432 * Code generation doesn't happen until the first time this shader is
433 * used for rendering. Waiting until then to generate the parameters is
434 * too late. At that point, the values for the built-in uniforms won't
435 * get sent to the shader.
436 */
437 nir_foreach_variable(var, &nir->uniforms) {
438 const nir_state_slot *const slots = var->state_slots;
439 if (slots != NULL) {
440 const struct glsl_type *type = glsl_without_array(var->type);
441 for (unsigned int i = 0; i < var->num_state_slots; i++) {
442 unsigned comps;
443 if (glsl_type_is_struct_or_ifc(type)) {
444 /* Builtin struct require specical handling for now we just
445 * make all members vec4. See st_nir_lower_builtin.
446 */
447 comps = 4;
448 } else {
449 comps = glsl_get_vector_elements(type);
450 }
451
452 if (st->ctx->Const.PackedDriverUniformStorage) {
453 _mesa_add_sized_state_reference(prog->Parameters,
454 slots[i].tokens,
455 comps, false);
456 } else {
457 _mesa_add_state_reference(prog->Parameters,
458 slots[i].tokens);
459 }
460 }
461 }
462 }
463
464 /* Avoid reallocation of the program parameter list, because the uniform
465 * storage is only associated with the original parameter list.
466 * This should be enough for Bitmap and DrawPixels constants.
467 */
468 _mesa_reserve_parameter_storage(prog->Parameters, 8);
469
470 /* This has to be done last. Any operation the can cause
471 * prog->ParameterValues to get reallocated (e.g., anything that adds a
472 * program constant) has to happen before creating this linkage.
473 */
474 _mesa_associate_uniform_storage(st->ctx, shader_program, prog);
475
476 st_set_prog_affected_state_flags(prog);
477
478 /* None of the builtins being lowered here can be produced by SPIR-V. See
479 * _mesa_builtin_uniform_desc.
480 */
481 if (!shader_program->data->spirv)
482 NIR_PASS_V(nir, st_nir_lower_builtin);
483
484 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
485 NIR_PASS_V(nir, nir_opt_intrinsics);
486
487 /* Lower 64-bit ops. */
488 if (nir->options->lower_int64_options ||
489 nir->options->lower_doubles_options) {
490 bool lowered_64bit_ops = false;
491 if (nir->options->lower_doubles_options) {
492 NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles,
493 st->ctx->SoftFP64, nir->options->lower_doubles_options);
494 }
495 if (nir->options->lower_int64_options) {
496 NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64,
497 nir->options->lower_int64_options);
498 }
499
500 if (lowered_64bit_ops)
501 st_nir_opts(nir);
502 }
503
504 nir_variable_mode mask = (nir_variable_mode)
505 (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp );
506 nir_remove_dead_variables(nir, mask);
507
508 if (!st->has_hw_atomics)
509 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo);
510
511 st_finalize_nir_before_variants(nir);
512
513 if (st->allow_st_finalize_nir_twice)
514 st_finalize_nir(st, prog, shader_program, nir, true);
515
516 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
517 _mesa_log("\n");
518 _mesa_log("NIR IR for linked %s program %d:\n",
519 _mesa_shader_stage_to_string(prog->info.stage),
520 shader_program->Name);
521 nir_print_shader(nir, _mesa_get_log_file());
522 _mesa_log("\n\n");
523 }
524 }
525
526 static void
527 st_nir_vectorize_io(nir_shader *producer, nir_shader *consumer)
528 {
529 NIR_PASS_V(producer, nir_lower_io_to_vector, nir_var_shader_out);
530 NIR_PASS_V(producer, nir_opt_combine_stores, nir_var_shader_out);
531 NIR_PASS_V(consumer, nir_lower_io_to_vector, nir_var_shader_in);
532
533 if ((producer)->info.stage != MESA_SHADER_TESS_CTRL) {
534 /* Calling lower_io_to_vector creates output variable writes with
535 * write-masks. We only support these for TCS outputs, so for other
536 * stages, we need to call nir_lower_io_to_temporaries to get rid of
537 * them. This, in turn, creates temporary variables and extra
538 * copy_deref intrinsics that we need to clean up.
539 */
540 NIR_PASS_V(producer, nir_lower_io_to_temporaries,
541 nir_shader_get_entrypoint(producer), true, false);
542 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
543 NIR_PASS_V(producer, nir_split_var_copies);
544 NIR_PASS_V(producer, nir_lower_var_copies);
545 }
546 }
547
548 static void
549 st_nir_link_shaders(nir_shader *producer, nir_shader *consumer)
550 {
551 if (producer->options->lower_to_scalar) {
552 NIR_PASS_V(producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
553 NIR_PASS_V(consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
554 }
555
556 nir_lower_io_arrays_to_elements(producer, consumer);
557
558 st_nir_opts(producer);
559 st_nir_opts(consumer);
560
561 if (nir_link_opt_varyings(producer, consumer))
562 st_nir_opts(consumer);
563
564 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out);
565 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in);
566
567 if (nir_remove_unused_varyings(producer, consumer)) {
568 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
569 NIR_PASS_V(consumer, nir_lower_global_vars_to_local);
570
571 st_nir_opts(producer);
572 st_nir_opts(consumer);
573
574 /* Optimizations can cause varyings to become unused.
575 * nir_compact_varyings() depends on all dead varyings being removed so
576 * we need to call nir_remove_dead_variables() again here.
577 */
578 NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out);
579 NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in);
580 }
581 }
582
583 static void
584 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
585 {
586 struct gl_linked_shader *linked_tcs =
587 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
588 struct gl_linked_shader *linked_tes =
589 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
590
591 /* If we have a TCS and TES linked together, lower TES patch vertices. */
592 if (linked_tcs && linked_tes) {
593 nir_shader *tcs_nir = linked_tcs->Program->nir;
594 nir_shader *tes_nir = linked_tes->Program->nir;
595
596 /* The TES input vertex count is the TCS output vertex count,
597 * lower TES gl_PatchVerticesIn to a constant.
598 */
599 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
600 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
601 }
602 }
603
604 extern "C" {
605
606 void
607 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
608 struct gl_program *prog,
609 struct pipe_screen *pscreen)
610 {
611 if (nir->info.stage != MESA_SHADER_FRAGMENT)
612 return;
613
614 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
615 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
616 };
617 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
618
619 memcpy(wpos_options.state_tokens, wposTransformState,
620 sizeof(wpos_options.state_tokens));
621 wpos_options.fs_coord_origin_upper_left =
622 pscreen->get_param(pscreen,
623 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
624 wpos_options.fs_coord_origin_lower_left =
625 pscreen->get_param(pscreen,
626 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
627 wpos_options.fs_coord_pixel_center_integer =
628 pscreen->get_param(pscreen,
629 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
630 wpos_options.fs_coord_pixel_center_half_integer =
631 pscreen->get_param(pscreen,
632 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
633
634 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
635 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
636 _mesa_add_state_reference(prog->Parameters, wposTransformState);
637 }
638 }
639
640 bool
641 st_link_nir(struct gl_context *ctx,
642 struct gl_shader_program *shader_program)
643 {
644 struct st_context *st = st_context(ctx);
645 struct gl_linked_shader *linked_shader[MESA_SHADER_STAGES];
646 unsigned num_shaders = 0;
647
648 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
649 if (shader_program->_LinkedShaders[i])
650 linked_shader[num_shaders++] = shader_program->_LinkedShaders[i];
651 }
652
653 for (unsigned i = 0; i < num_shaders; i++) {
654 struct gl_linked_shader *shader = linked_shader[i];
655 const nir_shader_compiler_options *options =
656 st->ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions;
657 struct gl_program *prog = shader->Program;
658 struct st_program *stp = (struct st_program *)prog;
659
660 _mesa_copy_linked_program_data(shader_program, shader);
661
662 assert(!prog->nir);
663 stp->shader_program = shader_program;
664 stp->state.type = PIPE_SHADER_IR_NIR;
665
666 /* Parameters will be filled during NIR linking. */
667 prog->Parameters = _mesa_new_parameter_list();
668
669 if (shader_program->data->spirv) {
670 prog->nir = _mesa_spirv_to_nir(ctx, shader_program, shader->Stage, options);
671 } else {
672 validate_ir_tree(shader->ir);
673
674 if (ctx->_Shader->Flags & GLSL_DUMP) {
675 _mesa_log("\n");
676 _mesa_log("GLSL IR for linked %s program %d:\n",
677 _mesa_shader_stage_to_string(shader->Stage),
678 shader_program->Name);
679 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
680 _mesa_log("\n\n");
681 }
682
683 prog->nir = glsl_to_nir(st->ctx, shader_program, shader->Stage, options);
684 st_nir_preprocess(st, prog, shader_program, shader->Stage);
685 }
686
687 if (options->lower_to_scalar) {
688 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
689 }
690 }
691
692 st_lower_patch_vertices_in(shader_program);
693
694 /* For SPIR-V, we have to perform the NIR linking before applying
695 * st_nir_preprocess.
696 */
697 if (shader_program->data->spirv) {
698 static const gl_nir_linker_options opts = {
699 true /*fill_parameters */
700 };
701 if (!gl_nir_link_spirv(ctx, shader_program, &opts))
702 return GL_FALSE;
703
704 nir_build_program_resource_list(ctx, shader_program, true);
705
706 for (unsigned i = 0; i < num_shaders; i++) {
707 struct gl_linked_shader *shader = linked_shader[i];
708 struct gl_program *prog = shader->Program;
709
710 prog->ExternalSamplersUsed = gl_external_samplers(prog);
711 _mesa_update_shader_textures_used(shader_program, prog);
712 st_nir_preprocess(st, prog, shader_program, shader->Stage);
713 }
714 }
715
716 /* Linking the stages in the opposite order (from fragment to vertex)
717 * ensures that inter-shader outputs written to in an earlier stage
718 * are eliminated if they are (transitively) not used in a later
719 * stage.
720 */
721 for (int i = num_shaders - 2; i >= 0; i--) {
722 st_nir_link_shaders(linked_shader[i]->Program->nir,
723 linked_shader[i + 1]->Program->nir);
724 }
725 /* Linking shaders also optimizes them. Separate shaders, compute shaders
726 * and shaders with a fixed-func VS or FS that don't need linking are
727 * optimized here.
728 */
729 if (num_shaders == 1)
730 st_nir_opts(linked_shader[0]->Program->nir);
731
732 if (!shader_program->data->spirv) {
733 if (!gl_nir_link_glsl(ctx, shader_program))
734 return GL_FALSE;
735
736 for (unsigned i = 0; i < num_shaders; i++) {
737 struct gl_program *prog = linked_shader[i]->Program;
738 prog->ExternalSamplersUsed = gl_external_samplers(prog);
739 _mesa_update_shader_textures_used(shader_program, prog);
740 }
741
742 nir_build_program_resource_list(ctx, shader_program, false);
743 }
744
745 for (unsigned i = 0; i < num_shaders; i++) {
746 struct gl_linked_shader *shader = linked_shader[i];
747 nir_shader *nir = shader->Program->nir;
748
749 /* This needs to run after the initial pass of nir_lower_vars_to_ssa, so
750 * that the buffer indices are constants in nir where they where
751 * constants in GLSL. */
752 NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program);
753
754 /* Remap the locations to slots so those requiring two slots will occupy
755 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
756 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
757 * locations/slots 0 and 1, and attr1 will use location/slot 2
758 */
759 if (nir->info.stage == MESA_SHADER_VERTEX && !shader_program->data->spirv)
760 nir_remap_dual_slot_attributes(nir, &shader->Program->DualSlotInputs);
761
762 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
763 st->pipe->screen);
764
765 NIR_PASS_V(nir, nir_lower_system_values);
766 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
767
768 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
769 shader->Program->info = nir->info;
770 if (shader->Stage == MESA_SHADER_VERTEX) {
771 /* NIR expands dual-slot inputs out to two locations. We need to
772 * compact things back down GL-style single-slot inputs to avoid
773 * confusing the state tracker.
774 */
775 shader->Program->info.inputs_read =
776 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
777 shader->Program->DualSlotInputs);
778 }
779
780 if (i >= 1) {
781 struct gl_program *prev_shader = linked_shader[i - 1]->Program;
782
783 /* We can't use nir_compact_varyings with transform feedback, since
784 * the pipe_stream_output->output_register field is based on the
785 * pre-compacted driver_locations.
786 */
787 if (!(prev_shader->sh.LinkedTransformFeedback &&
788 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
789 nir_compact_varyings(prev_shader->nir,
790 nir, ctx->API != API_OPENGL_COMPAT);
791
792 if (ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->vectorize_io)
793 st_nir_vectorize_io(prev_shader->nir, nir);
794 }
795 }
796
797 struct shader_info *prev_info = NULL;
798
799 for (unsigned i = 0; i < num_shaders; i++) {
800 struct gl_linked_shader *shader = linked_shader[i];
801 struct shader_info *info = &shader->Program->nir->info;
802
803 if (prev_info &&
804 ctx->Const.ShaderCompilerOptions[shader->Stage].NirOptions->unify_interfaces) {
805 prev_info->outputs_written |= info->inputs_read &
806 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
807 info->inputs_read |= prev_info->outputs_written &
808 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
809
810 prev_info->patch_outputs_written |= info->patch_inputs_read;
811 info->patch_inputs_read |= prev_info->patch_outputs_written;
812 }
813 prev_info = info;
814 }
815
816 for (unsigned i = 0; i < num_shaders; i++) {
817 struct gl_linked_shader *shader = linked_shader[i];
818 struct gl_program *prog = shader->Program;
819 struct st_program *stp = st_program(prog);
820 st_glsl_to_nir_post_opts(st, prog, shader_program);
821
822 /* Initialize st_vertex_program members. */
823 if (shader->Stage == MESA_SHADER_VERTEX)
824 st_prepare_vertex_program(stp);
825
826 /* Get pipe_stream_output_info. */
827 if (shader->Stage == MESA_SHADER_VERTEX ||
828 shader->Stage == MESA_SHADER_TESS_EVAL ||
829 shader->Stage == MESA_SHADER_GEOMETRY)
830 st_translate_stream_output_info(prog);
831
832 st_store_ir_in_disk_cache(st, prog, true);
833
834 st_release_variants(st, stp);
835 st_finalize_program(st, prog);
836
837 /* The GLSL IR won't be needed anymore. */
838 ralloc_free(shader->ir);
839 shader->ir = NULL;
840 }
841
842 return true;
843 }
844
845 void
846 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
847 {
848 if (nir->info.stage == MESA_SHADER_VERTEX) {
849 nir_assign_io_var_locations(&nir->outputs,
850 &nir->num_outputs,
851 nir->info.stage);
852 st_nir_fixup_varying_slots(st, &nir->outputs);
853 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
854 nir->info.stage == MESA_SHADER_TESS_CTRL ||
855 nir->info.stage == MESA_SHADER_TESS_EVAL) {
856 nir_assign_io_var_locations(&nir->inputs,
857 &nir->num_inputs,
858 nir->info.stage);
859 st_nir_fixup_varying_slots(st, &nir->inputs);
860
861 nir_assign_io_var_locations(&nir->outputs,
862 &nir->num_outputs,
863 nir->info.stage);
864 st_nir_fixup_varying_slots(st, &nir->outputs);
865 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
866 nir_assign_io_var_locations(&nir->inputs,
867 &nir->num_inputs,
868 nir->info.stage);
869 st_nir_fixup_varying_slots(st, &nir->inputs);
870 nir_assign_io_var_locations(&nir->outputs,
871 &nir->num_outputs,
872 nir->info.stage);
873 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
874 /* TODO? */
875 } else {
876 unreachable("invalid shader type");
877 }
878 }
879
880 void
881 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
882 struct gl_shader_program *shader_program,
883 struct gl_program *prog)
884 {
885 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
886 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
887 else
888 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
889
890 if (prog) {
891 prog->info.textures_used = nir->info.textures_used;
892 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
893 prog->info.images_used = nir->info.images_used;
894 }
895 }
896
897 static int
898 st_packed_uniforms_type_size(const struct glsl_type *type, bool bindless)
899 {
900 return glsl_count_dword_slots(type, bindless);
901 }
902
903 static int
904 st_unpacked_uniforms_type_size(const struct glsl_type *type, bool bindless)
905 {
906 return glsl_count_vec4_slots(type, false, bindless);
907 }
908
909 void
910 st_nir_lower_uniforms(struct st_context *st, nir_shader *nir)
911 {
912 if (st->ctx->Const.PackedDriverUniformStorage) {
913 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
914 st_packed_uniforms_type_size,
915 (nir_lower_io_options)0);
916 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
917 } else {
918 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform,
919 st_unpacked_uniforms_type_size,
920 (nir_lower_io_options)0);
921 }
922 }
923
924 /* Last third of preparing nir from glsl, which happens after shader
925 * variant lowering.
926 */
927 void
928 st_finalize_nir(struct st_context *st, struct gl_program *prog,
929 struct gl_shader_program *shader_program,
930 nir_shader *nir, bool finalize_by_driver)
931 {
932 struct pipe_screen *screen = st->pipe->screen;
933
934 NIR_PASS_V(nir, nir_split_var_copies);
935 NIR_PASS_V(nir, nir_lower_var_copies);
936
937 st_nir_assign_varying_locations(st, nir);
938 st_nir_assign_uniform_locations(st->ctx, prog,
939 &nir->uniforms);
940
941 /* Set num_uniforms in number of attribute slots (vec4s) */
942 nir->num_uniforms = DIV_ROUND_UP(prog->Parameters->NumParameterValues, 4);
943
944 st_nir_lower_uniforms(st, nir);
945 st_nir_lower_samplers(screen, nir, shader_program, prog);
946 if (!screen->get_param(screen, PIPE_CAP_NIR_IMAGES_AS_DEREF))
947 NIR_PASS_V(nir, gl_nir_lower_images, false);
948
949 if (finalize_by_driver && screen->finalize_nir)
950 screen->finalize_nir(screen, nir, false);
951 }
952
953 } /* extern "C" */