st/nir: Move 64-bit lowering later
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "main/shaderobj.h"
40 #include "st_context.h"
41 #include "st_glsl_types.h"
42 #include "st_program.h"
43
44 #include "compiler/nir/nir.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/glsl_to_nir.h"
47 #include "compiler/glsl/gl_nir.h"
48 #include "compiler/glsl/ir.h"
49 #include "compiler/glsl/ir_optimization.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51
52 static int
53 type_size(const struct glsl_type *type)
54 {
55 return type->count_attribute_slots(false);
56 }
57
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
61 */
62 static void
63 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
64 {
65 if (st->needs_texcoord_semantic)
66 return;
67
68 nir_foreach_variable(var, var_list) {
69 if (var->data.location >= VARYING_SLOT_VAR0) {
70 var->data.location += 9;
71 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
72 (var->data.location <= VARYING_SLOT_TEX7)) {
73 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
74 }
75 }
76 }
77
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
82 */
83 static void
84 st_nir_assign_vs_in_locations(nir_shader *nir)
85 {
86 nir->num_inputs = 0;
87 nir_foreach_variable_safe(var, &nir->inputs) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
90 */
91 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var->data.driver_location = util_bitcount64(nir->info.inputs_read);
94 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
95 var->data.driver_location =
96 util_bitcount64(nir->info.inputs_read &
97 BITFIELD64_MASK(var->data.location));
98 nir->num_inputs++;
99 } else {
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
103 * set.
104 */
105 exec_node_remove(&var->node);
106 var->data.mode = nir_var_shader_temp;
107 exec_list_push_tail(&nir->globals, &var->node);
108 }
109 }
110 }
111
112 static void
113 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
114 gl_shader_stage stage)
115 {
116 unsigned location = 0;
117 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
118 uint64_t processed_locs[2] = {0};
119
120 const int base = stage == MESA_SHADER_FRAGMENT ?
121 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
122
123 int UNUSED last_loc = 0;
124 nir_foreach_variable(var, var_list) {
125
126 const struct glsl_type *type = var->type;
127 if (nir_is_per_vertex_io(var, stage)) {
128 assert(glsl_type_is_array(type));
129 type = glsl_get_array_element(type);
130 }
131
132 unsigned var_size = type_size(type);
133
134 /* Builtins don't allow component packing so we only need to worry about
135 * user defined varyings sharing the same location.
136 */
137 bool processed = false;
138 if (var->data.location >= base) {
139 unsigned glsl_location = var->data.location - base;
140
141 for (unsigned i = 0; i < var_size; i++) {
142 if (processed_locs[var->data.index] &
143 ((uint64_t)1 << (glsl_location + i)))
144 processed = true;
145 else
146 processed_locs[var->data.index] |=
147 ((uint64_t)1 << (glsl_location + i));
148 }
149 }
150
151 /* Because component packing allows varyings to share the same location
152 * we may have already have processed this location.
153 */
154 if (processed) {
155 unsigned driver_location = assigned_locations[var->data.location];
156 var->data.driver_location = driver_location;
157 *size += type_size(type);
158
159 /* An array may be packed such that is crosses multiple other arrays
160 * or variables, we need to make sure we have allocated the elements
161 * consecutively if the previously proccessed var was shorter than
162 * the current array we are processing.
163 *
164 * NOTE: The code below assumes the var list is ordered in ascending
165 * location order.
166 */
167 assert(last_loc <= var->data.location);
168 last_loc = var->data.location;
169 unsigned last_slot_location = driver_location + var_size;
170 if (last_slot_location > location) {
171 unsigned num_unallocated_slots = last_slot_location - location;
172 unsigned first_unallocated_slot = var_size - num_unallocated_slots;
173 for (unsigned i = first_unallocated_slot; i < num_unallocated_slots; i++) {
174 assigned_locations[var->data.location + i] = location;
175 location++;
176 }
177 }
178 continue;
179 }
180
181 for (unsigned i = 0; i < var_size; i++) {
182 assigned_locations[var->data.location + i] = location + i;
183 }
184
185 var->data.driver_location = location;
186 location += var_size;
187 }
188
189 *size += location;
190 }
191
192 static int
193 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
194 const char *name)
195 {
196 int loc = _mesa_lookup_parameter_index(params, name);
197
198 /* is there a better way to do this? If we have something like:
199 *
200 * struct S {
201 * float f;
202 * vec4 v;
203 * };
204 * uniform S color;
205 *
206 * Then what we get in prog->Parameters looks like:
207 *
208 * 0: Name=color.f, Type=6, DataType=1406, Size=1
209 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
210 *
211 * So the name doesn't match up and _mesa_lookup_parameter_index()
212 * fails. In this case just find the first matching "color.*"..
213 *
214 * Note for arrays you could end up w/ color[n].f, for example.
215 *
216 * glsl_to_tgsi works slightly differently in this regard. It is
217 * emitting something more low level, so it just translates the
218 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
219 * it just calculates the additional offset of struct field members
220 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
221 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
222 * needs to work backwards to get base var loc from the param-list
223 * which already has them separated out.
224 */
225 if (loc < 0) {
226 int namelen = strlen(name);
227 for (unsigned i = 0; i < params->NumParameters; i++) {
228 struct gl_program_parameter *p = &params->Parameters[i];
229 if ((strncmp(p->Name, name, namelen) == 0) &&
230 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
231 loc = i;
232 break;
233 }
234 }
235 }
236
237 return loc;
238 }
239
240 static void
241 st_nir_assign_uniform_locations(struct gl_context *ctx,
242 struct gl_program *prog,
243 struct exec_list *uniform_list, unsigned *size)
244 {
245 int max = 0;
246 int shaderidx = 0;
247 int imageidx = 0;
248
249 nir_foreach_variable(uniform, uniform_list) {
250 int loc;
251
252 /*
253 * UBO's have their own address spaces, so don't count them towards the
254 * number of global uniforms
255 */
256 if (uniform->data.mode == nir_var_mem_ubo || uniform->data.mode == nir_var_mem_ssbo)
257 continue;
258
259 const struct glsl_type *type = glsl_without_array(uniform->type);
260 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
261 if (type->is_sampler()) {
262 loc = shaderidx;
263 shaderidx += type_size(uniform->type);
264 } else {
265 loc = imageidx;
266 imageidx += type_size(uniform->type);
267 }
268 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
269 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
270 /* This state reference has already been setup by ir_to_mesa, but we'll
271 * get the same index back here.
272 */
273
274 unsigned comps;
275 if (glsl_type_is_struct_or_ifc(type)) {
276 comps = 4;
277 } else {
278 comps = glsl_get_vector_elements(type);
279 }
280
281 if (ctx->Const.PackedDriverUniformStorage) {
282 loc = _mesa_add_sized_state_reference(prog->Parameters,
283 stateTokens, comps, false);
284 loc = prog->Parameters->ParameterValueOffset[loc];
285 } else {
286 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
287 }
288 } else {
289 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
290
291 if (ctx->Const.PackedDriverUniformStorage) {
292 loc = prog->Parameters->ParameterValueOffset[loc];
293 }
294 }
295
296 uniform->data.driver_location = loc;
297
298 max = MAX2(max, loc + type_size(uniform->type));
299 }
300 *size = max;
301 }
302
303 void
304 st_nir_opts(nir_shader *nir, bool scalar)
305 {
306 bool progress;
307 do {
308 progress = false;
309
310 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
311
312 if (scalar) {
313 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
314 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
315 }
316
317 NIR_PASS_V(nir, nir_lower_alu);
318 NIR_PASS_V(nir, nir_lower_pack);
319 NIR_PASS(progress, nir, nir_copy_prop);
320 NIR_PASS(progress, nir, nir_opt_remove_phis);
321 NIR_PASS(progress, nir, nir_opt_dce);
322 if (nir_opt_trivial_continues(nir)) {
323 progress = true;
324 NIR_PASS(progress, nir, nir_copy_prop);
325 NIR_PASS(progress, nir, nir_opt_dce);
326 }
327 NIR_PASS(progress, nir, nir_opt_if);
328 NIR_PASS(progress, nir, nir_opt_dead_cf);
329 NIR_PASS(progress, nir, nir_opt_cse);
330 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
331
332 NIR_PASS(progress, nir, nir_opt_algebraic);
333 NIR_PASS(progress, nir, nir_opt_constant_folding);
334
335 NIR_PASS(progress, nir, nir_opt_undef);
336 NIR_PASS(progress, nir, nir_opt_conditional_discard);
337 if (nir->options->max_unroll_iterations) {
338 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
339 }
340 } while (progress);
341 }
342
343 /* First third of converting glsl_to_nir.. this leaves things in a pre-
344 * nir_lower_io state, so that shader variants can more easily insert/
345 * replace variables, etc.
346 */
347 static nir_shader *
348 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
349 struct gl_shader_program *shader_program,
350 gl_shader_stage stage)
351 {
352 const nir_shader_compiler_options *options =
353 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
354 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
355 struct pipe_screen *screen = st->pipe->screen;
356 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
357 assert(options);
358 bool lower_64bit =
359 options->lower_int64_options || options->lower_doubles_options;
360
361 if (prog->nir)
362 return prog->nir;
363
364 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
365
366 /* Set the next shader stage hint for VS and TES. */
367 if (!nir->info.separate_shader &&
368 (nir->info.stage == MESA_SHADER_VERTEX ||
369 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
370
371 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
372 unsigned stages_mask =
373 ~prev_stages & shader_program->data->linked_stages;
374
375 nir->info.next_stage = stages_mask ?
376 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
377 } else {
378 nir->info.next_stage = MESA_SHADER_FRAGMENT;
379 }
380
381 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
382 nir_shader *softfp64 = NULL;
383 if (nir->info.uses_64bit &&
384 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
385 softfp64 = glsl_float64_funcs_to_nir(st->ctx, options);
386 ralloc_steal(ralloc_parent(nir), softfp64);
387 }
388
389 nir_variable_mode mask =
390 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
391 nir_remove_dead_variables(nir, mask);
392
393 if (options->lower_all_io_to_temps ||
394 nir->info.stage == MESA_SHADER_VERTEX ||
395 nir->info.stage == MESA_SHADER_GEOMETRY) {
396 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
397 nir_shader_get_entrypoint(nir),
398 true, true);
399 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
400 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
401 nir_shader_get_entrypoint(nir),
402 true, false);
403 }
404
405 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
406 NIR_PASS_V(nir, nir_split_var_copies);
407 NIR_PASS_V(nir, nir_lower_var_copies);
408
409 if (is_scalar) {
410 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
411 }
412
413 st_nir_opts(nir, is_scalar);
414
415 if (lower_64bit) {
416 bool lowered_64bit_ops = false;
417 bool progress = false;
418
419 NIR_PASS_V(nir, nir_opt_algebraic);
420
421 do {
422 progress = false;
423 if (options->lower_int64_options) {
424 NIR_PASS(progress, nir, nir_lower_int64,
425 options->lower_int64_options);
426 }
427 if (options->lower_doubles_options) {
428 NIR_PASS(progress, nir, nir_lower_doubles,
429 softfp64, options->lower_doubles_options);
430 }
431 NIR_PASS(progress, nir, nir_opt_algebraic);
432 lowered_64bit_ops |= progress;
433 } while (progress);
434
435 if (progress)
436 st_nir_opts(nir, is_scalar);
437 }
438
439 return nir;
440 }
441
442 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
443 * info on varyings, etc after NIR link time opts have been applied.
444 */
445 static void
446 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
447 struct gl_shader_program *shader_program)
448 {
449 nir_shader *nir = prog->nir;
450
451 /* Make a pass over the IR to add state references for any built-in
452 * uniforms that are used. This has to be done now (during linking).
453 * Code generation doesn't happen until the first time this shader is
454 * used for rendering. Waiting until then to generate the parameters is
455 * too late. At that point, the values for the built-in uniforms won't
456 * get sent to the shader.
457 */
458 nir_foreach_variable(var, &nir->uniforms) {
459 if (strncmp(var->name, "gl_", 3) == 0) {
460 const nir_state_slot *const slots = var->state_slots;
461 assert(var->state_slots != NULL);
462
463 const struct glsl_type *type = glsl_without_array(var->type);
464 for (unsigned int i = 0; i < var->num_state_slots; i++) {
465 unsigned comps;
466 if (glsl_type_is_struct_or_ifc(type)) {
467 /* Builtin struct require specical handling for now we just
468 * make all members vec4. See st_nir_lower_builtin.
469 */
470 comps = 4;
471 } else {
472 comps = glsl_get_vector_elements(type);
473 }
474
475 if (st->ctx->Const.PackedDriverUniformStorage) {
476 _mesa_add_sized_state_reference(prog->Parameters,
477 slots[i].tokens,
478 comps, false);
479 } else {
480 _mesa_add_state_reference(prog->Parameters,
481 slots[i].tokens);
482 }
483 }
484 }
485 }
486
487 /* Avoid reallocation of the program parameter list, because the uniform
488 * storage is only associated with the original parameter list.
489 * This should be enough for Bitmap and DrawPixels constants.
490 */
491 _mesa_reserve_parameter_storage(prog->Parameters, 8);
492
493 /* This has to be done last. Any operation the can cause
494 * prog->ParameterValues to get reallocated (e.g., anything that adds a
495 * program constant) has to happen before creating this linkage.
496 */
497 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
498
499 st_set_prog_affected_state_flags(prog);
500
501 NIR_PASS_V(nir, st_nir_lower_builtin);
502 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
503
504 nir_variable_mode mask = nir_var_function_temp;
505 nir_remove_dead_variables(nir, mask);
506
507 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
508 _mesa_log("\n");
509 _mesa_log("NIR IR for linked %s program %d:\n",
510 _mesa_shader_stage_to_string(prog->info.stage),
511 shader_program->Name);
512 nir_print_shader(nir, _mesa_get_log_file());
513 _mesa_log("\n\n");
514 }
515 }
516
517 /* TODO any better helper somewhere to sort a list? */
518
519 static void
520 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
521 {
522 nir_foreach_variable(var, var_list) {
523 if (var->data.location > new_var->data.location) {
524 exec_node_insert_node_before(&var->node, &new_var->node);
525 return;
526 }
527 }
528 exec_list_push_tail(var_list, &new_var->node);
529 }
530
531 static void
532 sort_varyings(struct exec_list *var_list)
533 {
534 struct exec_list new_list;
535 exec_list_make_empty(&new_list);
536 nir_foreach_variable_safe(var, var_list) {
537 exec_node_remove(&var->node);
538 insert_sorted(&new_list, var);
539 }
540 exec_list_move_nodes_to(&new_list, var_list);
541 }
542
543 static void
544 set_st_program(struct gl_program *prog,
545 struct gl_shader_program *shader_program,
546 nir_shader *nir)
547 {
548 struct st_vertex_program *stvp;
549 struct st_common_program *stp;
550 struct st_fragment_program *stfp;
551 struct st_compute_program *stcp;
552
553 switch (prog->info.stage) {
554 case MESA_SHADER_VERTEX:
555 stvp = (struct st_vertex_program *)prog;
556 stvp->shader_program = shader_program;
557 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
558 stvp->tgsi.ir.nir = nir;
559 break;
560 case MESA_SHADER_GEOMETRY:
561 case MESA_SHADER_TESS_CTRL:
562 case MESA_SHADER_TESS_EVAL:
563 stp = (struct st_common_program *)prog;
564 stp->shader_program = shader_program;
565 stp->tgsi.type = PIPE_SHADER_IR_NIR;
566 stp->tgsi.ir.nir = nir;
567 break;
568 case MESA_SHADER_FRAGMENT:
569 stfp = (struct st_fragment_program *)prog;
570 stfp->shader_program = shader_program;
571 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
572 stfp->tgsi.ir.nir = nir;
573 break;
574 case MESA_SHADER_COMPUTE:
575 stcp = (struct st_compute_program *)prog;
576 stcp->shader_program = shader_program;
577 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
578 stcp->tgsi.prog = nir;
579 break;
580 default:
581 unreachable("unknown shader stage");
582 }
583 }
584
585 static void
586 st_nir_get_mesa_program(struct gl_context *ctx,
587 struct gl_shader_program *shader_program,
588 struct gl_linked_shader *shader)
589 {
590 struct st_context *st = st_context(ctx);
591 struct pipe_screen *pscreen = ctx->st->pipe->screen;
592 struct gl_program *prog;
593
594 validate_ir_tree(shader->ir);
595
596 prog = shader->Program;
597
598 prog->Parameters = _mesa_new_parameter_list();
599
600 _mesa_copy_linked_program_data(shader_program, shader);
601 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
602 prog->Parameters);
603
604 /* Remove reads from output registers. */
605 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
606 lower_output_reads(shader->Stage, shader->ir);
607
608 if (ctx->_Shader->Flags & GLSL_DUMP) {
609 _mesa_log("\n");
610 _mesa_log("GLSL IR for linked %s program %d:\n",
611 _mesa_shader_stage_to_string(shader->Stage),
612 shader_program->Name);
613 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
614 _mesa_log("\n\n");
615 }
616
617 prog->ExternalSamplersUsed = gl_external_samplers(prog);
618 _mesa_update_shader_textures_used(shader_program, prog);
619
620 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
621
622 set_st_program(prog, shader_program, nir);
623 prog->nir = nir;
624 }
625
626 static void
627 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
628 {
629 if (scalar) {
630 NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
631 NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
632 }
633
634 nir_lower_io_arrays_to_elements(*producer, *consumer);
635
636 st_nir_opts(*producer, scalar);
637 st_nir_opts(*consumer, scalar);
638
639 if (nir_link_opt_varyings(*producer, *consumer))
640 st_nir_opts(*consumer, scalar);
641
642 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
643 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
644
645 if (nir_remove_unused_varyings(*producer, *consumer)) {
646 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
647 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
648
649 /* The backend might not be able to handle indirects on
650 * temporaries so we need to lower indirects on any of the
651 * varyings we have demoted here.
652 *
653 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
654 * currently smart enough to handle indirects without causing excess
655 * spilling causing the gpu to hang.
656 *
657 * See the following thread for more details of the problem:
658 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
659 */
660 nir_variable_mode indirect_mask = nir_var_function_temp;
661
662 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
663 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
664
665 st_nir_opts(*producer, scalar);
666 st_nir_opts(*consumer, scalar);
667
668 /* Lowering indirects can cause varying to become unused.
669 * nir_compact_varyings() depends on all dead varyings being removed so
670 * we need to call nir_remove_dead_variables() again here.
671 */
672 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
673 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
674 }
675 }
676
677 static void
678 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
679 {
680 struct gl_linked_shader *linked_tcs =
681 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
682 struct gl_linked_shader *linked_tes =
683 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
684
685 /* If we have a TCS and TES linked together, lower TES patch vertices. */
686 if (linked_tcs && linked_tes) {
687 nir_shader *tcs_nir = linked_tcs->Program->nir;
688 nir_shader *tes_nir = linked_tes->Program->nir;
689
690 /* The TES input vertex count is the TCS output vertex count,
691 * lower TES gl_PatchVerticesIn to a constant.
692 */
693 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
694 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
695 }
696 }
697
698 extern "C" {
699
700 void
701 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
702 struct gl_program *prog,
703 struct pipe_screen *pscreen)
704 {
705 if (nir->info.stage != MESA_SHADER_FRAGMENT)
706 return;
707
708 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
709 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
710 };
711 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
712
713 memcpy(wpos_options.state_tokens, wposTransformState,
714 sizeof(wpos_options.state_tokens));
715 wpos_options.fs_coord_origin_upper_left =
716 pscreen->get_param(pscreen,
717 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
718 wpos_options.fs_coord_origin_lower_left =
719 pscreen->get_param(pscreen,
720 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
721 wpos_options.fs_coord_pixel_center_integer =
722 pscreen->get_param(pscreen,
723 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
724 wpos_options.fs_coord_pixel_center_half_integer =
725 pscreen->get_param(pscreen,
726 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
727
728 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
729 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
730 _mesa_add_state_reference(prog->Parameters, wposTransformState);
731 }
732 }
733
734 bool
735 st_link_nir(struct gl_context *ctx,
736 struct gl_shader_program *shader_program)
737 {
738 struct st_context *st = st_context(ctx);
739 struct pipe_screen *screen = st->pipe->screen;
740 bool is_scalar[MESA_SHADER_STAGES];
741
742 unsigned last_stage = 0;
743 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
744 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
745 if (shader == NULL)
746 continue;
747
748 /* Determine scalar property of each shader stage */
749 enum pipe_shader_type type = pipe_shader_type_from_mesa(shader->Stage);
750 is_scalar[i] = screen->get_shader_param(screen, type,
751 PIPE_SHADER_CAP_SCALAR_ISA);
752
753 st_nir_get_mesa_program(ctx, shader_program, shader);
754 last_stage = i;
755
756 if (is_scalar[i]) {
757 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
758 }
759 }
760
761 /* Linking the stages in the opposite order (from fragment to vertex)
762 * ensures that inter-shader outputs written to in an earlier stage
763 * are eliminated if they are (transitively) not used in a later
764 * stage.
765 */
766 int next = last_stage;
767 for (int i = next - 1; i >= 0; i--) {
768 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
769 if (shader == NULL)
770 continue;
771
772 st_nir_link_shaders(&shader->Program->nir,
773 &shader_program->_LinkedShaders[next]->Program->nir,
774 is_scalar[i]);
775 next = i;
776 }
777
778 int prev = -1;
779 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
780 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
781 if (shader == NULL)
782 continue;
783
784 nir_shader *nir = shader->Program->nir;
785
786 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
787 st->pipe->screen);
788
789 NIR_PASS_V(nir, nir_lower_system_values);
790 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
791
792 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
793 shader->Program->info = nir->info;
794 if (i == MESA_SHADER_VERTEX) {
795 /* NIR expands dual-slot inputs out to two locations. We need to
796 * compact things back down GL-style single-slot inputs to avoid
797 * confusing the state tracker.
798 */
799 shader->Program->info.inputs_read =
800 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
801 shader->Program->DualSlotInputs);
802 }
803
804 if (prev != -1) {
805 struct gl_program *prev_shader =
806 shader_program->_LinkedShaders[prev]->Program;
807
808 /* We can't use nir_compact_varyings with transform feedback, since
809 * the pipe_stream_output->output_register field is based on the
810 * pre-compacted driver_locations.
811 */
812 if (!(prev_shader->sh.LinkedTransformFeedback &&
813 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
814 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
815 nir, ctx->API != API_OPENGL_COMPAT);
816 }
817 prev = i;
818 }
819
820 st_lower_patch_vertices_in(shader_program);
821
822 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
823 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
824 if (shader == NULL)
825 continue;
826
827 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
828
829 assert(shader->Program);
830 if (!ctx->Driver.ProgramStringNotify(ctx,
831 _mesa_shader_stage_to_program(i),
832 shader->Program)) {
833 _mesa_reference_program(ctx, &shader->Program, NULL);
834 return false;
835 }
836
837 nir_sweep(shader->Program->nir);
838 }
839
840 return true;
841 }
842
843 void
844 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
845 {
846 if (nir->info.stage == MESA_SHADER_VERTEX) {
847 /* Needs special handling so drvloc matches the vbo state: */
848 st_nir_assign_vs_in_locations(nir);
849 /* Re-lower global vars, to deal with any dead VS inputs. */
850 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
851
852 sort_varyings(&nir->outputs);
853 st_nir_assign_var_locations(&nir->outputs,
854 &nir->num_outputs,
855 nir->info.stage);
856 st_nir_fixup_varying_slots(st, &nir->outputs);
857 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
858 nir->info.stage == MESA_SHADER_TESS_CTRL ||
859 nir->info.stage == MESA_SHADER_TESS_EVAL) {
860 sort_varyings(&nir->inputs);
861 st_nir_assign_var_locations(&nir->inputs,
862 &nir->num_inputs,
863 nir->info.stage);
864 st_nir_fixup_varying_slots(st, &nir->inputs);
865
866 sort_varyings(&nir->outputs);
867 st_nir_assign_var_locations(&nir->outputs,
868 &nir->num_outputs,
869 nir->info.stage);
870 st_nir_fixup_varying_slots(st, &nir->outputs);
871 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
872 sort_varyings(&nir->inputs);
873 st_nir_assign_var_locations(&nir->inputs,
874 &nir->num_inputs,
875 nir->info.stage);
876 st_nir_fixup_varying_slots(st, &nir->inputs);
877 st_nir_assign_var_locations(&nir->outputs,
878 &nir->num_outputs,
879 nir->info.stage);
880 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
881 /* TODO? */
882 } else {
883 unreachable("invalid shader type");
884 }
885 }
886
887 void
888 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
889 struct gl_shader_program *shader_program,
890 struct gl_program *prog)
891 {
892 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
893 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
894 else
895 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
896
897 if (prog) {
898 prog->info.textures_used = nir->info.textures_used;
899 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
900 }
901 }
902
903 /* Last third of preparing nir from glsl, which happens after shader
904 * variant lowering.
905 */
906 void
907 st_finalize_nir(struct st_context *st, struct gl_program *prog,
908 struct gl_shader_program *shader_program, nir_shader *nir)
909 {
910 struct pipe_screen *screen = st->pipe->screen;
911 const nir_shader_compiler_options *options =
912 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
913
914 NIR_PASS_V(nir, nir_split_var_copies);
915 NIR_PASS_V(nir, nir_lower_var_copies);
916 if (options->lower_all_io_to_temps ||
917 nir->info.stage == MESA_SHADER_VERTEX ||
918 nir->info.stage == MESA_SHADER_GEOMETRY) {
919 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
920 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
921 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
922 }
923
924 st_nir_assign_varying_locations(st, nir);
925
926 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
927 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
928
929 st_nir_assign_uniform_locations(st->ctx, prog,
930 &nir->uniforms, &nir->num_uniforms);
931
932 if (st->ctx->Const.PackedDriverUniformStorage) {
933 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
934 (nir_lower_io_options)0);
935 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
936 }
937
938 st_nir_lower_samplers(screen, nir, shader_program, prog);
939 }
940
941 } /* extern "C" */