mesa/st: Lookup parameters without using names
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "main/shaderobj.h"
40 #include "st_context.h"
41 #include "st_glsl_types.h"
42 #include "st_program.h"
43
44 #include "compiler/nir/nir.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/glsl_to_nir.h"
47 #include "compiler/glsl/gl_nir.h"
48 #include "compiler/glsl/ir.h"
49 #include "compiler/glsl/ir_optimization.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51
52 static int
53 type_size(const struct glsl_type *type)
54 {
55 return type->count_attribute_slots(false);
56 }
57
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
61 */
62 static void
63 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
64 {
65 if (st->needs_texcoord_semantic)
66 return;
67
68 nir_foreach_variable(var, var_list) {
69 if (var->data.location >= VARYING_SLOT_VAR0) {
70 var->data.location += 9;
71 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
72 (var->data.location <= VARYING_SLOT_TEX7)) {
73 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
74 }
75 }
76 }
77
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
82 */
83 static void
84 st_nir_assign_vs_in_locations(nir_shader *nir)
85 {
86 nir->num_inputs = util_bitcount64(nir->info.inputs_read);
87 nir_foreach_variable_safe(var, &nir->inputs) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
90 */
91 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var->data.driver_location = nir->num_inputs++;
94 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
95 var->data.driver_location =
96 util_bitcount64(nir->info.inputs_read &
97 BITFIELD64_MASK(var->data.location));
98 } else {
99 /* Move unused input variables to the globals list (with no
100 * initialization), to avoid confusing drivers looking through the
101 * inputs array and expecting to find inputs with a driver_location
102 * set.
103 */
104 exec_node_remove(&var->node);
105 var->data.mode = nir_var_shader_temp;
106 exec_list_push_tail(&nir->globals, &var->node);
107 }
108 }
109 }
110
111 static int
112 st_nir_lookup_parameter_index(struct gl_program *prog, nir_variable *var)
113 {
114 /* Lookup the first parameter that the uniform storage that match the
115 * variable location.
116 */
117 for (unsigned i = 0; i < prog->Parameters->NumParameters; i++) {
118 int index = prog->Parameters->Parameters[i].MainUniformStorageIndex;
119 if (index == var->data.location)
120 return i;
121 }
122
123 return -1;
124 }
125
126 static void
127 st_nir_assign_uniform_locations(struct gl_context *ctx,
128 struct gl_program *prog,
129 struct exec_list *uniform_list)
130 {
131 int shaderidx = 0;
132 int imageidx = 0;
133
134 nir_foreach_variable(uniform, uniform_list) {
135 int loc;
136
137 /*
138 * UBO's have their own address spaces, so don't count them towards the
139 * number of global uniforms
140 */
141 if (uniform->data.mode == nir_var_mem_ubo || uniform->data.mode == nir_var_mem_ssbo)
142 continue;
143
144 const struct glsl_type *type = glsl_without_array(uniform->type);
145 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
146 if (type->is_sampler()) {
147 loc = shaderidx;
148 shaderidx += type_size(uniform->type);
149 } else {
150 loc = imageidx;
151 imageidx += type_size(uniform->type);
152 }
153 } else if (uniform->state_slots) {
154 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
155 /* This state reference has already been setup by ir_to_mesa, but we'll
156 * get the same index back here.
157 */
158
159 unsigned comps;
160 if (glsl_type_is_struct_or_ifc(type)) {
161 comps = 4;
162 } else {
163 comps = glsl_get_vector_elements(type);
164 }
165
166 if (ctx->Const.PackedDriverUniformStorage) {
167 loc = _mesa_add_sized_state_reference(prog->Parameters,
168 stateTokens, comps, false);
169 loc = prog->Parameters->ParameterValueOffset[loc];
170 } else {
171 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
172 }
173 } else {
174 loc = st_nir_lookup_parameter_index(prog, uniform);
175
176 /* We need to check that loc is not -1 here before accessing the
177 * array. It can be negative for example when we have a struct that
178 * only contains opaque types.
179 */
180 if (loc >= 0 && ctx->Const.PackedDriverUniformStorage) {
181 loc = prog->Parameters->ParameterValueOffset[loc];
182 }
183 }
184
185 uniform->data.driver_location = loc;
186 }
187 }
188
189 void
190 st_nir_opts(nir_shader *nir, bool scalar)
191 {
192 bool progress;
193 unsigned lower_flrp =
194 (nir->options->lower_flrp16 ? 16 : 0) |
195 (nir->options->lower_flrp32 ? 32 : 0) |
196 (nir->options->lower_flrp64 ? 64 : 0);
197
198 do {
199 progress = false;
200
201 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
202
203 /* Linking deals with unused inputs/outputs, but here we can remove
204 * things local to the shader in the hopes that we can cleanup other
205 * things. This pass will also remove variables with only stores, so we
206 * might be able to make progress after it.
207 */
208 NIR_PASS(progress, nir, nir_remove_dead_variables,
209 (nir_variable_mode)(nir_var_function_temp |
210 nir_var_shader_temp |
211 nir_var_mem_shared));
212
213 NIR_PASS(progress, nir, nir_opt_copy_prop_vars);
214 NIR_PASS(progress, nir, nir_opt_dead_write_vars);
215
216 if (scalar) {
217 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
218 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
219 }
220
221 NIR_PASS_V(nir, nir_lower_alu);
222 NIR_PASS_V(nir, nir_lower_pack);
223 NIR_PASS(progress, nir, nir_copy_prop);
224 NIR_PASS(progress, nir, nir_opt_remove_phis);
225 NIR_PASS(progress, nir, nir_opt_dce);
226 if (nir_opt_trivial_continues(nir)) {
227 progress = true;
228 NIR_PASS(progress, nir, nir_copy_prop);
229 NIR_PASS(progress, nir, nir_opt_dce);
230 }
231 NIR_PASS(progress, nir, nir_opt_if, false);
232 NIR_PASS(progress, nir, nir_opt_dead_cf);
233 NIR_PASS(progress, nir, nir_opt_cse);
234 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true, true);
235
236 NIR_PASS(progress, nir, nir_opt_algebraic);
237 NIR_PASS(progress, nir, nir_opt_constant_folding);
238
239 if (lower_flrp != 0) {
240 bool lower_flrp_progress = false;
241
242 NIR_PASS(lower_flrp_progress, nir, nir_lower_flrp,
243 lower_flrp,
244 false /* always_precise */,
245 nir->options->lower_ffma);
246 if (lower_flrp_progress) {
247 NIR_PASS(progress, nir,
248 nir_opt_constant_folding);
249 progress = true;
250 }
251
252 /* Nothing should rematerialize any flrps, so we only need to do this
253 * lowering once.
254 */
255 lower_flrp = 0;
256 }
257
258 NIR_PASS(progress, nir, gl_nir_opt_access);
259
260 NIR_PASS(progress, nir, nir_opt_undef);
261 NIR_PASS(progress, nir, nir_opt_conditional_discard);
262 if (nir->options->max_unroll_iterations) {
263 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
264 }
265 } while (progress);
266 }
267
268 /* First third of converting glsl_to_nir.. this leaves things in a pre-
269 * nir_lower_io state, so that shader variants can more easily insert/
270 * replace variables, etc.
271 */
272 static nir_shader *
273 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
274 struct gl_shader_program *shader_program,
275 gl_shader_stage stage)
276 {
277 const nir_shader_compiler_options *options =
278 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
279 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
280 struct pipe_screen *screen = st->pipe->screen;
281 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
282 assert(options);
283 bool lower_64bit =
284 options->lower_int64_options || options->lower_doubles_options;
285
286 if (prog->nir)
287 return prog->nir;
288
289 nir_shader *nir = glsl_to_nir(st->ctx, shader_program, stage, options);
290
291 /* Set the next shader stage hint for VS and TES. */
292 if (!nir->info.separate_shader &&
293 (nir->info.stage == MESA_SHADER_VERTEX ||
294 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
295
296 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
297 unsigned stages_mask =
298 ~prev_stages & shader_program->data->linked_stages;
299
300 nir->info.next_stage = stages_mask ?
301 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
302 } else {
303 nir->info.next_stage = MESA_SHADER_FRAGMENT;
304 }
305
306 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
307 if (!st->ctx->SoftFP64 && nir->info.uses_64bit &&
308 (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
309 st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options);
310 }
311
312 nir_variable_mode mask =
313 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
314 nir_remove_dead_variables(nir, mask);
315
316 if (options->lower_all_io_to_temps ||
317 nir->info.stage == MESA_SHADER_VERTEX ||
318 nir->info.stage == MESA_SHADER_GEOMETRY) {
319 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
320 nir_shader_get_entrypoint(nir),
321 true, true);
322 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
323 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
324 nir_shader_get_entrypoint(nir),
325 true, false);
326 }
327
328 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
329 NIR_PASS_V(nir, nir_split_var_copies);
330 NIR_PASS_V(nir, nir_lower_var_copies);
331
332 if (is_scalar) {
333 NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
334 }
335
336 /* before buffers and vars_to_ssa */
337 NIR_PASS_V(nir, gl_nir_lower_bindless_images);
338 st_nir_opts(nir, is_scalar);
339
340 NIR_PASS_V(nir, gl_nir_lower_buffers, shader_program);
341 /* Do a round of constant folding to clean up address calculations */
342 NIR_PASS_V(nir, nir_opt_constant_folding);
343
344 if (lower_64bit) {
345 bool lowered_64bit_ops = false;
346 if (options->lower_doubles_options) {
347 NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles,
348 st->ctx->SoftFP64, options->lower_doubles_options);
349 }
350 if (options->lower_int64_options) {
351 NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64,
352 options->lower_int64_options);
353 }
354
355 if (lowered_64bit_ops)
356 st_nir_opts(nir, is_scalar);
357 }
358
359 return nir;
360 }
361
362 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
363 * info on varyings, etc after NIR link time opts have been applied.
364 */
365 static void
366 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
367 struct gl_shader_program *shader_program)
368 {
369 nir_shader *nir = prog->nir;
370
371 /* Make a pass over the IR to add state references for any built-in
372 * uniforms that are used. This has to be done now (during linking).
373 * Code generation doesn't happen until the first time this shader is
374 * used for rendering. Waiting until then to generate the parameters is
375 * too late. At that point, the values for the built-in uniforms won't
376 * get sent to the shader.
377 */
378 nir_foreach_variable(var, &nir->uniforms) {
379 const nir_state_slot *const slots = var->state_slots;
380 if (slots != NULL) {
381 const struct glsl_type *type = glsl_without_array(var->type);
382 for (unsigned int i = 0; i < var->num_state_slots; i++) {
383 unsigned comps;
384 if (glsl_type_is_struct_or_ifc(type)) {
385 /* Builtin struct require specical handling for now we just
386 * make all members vec4. See st_nir_lower_builtin.
387 */
388 comps = 4;
389 } else {
390 comps = glsl_get_vector_elements(type);
391 }
392
393 if (st->ctx->Const.PackedDriverUniformStorage) {
394 _mesa_add_sized_state_reference(prog->Parameters,
395 slots[i].tokens,
396 comps, false);
397 } else {
398 _mesa_add_state_reference(prog->Parameters,
399 slots[i].tokens);
400 }
401 }
402 }
403 }
404
405 /* Avoid reallocation of the program parameter list, because the uniform
406 * storage is only associated with the original parameter list.
407 * This should be enough for Bitmap and DrawPixels constants.
408 */
409 _mesa_reserve_parameter_storage(prog->Parameters, 8);
410
411 /* This has to be done last. Any operation the can cause
412 * prog->ParameterValues to get reallocated (e.g., anything that adds a
413 * program constant) has to happen before creating this linkage.
414 */
415 _mesa_associate_uniform_storage(st->ctx, shader_program, prog);
416
417 st_set_prog_affected_state_flags(prog);
418
419 NIR_PASS_V(nir, st_nir_lower_builtin);
420 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
421 NIR_PASS_V(nir, nir_opt_intrinsics);
422
423 nir_variable_mode mask = nir_var_function_temp;
424 nir_remove_dead_variables(nir, mask);
425
426 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
427 _mesa_log("\n");
428 _mesa_log("NIR IR for linked %s program %d:\n",
429 _mesa_shader_stage_to_string(prog->info.stage),
430 shader_program->Name);
431 nir_print_shader(nir, _mesa_get_log_file());
432 _mesa_log("\n\n");
433 }
434 }
435
436 static void
437 set_st_program(struct gl_program *prog,
438 struct gl_shader_program *shader_program,
439 nir_shader *nir)
440 {
441 struct st_vertex_program *stvp;
442 struct st_common_program *stp;
443 struct st_fragment_program *stfp;
444 struct st_compute_program *stcp;
445
446 switch (prog->info.stage) {
447 case MESA_SHADER_VERTEX:
448 stvp = (struct st_vertex_program *)prog;
449 stvp->shader_program = shader_program;
450 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
451 stvp->tgsi.ir.nir = nir;
452 break;
453 case MESA_SHADER_GEOMETRY:
454 case MESA_SHADER_TESS_CTRL:
455 case MESA_SHADER_TESS_EVAL:
456 stp = (struct st_common_program *)prog;
457 stp->shader_program = shader_program;
458 stp->tgsi.type = PIPE_SHADER_IR_NIR;
459 stp->tgsi.ir.nir = nir;
460 break;
461 case MESA_SHADER_FRAGMENT:
462 stfp = (struct st_fragment_program *)prog;
463 stfp->shader_program = shader_program;
464 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
465 stfp->tgsi.ir.nir = nir;
466 break;
467 case MESA_SHADER_COMPUTE:
468 stcp = (struct st_compute_program *)prog;
469 stcp->shader_program = shader_program;
470 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
471 stcp->tgsi.prog = nir;
472 break;
473 default:
474 unreachable("unknown shader stage");
475 }
476 }
477
478 static void
479 st_nir_get_mesa_program(struct gl_context *ctx,
480 struct gl_shader_program *shader_program,
481 struct gl_linked_shader *shader)
482 {
483 struct st_context *st = st_context(ctx);
484 struct pipe_screen *pscreen = ctx->st->pipe->screen;
485 struct gl_program *prog;
486
487 validate_ir_tree(shader->ir);
488
489 prog = shader->Program;
490
491 prog->Parameters = _mesa_new_parameter_list();
492
493 _mesa_copy_linked_program_data(shader_program, shader);
494 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
495 prog->Parameters);
496
497 /* Remove reads from output registers. */
498 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
499 lower_output_reads(shader->Stage, shader->ir);
500
501 if (ctx->_Shader->Flags & GLSL_DUMP) {
502 _mesa_log("\n");
503 _mesa_log("GLSL IR for linked %s program %d:\n",
504 _mesa_shader_stage_to_string(shader->Stage),
505 shader_program->Name);
506 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
507 _mesa_log("\n\n");
508 }
509
510 prog->ExternalSamplersUsed = gl_external_samplers(prog);
511 _mesa_update_shader_textures_used(shader_program, prog);
512
513 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
514
515 set_st_program(prog, shader_program, nir);
516 prog->nir = nir;
517 }
518
519 static void
520 st_nir_vectorize_io(nir_shader *producer, nir_shader *consumer)
521 {
522 NIR_PASS_V(producer, nir_lower_io_to_vector, nir_var_shader_out);
523 NIR_PASS_V(producer, nir_opt_combine_stores, nir_var_shader_out);
524 NIR_PASS_V(consumer, nir_lower_io_to_vector, nir_var_shader_in);
525
526 if ((producer)->info.stage != MESA_SHADER_TESS_CTRL) {
527 /* Calling lower_io_to_vector creates output variable writes with
528 * write-masks. We only support these for TCS outputs, so for other
529 * stages, we need to call nir_lower_io_to_temporaries to get rid of
530 * them. This, in turn, creates temporary variables and extra
531 * copy_deref intrinsics that we need to clean up.
532 */
533 NIR_PASS_V(producer, nir_lower_io_to_temporaries,
534 nir_shader_get_entrypoint(producer), true, false);
535 NIR_PASS_V(producer, nir_lower_global_vars_to_local);
536 NIR_PASS_V(producer, nir_split_var_copies);
537 NIR_PASS_V(producer, nir_lower_var_copies);
538 }
539 }
540
541 static void
542 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
543 {
544 if (scalar) {
545 NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
546 NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
547 }
548
549 nir_lower_io_arrays_to_elements(*producer, *consumer);
550
551 st_nir_opts(*producer, scalar);
552 st_nir_opts(*consumer, scalar);
553
554 if (nir_link_opt_varyings(*producer, *consumer))
555 st_nir_opts(*consumer, scalar);
556
557 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
558 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
559
560 if (nir_remove_unused_varyings(*producer, *consumer)) {
561 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
562 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
563
564 st_nir_opts(*producer, scalar);
565 st_nir_opts(*consumer, scalar);
566
567 /* Optimizations can cause varyings to become unused.
568 * nir_compact_varyings() depends on all dead varyings being removed so
569 * we need to call nir_remove_dead_variables() again here.
570 */
571 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
572 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
573 }
574 }
575
576 static void
577 st_lower_patch_vertices_in(struct gl_shader_program *shader_prog)
578 {
579 struct gl_linked_shader *linked_tcs =
580 shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
581 struct gl_linked_shader *linked_tes =
582 shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
583
584 /* If we have a TCS and TES linked together, lower TES patch vertices. */
585 if (linked_tcs && linked_tes) {
586 nir_shader *tcs_nir = linked_tcs->Program->nir;
587 nir_shader *tes_nir = linked_tes->Program->nir;
588
589 /* The TES input vertex count is the TCS output vertex count,
590 * lower TES gl_PatchVerticesIn to a constant.
591 */
592 uint32_t tes_patch_verts = tcs_nir->info.tess.tcs_vertices_out;
593 NIR_PASS_V(tes_nir, nir_lower_patch_vertices, tes_patch_verts, NULL);
594 }
595 }
596
597 extern "C" {
598
599 void
600 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
601 struct gl_program *prog,
602 struct pipe_screen *pscreen)
603 {
604 if (nir->info.stage != MESA_SHADER_FRAGMENT)
605 return;
606
607 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
608 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
609 };
610 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
611
612 memcpy(wpos_options.state_tokens, wposTransformState,
613 sizeof(wpos_options.state_tokens));
614 wpos_options.fs_coord_origin_upper_left =
615 pscreen->get_param(pscreen,
616 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
617 wpos_options.fs_coord_origin_lower_left =
618 pscreen->get_param(pscreen,
619 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
620 wpos_options.fs_coord_pixel_center_integer =
621 pscreen->get_param(pscreen,
622 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
623 wpos_options.fs_coord_pixel_center_half_integer =
624 pscreen->get_param(pscreen,
625 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
626
627 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
628 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
629 _mesa_add_state_reference(prog->Parameters, wposTransformState);
630 }
631 }
632
633 bool
634 st_link_nir(struct gl_context *ctx,
635 struct gl_shader_program *shader_program)
636 {
637 struct st_context *st = st_context(ctx);
638 struct pipe_screen *screen = st->pipe->screen;
639 bool is_scalar[MESA_SHADER_STAGES];
640
641 unsigned last_stage = 0;
642 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
643 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
644 if (shader == NULL)
645 continue;
646
647 /* Determine scalar property of each shader stage */
648 enum pipe_shader_type type = pipe_shader_type_from_mesa(shader->Stage);
649 is_scalar[i] = screen->get_shader_param(screen, type,
650 PIPE_SHADER_CAP_SCALAR_ISA);
651
652 st_nir_get_mesa_program(ctx, shader_program, shader);
653 last_stage = i;
654
655 if (is_scalar[i]) {
656 NIR_PASS_V(shader->Program->nir, nir_lower_load_const_to_scalar);
657 }
658 }
659
660 /* Linking the stages in the opposite order (from fragment to vertex)
661 * ensures that inter-shader outputs written to in an earlier stage
662 * are eliminated if they are (transitively) not used in a later
663 * stage.
664 */
665 int next = last_stage;
666 for (int i = next - 1; i >= 0; i--) {
667 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
668 if (shader == NULL)
669 continue;
670
671 st_nir_link_shaders(&shader->Program->nir,
672 &shader_program->_LinkedShaders[next]->Program->nir,
673 is_scalar[i]);
674 next = i;
675 }
676
677 int prev = -1;
678 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
679 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
680 if (shader == NULL)
681 continue;
682
683 nir_shader *nir = shader->Program->nir;
684
685 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
686 st->pipe->screen);
687
688 NIR_PASS_V(nir, nir_lower_system_values);
689 NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
690
691 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
692 shader->Program->info = nir->info;
693 if (i == MESA_SHADER_VERTEX) {
694 /* NIR expands dual-slot inputs out to two locations. We need to
695 * compact things back down GL-style single-slot inputs to avoid
696 * confusing the state tracker.
697 */
698 shader->Program->info.inputs_read =
699 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
700 shader->Program->DualSlotInputs);
701 }
702
703 if (prev != -1) {
704 struct gl_program *prev_shader =
705 shader_program->_LinkedShaders[prev]->Program;
706
707 /* We can't use nir_compact_varyings with transform feedback, since
708 * the pipe_stream_output->output_register field is based on the
709 * pre-compacted driver_locations.
710 */
711 if (!(prev_shader->sh.LinkedTransformFeedback &&
712 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
713 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
714 nir, ctx->API != API_OPENGL_COMPAT);
715
716 if (ctx->Const.ShaderCompilerOptions[i].NirOptions->vectorize_io)
717 st_nir_vectorize_io(prev_shader->nir, nir);
718 }
719 prev = i;
720 }
721
722 st_lower_patch_vertices_in(shader_program);
723
724 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
725 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
726 if (shader == NULL)
727 continue;
728
729 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
730
731 assert(shader->Program);
732 if (!ctx->Driver.ProgramStringNotify(ctx,
733 _mesa_shader_stage_to_program(i),
734 shader->Program)) {
735 _mesa_reference_program(ctx, &shader->Program, NULL);
736 return false;
737 }
738
739 nir_sweep(shader->Program->nir);
740
741 /* The GLSL IR won't be needed anymore. */
742 ralloc_free(shader->ir);
743 shader->ir = NULL;
744 }
745
746 return true;
747 }
748
749 void
750 st_nir_assign_varying_locations(struct st_context *st, nir_shader *nir)
751 {
752 if (nir->info.stage == MESA_SHADER_VERTEX) {
753 /* Needs special handling so drvloc matches the vbo state: */
754 st_nir_assign_vs_in_locations(nir);
755 /* Re-lower global vars, to deal with any dead VS inputs. */
756 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
757
758 nir_assign_io_var_locations(&nir->outputs,
759 &nir->num_outputs,
760 nir->info.stage);
761 st_nir_fixup_varying_slots(st, &nir->outputs);
762 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
763 nir->info.stage == MESA_SHADER_TESS_CTRL ||
764 nir->info.stage == MESA_SHADER_TESS_EVAL) {
765 nir_assign_io_var_locations(&nir->inputs,
766 &nir->num_inputs,
767 nir->info.stage);
768 st_nir_fixup_varying_slots(st, &nir->inputs);
769
770 nir_assign_io_var_locations(&nir->outputs,
771 &nir->num_outputs,
772 nir->info.stage);
773 st_nir_fixup_varying_slots(st, &nir->outputs);
774 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
775 nir_assign_io_var_locations(&nir->inputs,
776 &nir->num_inputs,
777 nir->info.stage);
778 st_nir_fixup_varying_slots(st, &nir->inputs);
779 nir_assign_io_var_locations(&nir->outputs,
780 &nir->num_outputs,
781 nir->info.stage);
782 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
783 /* TODO? */
784 } else {
785 unreachable("invalid shader type");
786 }
787 }
788
789 void
790 st_nir_lower_samplers(struct pipe_screen *screen, nir_shader *nir,
791 struct gl_shader_program *shader_program,
792 struct gl_program *prog)
793 {
794 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
795 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
796 else
797 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
798
799 if (prog) {
800 prog->info.textures_used = nir->info.textures_used;
801 prog->info.textures_used_by_txf = nir->info.textures_used_by_txf;
802 }
803 }
804
805 /* Last third of preparing nir from glsl, which happens after shader
806 * variant lowering.
807 */
808 void
809 st_finalize_nir(struct st_context *st, struct gl_program *prog,
810 struct gl_shader_program *shader_program, nir_shader *nir)
811 {
812 struct pipe_screen *screen = st->pipe->screen;
813 const nir_shader_compiler_options *options =
814 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
815
816 NIR_PASS_V(nir, nir_split_var_copies);
817 NIR_PASS_V(nir, nir_lower_var_copies);
818 if (options->lower_all_io_to_temps ||
819 options->lower_all_io_to_elements ||
820 nir->info.stage == MESA_SHADER_VERTEX ||
821 nir->info.stage == MESA_SHADER_GEOMETRY) {
822 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
823 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
824 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
825 }
826
827 st_nir_assign_varying_locations(st, nir);
828
829 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
830 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
831
832 st_nir_assign_uniform_locations(st->ctx, prog,
833 &nir->uniforms);
834
835 /* Set num_uniforms in number of attribute slots (vec4s) */
836 nir->num_uniforms = DIV_ROUND_UP(prog->Parameters->NumParameterValues, 4);
837
838 if (st->ctx->Const.PackedDriverUniformStorage) {
839 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
840 (nir_lower_io_options)0);
841 NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
842 } else {
843 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_uniforms_type_size,
844 (nir_lower_io_options)0);
845 }
846
847 st_nir_lower_samplers(screen, nir, shader_program, prog);
848 }
849
850 } /* extern "C" */