st/mesa: fix per-vertex point size
[mesa.git] / src / mesa / state_tracker / st_mesa_to_tgsi.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
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9 * without limitation the rights to use, copy, modify, merge, publish,
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
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19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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26 **************************************************************************/
27
28 /*
29 * \author
30 * Michal Krol,
31 * Keith Whitwell
32 */
33
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "pipe/p_state.h"
37 #include "pipe/p_context.h"
38 #include "tgsi/tgsi_ureg.h"
39 #include "st_mesa_to_tgsi.h"
40 #include "st_context.h"
41 #include "shader/prog_instruction.h"
42 #include "shader/prog_parameter.h"
43 #include "util/u_debug.h"
44 #include "util/u_math.h"
45 #include "util/u_memory.h"
46
47 struct label {
48 unsigned branch_target;
49 unsigned token;
50 };
51
52
53 /**
54 * Intermediate state used during shader translation.
55 */
56 struct st_translate {
57 struct ureg_program *ureg;
58
59 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
60 struct ureg_src *constants;
61 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
62 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
63 struct ureg_dst address[1];
64 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
65 struct ureg_dst psizregreal;
66 struct ureg_src pointSizeConst;
67 GLint psizoutindex;
68 GLboolean prevInstWrotePsiz;
69
70 const GLuint *inputMapping;
71 const GLuint *outputMapping;
72
73 /* For every instruction that contains a label (eg CALL), keep
74 * details so that we can go back afterwards and emit the correct
75 * tgsi instruction number for each label.
76 */
77 struct label *labels;
78 unsigned labels_size;
79 unsigned labels_count;
80
81 /* Keep a record of the tgsi instruction number that each mesa
82 * instruction starts at, will be used to fix up labels after
83 * translation.
84 */
85 unsigned *insn;
86 unsigned insn_size;
87 unsigned insn_count;
88
89 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
90
91 boolean error;
92 };
93
94
95 static unsigned *get_label( struct st_translate *t,
96 unsigned branch_target )
97 {
98 unsigned i;
99
100 if (t->labels_count + 1 >= t->labels_size) {
101 unsigned old_size = t->labels_size;
102 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
103 t->labels = REALLOC( t->labels,
104 old_size * sizeof t->labels[0],
105 t->labels_size * sizeof t->labels[0] );
106 if (t->labels == NULL) {
107 static unsigned dummy;
108 t->error = TRUE;
109 return &dummy;
110 }
111 }
112
113 i = t->labels_count++;
114 t->labels[i].branch_target = branch_target;
115 return &t->labels[i].token;
116 }
117
118
119 static void set_insn_start( struct st_translate *t,
120 unsigned start )
121 {
122 if (t->insn_count + 1 >= t->insn_size) {
123 unsigned old_size = t->insn_size;
124 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
125 t->insn = REALLOC( t->insn,
126 old_size * sizeof t->insn[0],
127 t->insn_size * sizeof t->insn[0] );
128 if (t->insn == NULL) {
129 t->error = TRUE;
130 return;
131 }
132 }
133
134 t->insn[t->insn_count++] = start;
135 }
136
137
138 /*
139 * Map mesa register file to TGSI register file.
140 */
141 static struct ureg_dst
142 dst_register( struct st_translate *t,
143 gl_register_file file,
144 GLuint index )
145 {
146 switch( file ) {
147 case PROGRAM_UNDEFINED:
148 return ureg_dst_undef();
149
150 case PROGRAM_TEMPORARY:
151 if (ureg_dst_is_undef(t->temps[index]))
152 t->temps[index] = ureg_DECL_temporary( t->ureg );
153
154 return t->temps[index];
155
156 case PROGRAM_OUTPUT:
157 if (index == VERT_RESULT_PSIZ)
158 t->prevInstWrotePsiz = GL_TRUE;
159 return t->outputs[t->outputMapping[index]];
160
161 case PROGRAM_ADDRESS:
162 return t->address[index];
163
164 default:
165 debug_assert( 0 );
166 return ureg_dst_undef();
167 }
168 }
169
170
171 static struct ureg_src
172 src_register( struct st_translate *t,
173 gl_register_file file,
174 GLint index )
175 {
176 switch( file ) {
177 case PROGRAM_UNDEFINED:
178 return ureg_src_undef();
179
180 case PROGRAM_TEMPORARY:
181 ASSERT(index >= 0);
182 if (ureg_dst_is_undef(t->temps[index]))
183 t->temps[index] = ureg_DECL_temporary( t->ureg );
184 assert(index < Elements(t->temps));
185 return ureg_src(t->temps[index]);
186
187 case PROGRAM_NAMED_PARAM:
188 case PROGRAM_ENV_PARAM:
189 case PROGRAM_LOCAL_PARAM:
190 case PROGRAM_UNIFORM:
191 ASSERT(index >= 0);
192 return t->constants[index];
193 case PROGRAM_STATE_VAR:
194 case PROGRAM_CONSTANT: /* ie, immediate */
195 if (index < 0)
196 return ureg_DECL_constant( t->ureg, 0 );
197 else
198 return t->constants[index];
199
200 case PROGRAM_INPUT:
201 assert(t->inputMapping[index] < Elements(t->inputs));
202 return t->inputs[t->inputMapping[index]];
203
204 case PROGRAM_OUTPUT:
205 assert(t->outputMapping[index] < Elements(t->outputs));
206 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
207
208 case PROGRAM_ADDRESS:
209 return ureg_src(t->address[index]);
210
211 default:
212 debug_assert( 0 );
213 return ureg_src_undef();
214 }
215 }
216
217
218 /**
219 * Map mesa texture target to TGSI texture target.
220 */
221 static unsigned
222 translate_texture_target( GLuint textarget,
223 GLboolean shadow )
224 {
225 if (shadow) {
226 switch( textarget ) {
227 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_SHADOW1D;
228 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_SHADOW2D;
229 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
230 default: break;
231 }
232 }
233
234 switch( textarget ) {
235 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_1D;
236 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_2D;
237 case TEXTURE_3D_INDEX: return TGSI_TEXTURE_3D;
238 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
239 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
240 default:
241 debug_assert( 0 );
242 return TGSI_TEXTURE_1D;
243 }
244 }
245
246
247 static struct ureg_dst
248 translate_dst( struct st_translate *t,
249 const struct prog_dst_register *DstReg,
250 boolean saturate )
251 {
252 struct ureg_dst dst = dst_register( t,
253 DstReg->File,
254 DstReg->Index );
255
256 dst = ureg_writemask( dst,
257 DstReg->WriteMask );
258
259 if (saturate)
260 dst = ureg_saturate( dst );
261
262 if (DstReg->RelAddr)
263 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
264
265 return dst;
266 }
267
268
269 static struct ureg_src
270 translate_src( struct st_translate *t,
271 const struct prog_src_register *SrcReg )
272 {
273 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
274
275 src = ureg_swizzle( src,
276 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
277 GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
278 GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
279 GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
280
281 if (SrcReg->Negate == NEGATE_XYZW)
282 src = ureg_negate(src);
283
284 if (SrcReg->Abs)
285 src = ureg_abs(src);
286
287 if (SrcReg->RelAddr) {
288 src = ureg_src_indirect( src, ureg_src(t->address[0]));
289 /* If SrcReg->Index was negative, it was set to zero in
290 * src_register(). Reassign it now.
291 */
292 src.Index = SrcReg->Index;
293 }
294
295 return src;
296 }
297
298
299 static struct ureg_src swizzle_4v( struct ureg_src src,
300 const unsigned *swz )
301 {
302 return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
303 }
304
305
306 /**
307 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
308 *
309 * SWZ dst, src.x-y10
310 *
311 * becomes:
312 *
313 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
314 */
315 static void emit_swz( struct st_translate *t,
316 struct ureg_dst dst,
317 const struct prog_src_register *SrcReg )
318 {
319 struct ureg_program *ureg = t->ureg;
320 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
321
322 unsigned negate_mask = SrcReg->Negate;
323
324 unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
325 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
326 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
327 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
328
329 unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
330 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
331 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
332 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
333
334 unsigned negative_one_mask = one_mask & negate_mask;
335 unsigned positive_one_mask = one_mask & ~negate_mask;
336
337 struct ureg_src imm;
338 unsigned i;
339 unsigned mul_swizzle[4] = {0,0,0,0};
340 unsigned add_swizzle[4] = {0,0,0,0};
341 unsigned src_swizzle[4] = {0,0,0,0};
342 boolean need_add = FALSE;
343 boolean need_mul = FALSE;
344
345 if (dst.WriteMask == 0)
346 return;
347
348 /* Is this just a MOV?
349 */
350 if (zero_mask == 0 &&
351 one_mask == 0 &&
352 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
353 {
354 ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
355 return;
356 }
357
358 #define IMM_ZERO 0
359 #define IMM_ONE 1
360 #define IMM_NEG_ONE 2
361
362 imm = ureg_imm3f( ureg, 0, 1, -1 );
363
364 for (i = 0; i < 4; i++) {
365 unsigned bit = 1 << i;
366
367 if (dst.WriteMask & bit) {
368 if (positive_one_mask & bit) {
369 mul_swizzle[i] = IMM_ZERO;
370 add_swizzle[i] = IMM_ONE;
371 need_add = TRUE;
372 }
373 else if (negative_one_mask & bit) {
374 mul_swizzle[i] = IMM_ZERO;
375 add_swizzle[i] = IMM_NEG_ONE;
376 need_add = TRUE;
377 }
378 else if (zero_mask & bit) {
379 mul_swizzle[i] = IMM_ZERO;
380 add_swizzle[i] = IMM_ZERO;
381 need_add = TRUE;
382 }
383 else {
384 add_swizzle[i] = IMM_ZERO;
385 src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
386 need_mul = TRUE;
387 if (negate_mask & bit) {
388 mul_swizzle[i] = IMM_NEG_ONE;
389 }
390 else {
391 mul_swizzle[i] = IMM_ONE;
392 }
393 }
394 }
395 }
396
397 if (need_mul && need_add) {
398 ureg_MAD( ureg,
399 dst,
400 swizzle_4v( src, src_swizzle ),
401 swizzle_4v( imm, mul_swizzle ),
402 swizzle_4v( imm, add_swizzle ) );
403 }
404 else if (need_mul) {
405 ureg_MUL( ureg,
406 dst,
407 swizzle_4v( src, src_swizzle ),
408 swizzle_4v( imm, mul_swizzle ) );
409 }
410 else if (need_add) {
411 ureg_MOV( ureg,
412 dst,
413 swizzle_4v( imm, add_swizzle ) );
414 }
415 else {
416 debug_assert(0);
417 }
418
419 #undef IMM_ZERO
420 #undef IMM_ONE
421 #undef IMM_NEG_ONE
422 }
423
424
425 /**
426 * Negate the value of DDY to match GL semantics where (0,0) is the
427 * lower-left corner of the window.
428 * Note that the GL_ARB_fragment_coord_conventions extension will
429 * effect this someday.
430 */
431 static void emit_ddy( struct st_translate *t,
432 struct ureg_dst dst,
433 const struct prog_src_register *SrcReg )
434 {
435 struct ureg_program *ureg = t->ureg;
436 struct ureg_src src = translate_src( t, SrcReg );
437 src = ureg_negate( src );
438 ureg_DDY( ureg, dst, src );
439 }
440
441
442
443 static unsigned
444 translate_opcode( unsigned op )
445 {
446 switch( op ) {
447 case OPCODE_ARL:
448 return TGSI_OPCODE_ARL;
449 case OPCODE_ABS:
450 return TGSI_OPCODE_ABS;
451 case OPCODE_ADD:
452 return TGSI_OPCODE_ADD;
453 case OPCODE_BGNLOOP:
454 return TGSI_OPCODE_BGNLOOP;
455 case OPCODE_BGNSUB:
456 return TGSI_OPCODE_BGNSUB;
457 case OPCODE_BRA:
458 return TGSI_OPCODE_BRA;
459 case OPCODE_BRK:
460 return TGSI_OPCODE_BRK;
461 case OPCODE_CAL:
462 return TGSI_OPCODE_CAL;
463 case OPCODE_CMP:
464 return TGSI_OPCODE_CMP;
465 case OPCODE_CONT:
466 return TGSI_OPCODE_CONT;
467 case OPCODE_COS:
468 return TGSI_OPCODE_COS;
469 case OPCODE_DDX:
470 return TGSI_OPCODE_DDX;
471 case OPCODE_DDY:
472 return TGSI_OPCODE_DDY;
473 case OPCODE_DP2:
474 return TGSI_OPCODE_DP2;
475 case OPCODE_DP2A:
476 return TGSI_OPCODE_DP2A;
477 case OPCODE_DP3:
478 return TGSI_OPCODE_DP3;
479 case OPCODE_DP4:
480 return TGSI_OPCODE_DP4;
481 case OPCODE_DPH:
482 return TGSI_OPCODE_DPH;
483 case OPCODE_DST:
484 return TGSI_OPCODE_DST;
485 case OPCODE_ELSE:
486 return TGSI_OPCODE_ELSE;
487 case OPCODE_ENDIF:
488 return TGSI_OPCODE_ENDIF;
489 case OPCODE_ENDLOOP:
490 return TGSI_OPCODE_ENDLOOP;
491 case OPCODE_ENDSUB:
492 return TGSI_OPCODE_ENDSUB;
493 case OPCODE_EX2:
494 return TGSI_OPCODE_EX2;
495 case OPCODE_EXP:
496 return TGSI_OPCODE_EXP;
497 case OPCODE_FLR:
498 return TGSI_OPCODE_FLR;
499 case OPCODE_FRC:
500 return TGSI_OPCODE_FRC;
501 case OPCODE_IF:
502 return TGSI_OPCODE_IF;
503 case OPCODE_TRUNC:
504 return TGSI_OPCODE_TRUNC;
505 case OPCODE_KIL:
506 return TGSI_OPCODE_KIL;
507 case OPCODE_KIL_NV:
508 return TGSI_OPCODE_KILP;
509 case OPCODE_LG2:
510 return TGSI_OPCODE_LG2;
511 case OPCODE_LOG:
512 return TGSI_OPCODE_LOG;
513 case OPCODE_LIT:
514 return TGSI_OPCODE_LIT;
515 case OPCODE_LRP:
516 return TGSI_OPCODE_LRP;
517 case OPCODE_MAD:
518 return TGSI_OPCODE_MAD;
519 case OPCODE_MAX:
520 return TGSI_OPCODE_MAX;
521 case OPCODE_MIN:
522 return TGSI_OPCODE_MIN;
523 case OPCODE_MOV:
524 return TGSI_OPCODE_MOV;
525 case OPCODE_MUL:
526 return TGSI_OPCODE_MUL;
527 case OPCODE_NOP:
528 return TGSI_OPCODE_NOP;
529 case OPCODE_NRM3:
530 return TGSI_OPCODE_NRM;
531 case OPCODE_NRM4:
532 return TGSI_OPCODE_NRM4;
533 case OPCODE_POW:
534 return TGSI_OPCODE_POW;
535 case OPCODE_RCP:
536 return TGSI_OPCODE_RCP;
537 case OPCODE_RET:
538 return TGSI_OPCODE_RET;
539 case OPCODE_RSQ:
540 return TGSI_OPCODE_RSQ;
541 case OPCODE_SCS:
542 return TGSI_OPCODE_SCS;
543 case OPCODE_SEQ:
544 return TGSI_OPCODE_SEQ;
545 case OPCODE_SGE:
546 return TGSI_OPCODE_SGE;
547 case OPCODE_SGT:
548 return TGSI_OPCODE_SGT;
549 case OPCODE_SIN:
550 return TGSI_OPCODE_SIN;
551 case OPCODE_SLE:
552 return TGSI_OPCODE_SLE;
553 case OPCODE_SLT:
554 return TGSI_OPCODE_SLT;
555 case OPCODE_SNE:
556 return TGSI_OPCODE_SNE;
557 case OPCODE_SSG:
558 return TGSI_OPCODE_SSG;
559 case OPCODE_SUB:
560 return TGSI_OPCODE_SUB;
561 case OPCODE_TEX:
562 return TGSI_OPCODE_TEX;
563 case OPCODE_TXB:
564 return TGSI_OPCODE_TXB;
565 case OPCODE_TXD:
566 return TGSI_OPCODE_TXD;
567 case OPCODE_TXL:
568 return TGSI_OPCODE_TXL;
569 case OPCODE_TXP:
570 return TGSI_OPCODE_TXP;
571 case OPCODE_XPD:
572 return TGSI_OPCODE_XPD;
573 case OPCODE_END:
574 return TGSI_OPCODE_END;
575 default:
576 debug_assert( 0 );
577 return TGSI_OPCODE_NOP;
578 }
579 }
580
581
582 static void
583 compile_instruction(
584 struct st_translate *t,
585 const struct prog_instruction *inst )
586 {
587 struct ureg_program *ureg = t->ureg;
588 GLuint i;
589 struct ureg_dst dst[1];
590 struct ureg_src src[4];
591 unsigned num_dst;
592 unsigned num_src;
593
594 num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
595 num_src = _mesa_num_inst_src_regs( inst->Opcode );
596
597 if (num_dst)
598 dst[0] = translate_dst( t,
599 &inst->DstReg,
600 inst->SaturateMode );
601
602 for (i = 0; i < num_src; i++)
603 src[i] = translate_src( t, &inst->SrcReg[i] );
604
605 switch( inst->Opcode ) {
606 case OPCODE_SWZ:
607 emit_swz( t, dst[0], &inst->SrcReg[0] );
608 return;
609
610 case OPCODE_BGNLOOP:
611 case OPCODE_CAL:
612 case OPCODE_ELSE:
613 case OPCODE_ENDLOOP:
614 case OPCODE_IF:
615 debug_assert(num_dst == 0);
616 ureg_label_insn( ureg,
617 translate_opcode( inst->Opcode ),
618 src, num_src,
619 get_label( t, inst->BranchTarget ));
620 return;
621
622 case OPCODE_TEX:
623 case OPCODE_TXB:
624 case OPCODE_TXD:
625 case OPCODE_TXL:
626 case OPCODE_TXP:
627 src[num_src++] = t->samplers[inst->TexSrcUnit];
628 ureg_tex_insn( ureg,
629 translate_opcode( inst->Opcode ),
630 dst, num_dst,
631 translate_texture_target( inst->TexSrcTarget,
632 inst->TexShadow ),
633 src, num_src );
634 return;
635
636 case OPCODE_SCS:
637 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
638 ureg_insn( ureg,
639 translate_opcode( inst->Opcode ),
640 dst, num_dst,
641 src, num_src );
642 break;
643
644 case OPCODE_XPD:
645 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
646 ureg_insn( ureg,
647 translate_opcode( inst->Opcode ),
648 dst, num_dst,
649 src, num_src );
650 break;
651
652 case OPCODE_NOISE1:
653 case OPCODE_NOISE2:
654 case OPCODE_NOISE3:
655 case OPCODE_NOISE4:
656 /* At some point, a motivated person could add a better
657 * implementation of noise. Currently not even the nvidia
658 * binary drivers do anything more than this. In any case, the
659 * place to do this is in the GL state tracker, not the poor
660 * driver.
661 */
662 ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
663 break;
664
665 case OPCODE_DDY:
666 emit_ddy( t, dst[0], &inst->SrcReg[0] );
667 break;
668
669 default:
670 ureg_insn( ureg,
671 translate_opcode( inst->Opcode ),
672 dst, num_dst,
673 src, num_src );
674 break;
675 }
676 }
677
678 /**
679 * Emit the TGSI instructions to adjust the WPOS pixel center convention
680 */
681 static void
682 emit_adjusted_wpos( struct st_translate *t,
683 const struct gl_program *program, GLfloat value)
684 {
685 struct ureg_program *ureg = t->ureg;
686 struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
687 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
688
689 ureg_ADD(ureg, ureg_writemask(wpos_temp, TGSI_WRITEMASK_X | TGSI_WRITEMASK_Y),
690 wpos_input, ureg_imm1f(ureg, value));
691
692 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
693 }
694
695 /**
696 * Emit the TGSI instructions for inverting the WPOS y coordinate.
697 */
698 static void
699 emit_inverted_wpos( struct st_translate *t,
700 const struct gl_program *program )
701 {
702 struct ureg_program *ureg = t->ureg;
703
704 /* Fragment program uses fragment position input.
705 * Need to replace instances of INPUT[WPOS] with temp T
706 * where T = INPUT[WPOS] by y is inverted.
707 */
708 static const gl_state_index winSizeState[STATE_LENGTH]
709 = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
710
711 /* XXX: note we are modifying the incoming shader here! Need to
712 * do this before emitting the constant decls below, or this
713 * will be missed:
714 */
715 unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
716 winSizeState);
717
718 struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
719 struct ureg_dst wpos_temp;
720 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
721
722 /* MOV wpos_temp, input[wpos]
723 */
724 if (wpos_input.File == TGSI_FILE_TEMPORARY)
725 wpos_temp = ureg_dst(wpos_input);
726 else {
727 wpos_temp = ureg_DECL_temporary( ureg );
728 ureg_MOV( ureg, wpos_temp, wpos_input );
729 }
730
731 /* SUB wpos_temp.y, winsize_const, wpos_input
732 */
733 ureg_SUB( ureg,
734 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
735 winsize,
736 wpos_input);
737
738 /* Use wpos_temp as position input from here on:
739 */
740 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
741 }
742
743
744 /**
745 * Emit fragment position/ooordinate code.
746 */
747 static void
748 emit_wpos(struct st_context *st,
749 struct st_translate *t,
750 const struct gl_program *program,
751 struct ureg_program *ureg)
752 {
753 const struct gl_fragment_program *fp =
754 (const struct gl_fragment_program *) program;
755 struct pipe_screen *pscreen = st->pipe->screen;
756 boolean invert = FALSE;
757
758 if (fp->OriginUpperLeft) {
759 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
760 }
761 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
762 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
763 invert = TRUE;
764 }
765 else
766 assert(0);
767 }
768 else {
769 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
770 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
771 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
772 invert = TRUE;
773 else
774 assert(0);
775 }
776
777 if (fp->PixelCenterInteger) {
778 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER))
779 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
780 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER))
781 emit_adjusted_wpos(t, program, invert ? 0.5f : -0.5f);
782 else
783 assert(0);
784 }
785 else {
786 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
787 }
788 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
789 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
790 emit_adjusted_wpos(t, program, invert ? -0.5f : 0.5f);
791 }
792 else
793 assert(0);
794 }
795
796 /* we invert after adjustment so that we avoid the MOV to temporary,
797 * and reuse the adjustment ADD instead */
798 if (invert)
799 emit_inverted_wpos(t, program);
800 }
801
802
803 /**
804 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
805 * TGSI uses +1 for front, -1 for back.
806 * This function converts the TGSI value to the GL value. Simply clamping/
807 * saturating the value to [0,1] does the job.
808 */
809 static void
810 emit_face_var( struct st_translate *t,
811 const struct gl_program *program )
812 {
813 struct ureg_program *ureg = t->ureg;
814 struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
815 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
816
817 /* MOV_SAT face_temp, input[face]
818 */
819 face_temp = ureg_saturate( face_temp );
820 ureg_MOV( ureg, face_temp, face_input );
821
822 /* Use face_temp as face input from here on:
823 */
824 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
825 }
826
827
828 static void
829 emit_edgeflags( struct st_translate *t,
830 const struct gl_program *program )
831 {
832 struct ureg_program *ureg = t->ureg;
833 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
834 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
835
836 ureg_MOV( ureg, edge_dst, edge_src );
837 }
838
839
840 /**
841 * Translate Mesa program to TGSI format.
842 * \param program the program to translate
843 * \param numInputs number of input registers used
844 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
845 * input indexes
846 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
847 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
848 * each input
849 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
850 * \param numOutputs number of output registers used
851 * \param outputMapping maps Mesa fragment program outputs to TGSI
852 * generic outputs
853 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
854 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
855 * each output
856 *
857 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
858 */
859 enum pipe_error
860 st_translate_mesa_program(
861 GLcontext *ctx,
862 uint procType,
863 struct ureg_program *ureg,
864 const struct gl_program *program,
865 GLuint numInputs,
866 const GLuint inputMapping[],
867 const ubyte inputSemanticName[],
868 const ubyte inputSemanticIndex[],
869 const GLuint interpMode[],
870 GLuint numOutputs,
871 const GLuint outputMapping[],
872 const ubyte outputSemanticName[],
873 const ubyte outputSemanticIndex[],
874 boolean passthrough_edgeflags )
875 {
876 struct st_translate translate, *t;
877 unsigned i;
878 enum pipe_error ret = PIPE_OK;
879
880 t = &translate;
881 memset(t, 0, sizeof *t);
882
883 t->procType = procType;
884 t->inputMapping = inputMapping;
885 t->outputMapping = outputMapping;
886 t->ureg = ureg;
887 t->psizoutindex = -1;
888 t->prevInstWrotePsiz = GL_FALSE;
889
890 /*_mesa_print_program(program);*/
891
892 /*
893 * Declare input attributes.
894 */
895 if (procType == TGSI_PROCESSOR_FRAGMENT) {
896 for (i = 0; i < numInputs; i++) {
897 if (program->InputFlags[0] & PROG_PARAM_BIT_CYL_WRAP) {
898 t->inputs[i] = ureg_DECL_fs_input_cyl(ureg,
899 inputSemanticName[i],
900 inputSemanticIndex[i],
901 interpMode[i],
902 TGSI_CYLINDRICAL_WRAP_X);
903 }
904 else {
905 t->inputs[i] = ureg_DECL_fs_input(ureg,
906 inputSemanticName[i],
907 inputSemanticIndex[i],
908 interpMode[i]);
909 }
910 }
911
912 if (program->InputsRead & FRAG_BIT_WPOS) {
913 /* Must do this after setting up t->inputs, and before
914 * emitting constant references, below:
915 */
916 emit_wpos(st_context(ctx), t, program, ureg);
917 }
918
919 if (program->InputsRead & FRAG_BIT_FACE) {
920 emit_face_var( t, program );
921 }
922
923 /*
924 * Declare output attributes.
925 */
926 for (i = 0; i < numOutputs; i++) {
927 switch (outputSemanticName[i]) {
928 case TGSI_SEMANTIC_POSITION:
929 t->outputs[i] = ureg_DECL_output( ureg,
930 TGSI_SEMANTIC_POSITION, /* Z / Depth */
931 outputSemanticIndex[i] );
932
933 t->outputs[i] = ureg_writemask( t->outputs[i],
934 TGSI_WRITEMASK_Z );
935 break;
936 case TGSI_SEMANTIC_COLOR:
937 t->outputs[i] = ureg_DECL_output( ureg,
938 TGSI_SEMANTIC_COLOR,
939 outputSemanticIndex[i] );
940 break;
941 default:
942 debug_assert(0);
943 return 0;
944 }
945 }
946 }
947 else {
948 for (i = 0; i < numInputs; i++) {
949 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
950 }
951
952 for (i = 0; i < numOutputs; i++) {
953 t->outputs[i] = ureg_DECL_output( ureg,
954 outputSemanticName[i],
955 outputSemanticIndex[i] );
956 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && program->Id) {
957 static const gl_state_index pointSizeClampState[STATE_LENGTH]
958 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, 0, 0, 0 };
959 /* XXX: note we are modifying the incoming shader here! Need to
960 * do this before emitting the constant decls below, or this
961 * will be missed:
962 */
963 unsigned pointSizeClampConst =
964 _mesa_add_state_reference(program->Parameters,
965 pointSizeClampState);
966 struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
967 t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
968 t->psizregreal = t->outputs[i];
969 t->psizoutindex = i;
970 t->outputs[i] = psizregtemp;
971 }
972 }
973 if (passthrough_edgeflags)
974 emit_edgeflags( t, program );
975 }
976
977 /* Declare address register.
978 */
979 if (program->NumAddressRegs > 0) {
980 debug_assert( program->NumAddressRegs == 1 );
981 t->address[0] = ureg_DECL_address( ureg );
982 }
983
984 /* Emit constants and immediates. Mesa uses a single index space
985 * for these, so we put all the translated regs in t->constants.
986 */
987 if (program->Parameters) {
988 t->constants = CALLOC( program->Parameters->NumParameters,
989 sizeof t->constants[0] );
990 if (t->constants == NULL) {
991 ret = PIPE_ERROR_OUT_OF_MEMORY;
992 goto out;
993 }
994
995 for (i = 0; i < program->Parameters->NumParameters; i++) {
996 switch (program->Parameters->Parameters[i].Type) {
997 case PROGRAM_ENV_PARAM:
998 case PROGRAM_LOCAL_PARAM:
999 case PROGRAM_STATE_VAR:
1000 case PROGRAM_NAMED_PARAM:
1001 case PROGRAM_UNIFORM:
1002 t->constants[i] = ureg_DECL_constant( ureg, i );
1003 break;
1004
1005 /* Emit immediates only when there is no address register
1006 * in use. FIXME: Be smarter and recognize param arrays:
1007 * indirect addressing is only valid within the referenced
1008 * array.
1009 */
1010 case PROGRAM_CONSTANT:
1011 if (program->NumAddressRegs > 0)
1012 t->constants[i] = ureg_DECL_constant( ureg, i );
1013 else
1014 t->constants[i] =
1015 ureg_DECL_immediate( ureg,
1016 program->Parameters->ParameterValues[i],
1017 4 );
1018 break;
1019 default:
1020 break;
1021 }
1022 }
1023 }
1024
1025 /* texture samplers */
1026 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1027 if (program->SamplersUsed & (1 << i)) {
1028 t->samplers[i] = ureg_DECL_sampler( ureg, i );
1029 }
1030 }
1031
1032 /* Emit each instruction in turn:
1033 */
1034 for (i = 0; i < program->NumInstructions; i++) {
1035 set_insn_start( t, ureg_get_instruction_number( ureg ));
1036 compile_instruction( t, &program->Instructions[i] );
1037
1038 /* note can't do that easily at the end of prog due to
1039 possible early return */
1040 if (t->prevInstWrotePsiz && program->Id) {
1041 set_insn_start( t, ureg_get_instruction_number( ureg ));
1042 ureg_MAX( t->ureg,
1043 ureg_writemask(t->outputs[t->psizoutindex], WRITEMASK_X),
1044 ureg_src(t->outputs[t->psizoutindex]),
1045 ureg_swizzle(t->pointSizeConst, 1,1,1,1));
1046 ureg_MIN( t->ureg, ureg_writemask(t->psizregreal, WRITEMASK_X),
1047 ureg_src(t->outputs[t->psizoutindex]),
1048 ureg_swizzle(t->pointSizeConst, 2,2,2,2));
1049 }
1050 t->prevInstWrotePsiz = GL_FALSE;
1051 }
1052
1053 /* Fix up all emitted labels:
1054 */
1055 for (i = 0; i < t->labels_count; i++) {
1056 ureg_fixup_label( ureg,
1057 t->labels[i].token,
1058 t->insn[t->labels[i].branch_target] );
1059 }
1060
1061 out:
1062 FREE(t->insn);
1063 FREE(t->labels);
1064 FREE(t->constants);
1065
1066 if (t->error) {
1067 debug_printf("%s: translate error flag set\n", __FUNCTION__);
1068 }
1069
1070 return ret;
1071 }
1072
1073
1074 /**
1075 * Tokens cannot be free with free otherwise the builtin gallium
1076 * malloc debugging will get confused.
1077 */
1078 void
1079 st_free_tokens(const struct tgsi_token *tokens)
1080 {
1081 FREE((void *)tokens);
1082 }