src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "pipe/p_context.h"
  38 #include "tgsi/tgsi_ureg.h"
  39 #include "st_mesa_to_tgsi.h"
  40 #include "st_context.h"
  41 #include "shader/prog_instruction.h"
  42 #include "shader/prog_parameter.h"
  43 #include "util/u_debug.h"
  44 #include "util/u_math.h"
  45 #include "util/u_memory.h"
  46
  47 struct label {
  48    unsigned branch_target;
  49    unsigned token;
  50 };
  51
  52
  53 /**
  54  * Intermediate state used during shader translation.
  55  */
  56 struct st_translate {
  57    struct ureg_program *ureg;
  58
  59    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  60    struct ureg_src *constants;
  61    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  62    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  63    struct ureg_dst address[1];
  64    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  65
  66    /* Extra info for handling point size clamping in vertex shader */
  67    struct ureg_dst pointSizeResult; /**< Actual point size output register */
  68    struct ureg_src pointSizeConst;  /**< Point size range constant register */
  69    GLint pointSizeOutIndex;         /**< Temp point size output register */
  70    GLboolean prevInstWrotePointSize;
  71
  72    const GLuint *inputMapping;
  73    const GLuint *outputMapping;
  74
  75    /* For every instruction that contains a label (eg CALL), keep
  76     * details so that we can go back afterwards and emit the correct
  77     * tgsi instruction number for each label.
  78     */
  79    struct label *labels;
  80    unsigned labels_size;
  81    unsigned labels_count;
  82
  83    /* Keep a record of the tgsi instruction number that each mesa
  84     * instruction starts at, will be used to fix up labels after
  85     * translation.
  86     */
  87    unsigned *insn;
  88    unsigned insn_size;
  89    unsigned insn_count;
  90
  91    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  92
  93    boolean error;
  94 };
  95
  96
  97 /**
  98  * Make note of a branch to a label in the TGSI code.
  99  * After we've emitted all instructions, we'll go over the list
 100  * of labels built here and patch the TGSI code with the actual
 101  * location of each label.
 102  */
 103 static unsigned *get_label( struct st_translate *t,
 104                             unsigned branch_target )
 105 {
 106    unsigned i;
 107
 108    if (t->labels_count + 1 >= t->labels_size) {
 109       unsigned old_size = t->labels_size;
 110       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
 111       t->labels = REALLOC( t->labels,
 112                            old_size * sizeof t->labels[0],
 113                            t->labels_size * sizeof t->labels[0] );
 114       if (t->labels == NULL) {
 115          static unsigned dummy;
 116          t->error = TRUE;
 117          return &dummy;
 118       }
 119    }
 120
 121    i = t->labels_count++;
 122    t->labels[i].branch_target = branch_target;
 123    return &t->labels[i].token;
 124 }
 125
 126
 127 /**
 128  * Called prior to emitting the TGSI code for each Mesa instruction.
 129  * Allocate additional space for instructions if needed.
 130  * Update the insn[] array so the next Mesa instruction points to
 131  * the next TGSI instruction.
 132  */
 133 static void set_insn_start( struct st_translate *t,
 134                             unsigned start )
 135 {
 136    if (t->insn_count + 1 >= t->insn_size) {
 137       unsigned old_size = t->insn_size;
 138       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 139       t->insn = REALLOC( t->insn,
 140                          old_size * sizeof t->insn[0],
 141                          t->insn_size * sizeof t->insn[0] );
 142       if (t->insn == NULL) {
 143          t->error = TRUE;
 144          return;
 145       }
 146    }
 147
 148    t->insn[t->insn_count++] = start;
 149 }
 150
 151
 152 /**
 153  * Map a Mesa dst register to a TGSI ureg_dst register.
 154  */
 155 static struct ureg_dst
 156 dst_register( struct st_translate *t,
 157               gl_register_file file,
 158               GLuint index )
 159 {
 160    switch( file ) {
 161    case PROGRAM_UNDEFINED:
 162       return ureg_dst_undef();
 163
 164    case PROGRAM_TEMPORARY:
 165       if (ureg_dst_is_undef(t->temps[index]))
 166          t->temps[index] = ureg_DECL_temporary( t->ureg );
 167
 168       return t->temps[index];
 169
 170    case PROGRAM_OUTPUT:
 171       if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
 172          t->prevInstWrotePointSize = GL_TRUE;
 173
 174       if (t->procType == TGSI_PROCESSOR_VERTEX)
 175          assert(index < VERT_RESULT_MAX);
 176       else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
 177          assert(index < FRAG_RESULT_MAX);
 178       else
 179          assert(0 && "geom shaders not handled in dst_register() yet");
 180
 181       assert(t->outputMapping[index] < Elements(t->outputs));
 182
 183       return t->outputs[t->outputMapping[index]];
 184
 185    case PROGRAM_ADDRESS:
 186       return t->address[index];
 187
 188    default:
 189       debug_assert( 0 );
 190       return ureg_dst_undef();
 191    }
 192 }
 193
 194
 195 /**
 196  * Map a Mesa src register to a TGSI ureg_src register.
 197  */
 198 static struct ureg_src
 199 src_register( struct st_translate *t,
 200               gl_register_file file,
 201               GLint index )
 202 {
 203    switch( file ) {
 204    case PROGRAM_UNDEFINED:
 205       return ureg_src_undef();
 206
 207    case PROGRAM_TEMPORARY:
 208       ASSERT(index >= 0);
 209       if (ureg_dst_is_undef(t->temps[index]))
 210          t->temps[index] = ureg_DECL_temporary( t->ureg );
 211       assert(index < Elements(t->temps));
 212       return ureg_src(t->temps[index]);
 213
 214    case PROGRAM_NAMED_PARAM:
 215    case PROGRAM_ENV_PARAM:
 216    case PROGRAM_LOCAL_PARAM:
 217    case PROGRAM_UNIFORM:
 218       ASSERT(index >= 0);
 219       return t->constants[index];
 220    case PROGRAM_STATE_VAR:
 221    case PROGRAM_CONSTANT:       /* ie, immediate */
 222       if (index < 0)
 223          return ureg_DECL_constant( t->ureg, 0 );
 224       else
 225          return t->constants[index];
 226
 227    case PROGRAM_INPUT:
 228       assert(t->inputMapping[index] < Elements(t->inputs));
 229       return t->inputs[t->inputMapping[index]];
 230
 231    case PROGRAM_OUTPUT:
 232       assert(t->outputMapping[index] < Elements(t->outputs));
 233       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 234
 235    case PROGRAM_ADDRESS:
 236       return ureg_src(t->address[index]);
 237
 238    default:
 239       debug_assert( 0 );
 240       return ureg_src_undef();
 241    }
 242 }
 243
 244
 245 /**
 246  * Map mesa texture target to TGSI texture target.
 247  */
 248 static unsigned
 249 translate_texture_target( GLuint textarget,
 250                           GLboolean shadow )
 251 {
 252    if (shadow) {
 253       switch( textarget ) {
 254       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 255       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 256       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 257       default: break;
 258       }
 259    }
 260
 261    switch( textarget ) {
 262    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 263    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 264    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 265    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 266    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 267    default:
 268       debug_assert( 0 );
 269       return TGSI_TEXTURE_1D;
 270    }
 271 }
 272
 273
 274 /**
 275  * Create a TGSI ureg_dst register from a Mesa dest register.
 276  */
 277 static struct ureg_dst
 278 translate_dst( struct st_translate *t,
 279                const struct prog_dst_register *DstReg,
 280                boolean saturate )
 281 {
 282    struct ureg_dst dst = dst_register( t,
 283                                        DstReg->File,
 284                                        DstReg->Index );
 285
 286    dst = ureg_writemask( dst,
 287                          DstReg->WriteMask );
 288
 289    if (saturate)
 290       dst = ureg_saturate( dst );
 291
 292    if (DstReg->RelAddr)
 293       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 294
 295    return dst;
 296 }
 297
 298
 299 /**
 300  * Create a TGSI ureg_src register from a Mesa src register.
 301  */
 302 static struct ureg_src
 303 translate_src( struct st_translate *t,
 304                const struct prog_src_register *SrcReg )
 305 {
 306    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 307
 308    src = ureg_swizzle( src,
 309                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 310                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 311                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 312                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 313
 314    if (SrcReg->Negate == NEGATE_XYZW)
 315       src = ureg_negate(src);
 316
 317    if (SrcReg->Abs)
 318       src = ureg_abs(src);
 319
 320    if (SrcReg->RelAddr) {
 321       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 322       /* If SrcReg->Index was negative, it was set to zero in
 323        * src_register().  Reassign it now.
 324        */
 325       src.Index = SrcReg->Index;
 326    }
 327
 328    return src;
 329 }
 330
 331
 332 static struct ureg_src swizzle_4v( struct ureg_src src,
 333                                    const unsigned *swz )
 334 {
 335    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 336 }
 337
 338
 339 /**
 340  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 341  *
 342  *   SWZ dst, src.x-y10
 343  *
 344  * becomes:
 345  *
 346  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 347  */
 348 static void emit_swz( struct st_translate *t,
 349                       struct ureg_dst dst,
 350                       const struct prog_src_register *SrcReg )
 351 {
 352    struct ureg_program *ureg = t->ureg;
 353    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 354
 355    unsigned negate_mask =  SrcReg->Negate;
 356
 357    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 358                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 359                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 360                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 361
 362    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 363                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 364                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 365                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 366
 367    unsigned negative_one_mask = one_mask & negate_mask;
 368    unsigned positive_one_mask = one_mask & ~negate_mask;
 369
 370    struct ureg_src imm;
 371    unsigned i;
 372    unsigned mul_swizzle[4] = {0,0,0,0};
 373    unsigned add_swizzle[4] = {0,0,0,0};
 374    unsigned src_swizzle[4] = {0,0,0,0};
 375    boolean need_add = FALSE;
 376    boolean need_mul = FALSE;
 377
 378    if (dst.WriteMask == 0)
 379       return;
 380
 381    /* Is this just a MOV?
 382     */
 383    if (zero_mask == 0 &&
 384        one_mask == 0 &&
 385        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 386    {
 387       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 388       return;
 389    }
 390
 391 #define IMM_ZERO    0
 392 #define IMM_ONE     1
 393 #define IMM_NEG_ONE 2
 394
 395    imm = ureg_imm3f( ureg, 0, 1, -1 );
 396
 397    for (i = 0; i < 4; i++) {
 398       unsigned bit = 1 << i;
 399
 400       if (dst.WriteMask & bit) {
 401          if (positive_one_mask & bit) {
 402             mul_swizzle[i] = IMM_ZERO;
 403             add_swizzle[i] = IMM_ONE;
 404             need_add = TRUE;
 405          }
 406          else if (negative_one_mask & bit) {
 407             mul_swizzle[i] = IMM_ZERO;
 408             add_swizzle[i] = IMM_NEG_ONE;
 409             need_add = TRUE;
 410          }
 411          else if (zero_mask & bit) {
 412             mul_swizzle[i] = IMM_ZERO;
 413             add_swizzle[i] = IMM_ZERO;
 414             need_add = TRUE;
 415          }
 416          else {
 417             add_swizzle[i] = IMM_ZERO;
 418             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 419             need_mul = TRUE;
 420             if (negate_mask & bit) {
 421                mul_swizzle[i] = IMM_NEG_ONE;
 422             }
 423             else {
 424                mul_swizzle[i] = IMM_ONE;
 425             }
 426          }
 427       }
 428    }
 429
 430    if (need_mul && need_add) {
 431       ureg_MAD( ureg,
 432                 dst,
 433                 swizzle_4v( src, src_swizzle ),
 434                 swizzle_4v( imm, mul_swizzle ),
 435                 swizzle_4v( imm, add_swizzle ) );
 436    }
 437    else if (need_mul) {
 438       ureg_MUL( ureg,
 439                 dst,
 440                 swizzle_4v( src, src_swizzle ),
 441                 swizzle_4v( imm, mul_swizzle ) );
 442    }
 443    else if (need_add) {
 444       ureg_MOV( ureg,
 445                 dst,
 446                 swizzle_4v( imm, add_swizzle ) );
 447    }
 448    else {
 449       debug_assert(0);
 450    }
 451
 452 #undef IMM_ZERO
 453 #undef IMM_ONE
 454 #undef IMM_NEG_ONE
 455 }
 456
 457
 458 /**
 459  * Negate the value of DDY to match GL semantics where (0,0) is the
 460  * lower-left corner of the window.
 461  * Note that the GL_ARB_fragment_coord_conventions extension will
 462  * effect this someday.
 463  */
 464 static void emit_ddy( struct st_translate *t,
 465                       struct ureg_dst dst,
 466                       const struct prog_src_register *SrcReg )
 467 {
 468    struct ureg_program *ureg = t->ureg;
 469    struct ureg_src src = translate_src( t, SrcReg );
 470    src = ureg_negate( src );
 471    ureg_DDY( ureg, dst, src );
 472 }
 473
 474
 475
 476 static unsigned
 477 translate_opcode( unsigned op )
 478 {
 479    switch( op ) {
 480    case OPCODE_ARL:
 481       return TGSI_OPCODE_ARL;
 482    case OPCODE_ABS:
 483       return TGSI_OPCODE_ABS;
 484    case OPCODE_ADD:
 485       return TGSI_OPCODE_ADD;
 486    case OPCODE_BGNLOOP:
 487       return TGSI_OPCODE_BGNLOOP;
 488    case OPCODE_BGNSUB:
 489       return TGSI_OPCODE_BGNSUB;
 490    case OPCODE_BRA:
 491       return TGSI_OPCODE_BRA;
 492    case OPCODE_BRK:
 493       return TGSI_OPCODE_BRK;
 494    case OPCODE_CAL:
 495       return TGSI_OPCODE_CAL;
 496    case OPCODE_CMP:
 497       return TGSI_OPCODE_CMP;
 498    case OPCODE_CONT:
 499       return TGSI_OPCODE_CONT;
 500    case OPCODE_COS:
 501       return TGSI_OPCODE_COS;
 502    case OPCODE_DDX:
 503       return TGSI_OPCODE_DDX;
 504    case OPCODE_DDY:
 505       return TGSI_OPCODE_DDY;
 506    case OPCODE_DP2:
 507       return TGSI_OPCODE_DP2;
 508    case OPCODE_DP2A:
 509       return TGSI_OPCODE_DP2A;
 510    case OPCODE_DP3:
 511       return TGSI_OPCODE_DP3;
 512    case OPCODE_DP4:
 513       return TGSI_OPCODE_DP4;
 514    case OPCODE_DPH:
 515       return TGSI_OPCODE_DPH;
 516    case OPCODE_DST:
 517       return TGSI_OPCODE_DST;
 518    case OPCODE_ELSE:
 519       return TGSI_OPCODE_ELSE;
 520    case OPCODE_ENDIF:
 521       return TGSI_OPCODE_ENDIF;
 522    case OPCODE_ENDLOOP:
 523       return TGSI_OPCODE_ENDLOOP;
 524    case OPCODE_ENDSUB:
 525       return TGSI_OPCODE_ENDSUB;
 526    case OPCODE_EX2:
 527       return TGSI_OPCODE_EX2;
 528    case OPCODE_EXP:
 529       return TGSI_OPCODE_EXP;
 530    case OPCODE_FLR:
 531       return TGSI_OPCODE_FLR;
 532    case OPCODE_FRC:
 533       return TGSI_OPCODE_FRC;
 534    case OPCODE_IF:
 535       return TGSI_OPCODE_IF;
 536    case OPCODE_TRUNC:
 537       return TGSI_OPCODE_TRUNC;
 538    case OPCODE_KIL:
 539       return TGSI_OPCODE_KIL;
 540    case OPCODE_KIL_NV:
 541       return TGSI_OPCODE_KILP;
 542    case OPCODE_LG2:
 543       return TGSI_OPCODE_LG2;
 544    case OPCODE_LOG:
 545       return TGSI_OPCODE_LOG;
 546    case OPCODE_LIT:
 547       return TGSI_OPCODE_LIT;
 548    case OPCODE_LRP:
 549       return TGSI_OPCODE_LRP;
 550    case OPCODE_MAD:
 551       return TGSI_OPCODE_MAD;
 552    case OPCODE_MAX:
 553       return TGSI_OPCODE_MAX;
 554    case OPCODE_MIN:
 555       return TGSI_OPCODE_MIN;
 556    case OPCODE_MOV:
 557       return TGSI_OPCODE_MOV;
 558    case OPCODE_MUL:
 559       return TGSI_OPCODE_MUL;
 560    case OPCODE_NOP:
 561       return TGSI_OPCODE_NOP;
 562    case OPCODE_NRM3:
 563       return TGSI_OPCODE_NRM;
 564    case OPCODE_NRM4:
 565       return TGSI_OPCODE_NRM4;
 566    case OPCODE_POW:
 567       return TGSI_OPCODE_POW;
 568    case OPCODE_RCP:
 569       return TGSI_OPCODE_RCP;
 570    case OPCODE_RET:
 571       return TGSI_OPCODE_RET;
 572    case OPCODE_RSQ:
 573       return TGSI_OPCODE_RSQ;
 574    case OPCODE_SCS:
 575       return TGSI_OPCODE_SCS;
 576    case OPCODE_SEQ:
 577       return TGSI_OPCODE_SEQ;
 578    case OPCODE_SGE:
 579       return TGSI_OPCODE_SGE;
 580    case OPCODE_SGT:
 581       return TGSI_OPCODE_SGT;
 582    case OPCODE_SIN:
 583       return TGSI_OPCODE_SIN;
 584    case OPCODE_SLE:
 585       return TGSI_OPCODE_SLE;
 586    case OPCODE_SLT:
 587       return TGSI_OPCODE_SLT;
 588    case OPCODE_SNE:
 589       return TGSI_OPCODE_SNE;
 590    case OPCODE_SSG:
 591       return TGSI_OPCODE_SSG;
 592    case OPCODE_SUB:
 593       return TGSI_OPCODE_SUB;
 594    case OPCODE_TEX:
 595       return TGSI_OPCODE_TEX;
 596    case OPCODE_TXB:
 597       return TGSI_OPCODE_TXB;
 598    case OPCODE_TXD:
 599       return TGSI_OPCODE_TXD;
 600    case OPCODE_TXL:
 601       return TGSI_OPCODE_TXL;
 602    case OPCODE_TXP:
 603       return TGSI_OPCODE_TXP;
 604    case OPCODE_XPD:
 605       return TGSI_OPCODE_XPD;
 606    case OPCODE_END:
 607       return TGSI_OPCODE_END;
 608    default:
 609       debug_assert( 0 );
 610       return TGSI_OPCODE_NOP;
 611    }
 612 }
 613
 614
 615 static void
 616 compile_instruction(
 617    struct st_translate *t,
 618    const struct prog_instruction *inst )
 619 {
 620    struct ureg_program *ureg = t->ureg;
 621    GLuint i;
 622    struct ureg_dst dst[1];
 623    struct ureg_src src[4];
 624    unsigned num_dst;
 625    unsigned num_src;
 626
 627    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 628    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 629
 630    if (num_dst)
 631       dst[0] = translate_dst( t,
 632                               &inst->DstReg,
 633                               inst->SaturateMode );
 634
 635    for (i = 0; i < num_src; i++)
 636       src[i] = translate_src( t, &inst->SrcReg[i] );
 637
 638    switch( inst->Opcode ) {
 639    case OPCODE_SWZ:
 640       emit_swz( t, dst[0], &inst->SrcReg[0] );
 641       return;
 642
 643    case OPCODE_BGNLOOP:
 644    case OPCODE_CAL:
 645    case OPCODE_ELSE:
 646    case OPCODE_ENDLOOP:
 647    case OPCODE_IF:
 648       debug_assert(num_dst == 0);
 649       ureg_label_insn( ureg,
 650                        translate_opcode( inst->Opcode ),
 651                        src, num_src,
 652                        get_label( t, inst->BranchTarget ));
 653       return;
 654
 655    case OPCODE_TEX:
 656    case OPCODE_TXB:
 657    case OPCODE_TXD:
 658    case OPCODE_TXL:
 659    case OPCODE_TXP:
 660       src[num_src++] = t->samplers[inst->TexSrcUnit];
 661       ureg_tex_insn( ureg,
 662                      translate_opcode( inst->Opcode ),
 663                      dst, num_dst,
 664                      translate_texture_target( inst->TexSrcTarget,
 665                                                inst->TexShadow ),
 666                      src, num_src );
 667       return;
 668
 669    case OPCODE_SCS:
 670       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 671       ureg_insn( ureg,
 672                  translate_opcode( inst->Opcode ),
 673                  dst, num_dst,
 674                  src, num_src );
 675       break;
 676
 677    case OPCODE_XPD:
 678       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 679       ureg_insn( ureg,
 680                  translate_opcode( inst->Opcode ),
 681                  dst, num_dst,
 682                  src, num_src );
 683       break;
 684
 685    case OPCODE_NOISE1:
 686    case OPCODE_NOISE2:
 687    case OPCODE_NOISE3:
 688    case OPCODE_NOISE4:
 689       /* At some point, a motivated person could add a better
 690        * implementation of noise.  Currently not even the nvidia
 691        * binary drivers do anything more than this.  In any case, the
 692        * place to do this is in the GL state tracker, not the poor
 693        * driver.
 694        */
 695       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 696       break;
 697
 698    case OPCODE_DDY:
 699       emit_ddy( t, dst[0], &inst->SrcReg[0] );
 700       break;
 701
 702    default:
 703       ureg_insn( ureg,
 704                  translate_opcode( inst->Opcode ),
 705                  dst, num_dst,
 706                  src, num_src );
 707       break;
 708    }
 709 }
 710
 711
 712 /**
 713  * Emit the TGSI instructions to adjust the WPOS pixel center convention
 714  */
 715 static void
 716 emit_adjusted_wpos( struct st_translate *t,
 717                     const struct gl_program *program, GLfloat value)
 718 {
 719    struct ureg_program *ureg = t->ureg;
 720    struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
 721    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 722
 723    ureg_ADD(ureg,
 724             ureg_writemask(wpos_temp, TGSI_WRITEMASK_X | TGSI_WRITEMASK_Y),
 725             wpos_input, ureg_imm1f(ureg, value));
 726
 727    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 728 }
 729
 730
 731 /**
 732  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 733  */
 734 static void
 735 emit_inverted_wpos( struct st_translate *t,
 736                     const struct gl_program *program )
 737 {
 738    struct ureg_program *ureg = t->ureg;
 739
 740    /* Fragment program uses fragment position input.
 741     * Need to replace instances of INPUT[WPOS] with temp T
 742     * where T = INPUT[WPOS] by y is inverted.
 743     */
 744    static const gl_state_index winSizeState[STATE_LENGTH]
 745       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 746
 747    /* XXX: note we are modifying the incoming shader here!  Need to
 748     * do this before emitting the constant decls below, or this
 749     * will be missed:
 750     */
 751    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 752                                                        winSizeState);
 753
 754    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 755    struct ureg_dst wpos_temp;
 756    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 757
 758    /* MOV wpos_temp, input[wpos]
 759     */
 760    if (wpos_input.File == TGSI_FILE_TEMPORARY)
 761       wpos_temp = ureg_dst(wpos_input);
 762    else {
 763       wpos_temp = ureg_DECL_temporary( ureg );
 764       ureg_MOV( ureg, wpos_temp, wpos_input );
 765    }
 766
 767    /* SUB wpos_temp.y, winsize_const, wpos_input
 768     */
 769    ureg_SUB( ureg,
 770              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 771              winsize,
 772              wpos_input);
 773
 774    /* Use wpos_temp as position input from here on:
 775     */
 776    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 777 }
 778
 779
 780 /**
 781  * Emit fragment position/ooordinate code.
 782  */
 783 static void
 784 emit_wpos(struct st_context *st,
 785           struct st_translate *t,
 786           const struct gl_program *program,
 787           struct ureg_program *ureg)
 788 {
 789    const struct gl_fragment_program *fp =
 790       (const struct gl_fragment_program *) program;
 791    struct pipe_screen *pscreen = st->pipe->screen;
 792    boolean invert = FALSE;
 793
 794    if (fp->OriginUpperLeft) {
 795       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
 796       }
 797       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
 798          ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
 799          invert = TRUE;
 800       }
 801       else
 802          assert(0);
 803    }
 804    else {
 805       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
 806          ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
 807       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
 808          invert = TRUE;
 809       else
 810          assert(0);
 811    }
 812
 813    if (fp->PixelCenterInteger) {
 814       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER))
 815          ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
 816       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER))
 817          emit_adjusted_wpos(t, program, invert ? 0.5f : -0.5f);
 818       else
 819          assert(0);
 820    }
 821    else {
 822       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
 823       }
 824       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
 825          ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
 826          emit_adjusted_wpos(t, program, invert ? -0.5f : 0.5f);
 827       }
 828       else
 829          assert(0);
 830    }
 831
 832    /* we invert after adjustment so that we avoid the MOV to temporary,
 833     * and reuse the adjustment ADD instead */
 834    if (invert)
 835       emit_inverted_wpos(t, program);
 836 }
 837
 838
 839 /**
 840  * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
 841  * TGSI uses +1 for front, -1 for back.
 842  * This function converts the TGSI value to the GL value.  Simply clamping/
 843  * saturating the value to [0,1] does the job.
 844  */
 845 static void
 846 emit_face_var( struct st_translate *t,
 847                const struct gl_program *program )
 848 {
 849    struct ureg_program *ureg = t->ureg;
 850    struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
 851    struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
 852
 853    /* MOV_SAT face_temp, input[face]
 854     */
 855    face_temp = ureg_saturate( face_temp );
 856    ureg_MOV( ureg, face_temp, face_input );
 857
 858    /* Use face_temp as face input from here on:
 859     */
 860    t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
 861 }
 862
 863
 864 static void
 865 emit_edgeflags( struct st_translate *t,
 866                  const struct gl_program *program )
 867 {
 868    struct ureg_program *ureg = t->ureg;
 869    struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
 870    struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
 871
 872    ureg_MOV( ureg, edge_dst, edge_src );
 873 }
 874
 875
 876 /**
 877  * Translate Mesa program to TGSI format.
 878  * \param program  the program to translate
 879  * \param numInputs  number of input registers used
 880  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 881  *                      input indexes
 882  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 883  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 884  *                            each input
 885  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 886  * \param numOutputs  number of output registers used
 887  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 888  *                       generic outputs
 889  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 890  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 891  *                             each output
 892  *
 893  * \return  PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
 894  */
 895 enum pipe_error
 896 st_translate_mesa_program(
 897    GLcontext *ctx,
 898    uint procType,
 899    struct ureg_program *ureg,
 900    const struct gl_program *program,
 901    GLuint numInputs,
 902    const GLuint inputMapping[],
 903    const ubyte inputSemanticName[],
 904    const ubyte inputSemanticIndex[],
 905    const GLuint interpMode[],
 906    GLuint numOutputs,
 907    const GLuint outputMapping[],
 908    const ubyte outputSemanticName[],
 909    const ubyte outputSemanticIndex[],
 910    boolean passthrough_edgeflags )
 911 {
 912    struct st_translate translate, *t;
 913    unsigned i;
 914    enum pipe_error ret = PIPE_OK;
 915
 916    t = &translate;
 917    memset(t, 0, sizeof *t);
 918
 919    t->procType = procType;
 920    t->inputMapping = inputMapping;
 921    t->outputMapping = outputMapping;
 922    t->ureg = ureg;
 923    t->pointSizeOutIndex = -1;
 924    t->prevInstWrotePointSize = GL_FALSE;
 925
 926    /*_mesa_print_program(program);*/
 927
 928    /*
 929     * Declare input attributes.
 930     */
 931    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 932       for (i = 0; i < numInputs; i++) {
 933          if (program->InputFlags[0] & PROG_PARAM_BIT_CYL_WRAP) {
 934             t->inputs[i] = ureg_DECL_fs_input_cyl(ureg,
 935                                                   inputSemanticName[i],
 936                                                   inputSemanticIndex[i],
 937                                                   interpMode[i],
 938                                                   TGSI_CYLINDRICAL_WRAP_X);
 939          }
 940          else {
 941             t->inputs[i] = ureg_DECL_fs_input(ureg,
 942                                               inputSemanticName[i],
 943                                               inputSemanticIndex[i],
 944                                               interpMode[i]);
 945          }
 946       }
 947
 948       if (program->InputsRead & FRAG_BIT_WPOS) {
 949          /* Must do this after setting up t->inputs, and before
 950           * emitting constant references, below:
 951           */
 952          emit_wpos(st_context(ctx), t, program, ureg);
 953       }
 954
 955       if (program->InputsRead & FRAG_BIT_FACE) {
 956          emit_face_var( t, program );
 957       }
 958
 959       /*
 960        * Declare output attributes.
 961        */
 962       for (i = 0; i < numOutputs; i++) {
 963          switch (outputSemanticName[i]) {
 964          case TGSI_SEMANTIC_POSITION:
 965             t->outputs[i] = ureg_DECL_output( ureg,
 966                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 967                                               outputSemanticIndex[i] );
 968
 969             t->outputs[i] = ureg_writemask( t->outputs[i],
 970                                             TGSI_WRITEMASK_Z );
 971             break;
 972          case TGSI_SEMANTIC_COLOR:
 973             t->outputs[i] = ureg_DECL_output( ureg,
 974                                               TGSI_SEMANTIC_COLOR,
 975                                               outputSemanticIndex[i] );
 976             break;
 977          default:
 978             debug_assert(0);
 979             return 0;
 980          }
 981       }
 982    }
 983    else {
 984       for (i = 0; i < numInputs; i++) {
 985          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 986       }
 987
 988       for (i = 0; i < numOutputs; i++) {
 989          t->outputs[i] = ureg_DECL_output( ureg,
 990                                            outputSemanticName[i],
 991                                            outputSemanticIndex[i] );
 992          if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && program->Id) {
 993             /* Writing to the point size result register requires special
 994              * handling to implement clamping.
 995              */
 996             static const gl_state_index pointSizeClampState[STATE_LENGTH]
 997                = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, 0, 0, 0 };
 998                /* XXX: note we are modifying the incoming shader here!  Need to
 999                * do this before emitting the constant decls below, or this
1000                * will be missed:
1001                */
1002             unsigned pointSizeClampConst =
1003                _mesa_add_state_reference(program->Parameters,
1004                                          pointSizeClampState);
1005             struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
1006             t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
1007             t->pointSizeResult = t->outputs[i];
1008             t->pointSizeOutIndex = i;
1009             t->outputs[i] = psizregtemp;
1010          }
1011       }
1012       if (passthrough_edgeflags)
1013          emit_edgeflags( t, program );
1014    }
1015
1016    /* Declare address register.
1017     */
1018    if (program->NumAddressRegs > 0) {
1019       debug_assert( program->NumAddressRegs == 1 );
1020       t->address[0] = ureg_DECL_address( ureg );
1021    }
1022
1023    /* Emit constants and immediates.  Mesa uses a single index space
1024     * for these, so we put all the translated regs in t->constants.
1025     */
1026    if (program->Parameters) {
1027       t->constants = CALLOC( program->Parameters->NumParameters,
1028                              sizeof t->constants[0] );
1029       if (t->constants == NULL) {
1030          ret = PIPE_ERROR_OUT_OF_MEMORY;
1031          goto out;
1032       }
1033
1034       for (i = 0; i < program->Parameters->NumParameters; i++) {
1035          switch (program->Parameters->Parameters[i].Type) {
1036          case PROGRAM_ENV_PARAM:
1037          case PROGRAM_LOCAL_PARAM:
1038          case PROGRAM_STATE_VAR:
1039          case PROGRAM_NAMED_PARAM:
1040          case PROGRAM_UNIFORM:
1041             t->constants[i] = ureg_DECL_constant( ureg, i );
1042             break;
1043
1044             /* Emit immediates only when there is no address register
1045              * in use.  FIXME: Be smarter and recognize param arrays:
1046              * indirect addressing is only valid within the referenced
1047              * array.
1048              */
1049          case PROGRAM_CONSTANT:
1050             if (program->NumAddressRegs > 0)
1051                t->constants[i] = ureg_DECL_constant( ureg, i );
1052             else
1053                t->constants[i] =
1054                   ureg_DECL_immediate( ureg,
1055                                        program->Parameters->ParameterValues[i],
1056                                        4 );
1057             break;
1058          default:
1059             break;
1060          }
1061       }
1062    }
1063
1064    /* texture samplers */
1065    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1066       if (program->SamplersUsed & (1 << i)) {
1067          t->samplers[i] = ureg_DECL_sampler( ureg, i );
1068       }
1069    }
1070
1071    /* Emit each instruction in turn:
1072     */
1073    for (i = 0; i < program->NumInstructions; i++) {
1074       set_insn_start( t, ureg_get_instruction_number( ureg ));
1075       compile_instruction( t, &program->Instructions[i] );
1076
1077       if (t->prevInstWrotePointSize && program->Id) {
1078          /* The previous instruction wrote to the (fake) vertex point size
1079           * result register.  Now we need to clamp that value to the min/max
1080           * point size range, putting the result into the real point size
1081           * register.
1082           * Note that we can't do this easily at the end of program due to
1083           * possible early return.
1084           */
1085          set_insn_start( t, ureg_get_instruction_number( ureg ));
1086          ureg_MAX( t->ureg,
1087                    ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
1088                    ureg_src(t->outputs[t->pointSizeOutIndex]),
1089                    ureg_swizzle(t->pointSizeConst, 1,1,1,1));
1090          ureg_MIN( t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
1091                    ureg_src(t->outputs[t->pointSizeOutIndex]),
1092                    ureg_swizzle(t->pointSizeConst, 2,2,2,2));
1093       }
1094       t->prevInstWrotePointSize = GL_FALSE;
1095    }
1096
1097    /* Fix up all emitted labels:
1098     */
1099    for (i = 0; i < t->labels_count; i++) {
1100       ureg_fixup_label( ureg,
1101                         t->labels[i].token,
1102                         t->insn[t->labels[i].branch_target] );
1103    }
1104
1105 out:
1106    FREE(t->insn);
1107    FREE(t->labels);
1108    FREE(t->constants);
1109
1110    if (t->error) {
1111       debug_printf("%s: translate error flag set\n", __FUNCTION__);
1112    }
1113
1114    return ret;
1115 }
1116
1117
1118 /**
1119  * Tokens cannot be free with free otherwise the builtin gallium
1120  * malloc debugging will get confused.
1121  */
1122 void
1123 st_free_tokens(const struct tgsi_token *tokens)
1124 {
1125    FREE((void *)tokens);
1126 }