src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "tgsi/tgsi_ureg.h"
  38 #include "st_mesa_to_tgsi.h"
  39 #include "shader/prog_instruction.h"
  40 #include "shader/prog_parameter.h"
  41 #include "shader/prog_print.h"
  42 #include "util/u_debug.h"
  43 #include "util/u_math.h"
  44 #include "util/u_memory.h"
  45
  46 struct label {
  47    unsigned branch_target;
  48    unsigned token;
  49 };
  50
  51
  52 /**
  53  * Intermediate state used during shader translation.
  54  */
  55 struct st_translate {
  56    struct ureg_program *ureg;
  57
  58    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  59    struct ureg_src *constants;
  60    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  61    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  62    struct ureg_dst address[1];
  63    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  64
  65    const GLuint *inputMapping;
  66    const GLuint *outputMapping;
  67
  68    /* For every instruction that contains a label (eg CALL), keep
  69     * details so that we can go back afterwards and emit the correct
  70     * tgsi instruction number for each label.
  71     */
  72    struct label *labels;
  73    unsigned labels_size;
  74    unsigned labels_count;
  75
  76    /* Keep a record of the tgsi instruction number that each mesa
  77     * instruction starts at, will be used to fix up labels after
  78     * translation.
  79     */
  80    unsigned *insn;
  81    unsigned insn_size;
  82    unsigned insn_count;
  83
  84    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  85
  86    boolean error;
  87 };
  88
  89
  90 static unsigned *get_label( struct st_translate *t,
  91                             unsigned branch_target )
  92 {
  93    unsigned i;
  94
  95    if (t->labels_count + 1 >= t->labels_size) {
  96       unsigned old_size = t->labels_size;
  97       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
  98       t->labels = REALLOC( t->labels,
  99                            old_size * sizeof t->labels[0],
 100                            t->labels_size * sizeof t->labels[0] );
 101       if (t->labels == NULL) {
 102          static unsigned dummy;
 103          t->error = TRUE;
 104          return &dummy;
 105       }
 106    }
 107
 108    i = t->labels_count++;
 109    t->labels[i].branch_target = branch_target;
 110    return &t->labels[i].token;
 111 }
 112
 113
 114 static void set_insn_start( struct st_translate *t,
 115                             unsigned start )
 116 {
 117    if (t->insn_count + 1 >= t->insn_size) {
 118       unsigned old_size = t->insn_size;
 119       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 120       t->insn = REALLOC( t->insn,
 121                          old_size * sizeof t->insn[0],
 122                          t->insn_size * sizeof t->insn[0] );
 123       if (t->insn == NULL) {
 124          t->error = TRUE;
 125          return;
 126       }
 127    }
 128
 129    t->insn[t->insn_count++] = start;
 130 }
 131
 132
 133 /*
 134  * Map mesa register file to TGSI register file.
 135  */
 136 static struct ureg_dst
 137 dst_register( struct st_translate *t,
 138               gl_register_file file,
 139               GLuint index )
 140 {
 141    switch( file ) {
 142    case PROGRAM_UNDEFINED:
 143       return ureg_dst_undef();
 144
 145    case PROGRAM_TEMPORARY:
 146       if (ureg_dst_is_undef(t->temps[index]))
 147          t->temps[index] = ureg_DECL_temporary( t->ureg );
 148
 149       return t->temps[index];
 150
 151    case PROGRAM_OUTPUT:
 152       return t->outputs[t->outputMapping[index]];
 153
 154    case PROGRAM_ADDRESS:
 155       return t->address[index];
 156
 157    default:
 158       debug_assert( 0 );
 159       return ureg_dst_undef();
 160    }
 161 }
 162
 163
 164 static struct ureg_src
 165 src_register( struct st_translate *t,
 166               gl_register_file file,
 167               GLint index )
 168 {
 169    switch( file ) {
 170    case PROGRAM_UNDEFINED:
 171       return ureg_src_undef();
 172
 173    case PROGRAM_TEMPORARY:
 174       ASSERT(index >= 0);
 175       if (ureg_dst_is_undef(t->temps[index]))
 176          t->temps[index] = ureg_DECL_temporary( t->ureg );
 177       return ureg_src(t->temps[index]);
 178
 179    case PROGRAM_STATE_VAR:
 180    case PROGRAM_NAMED_PARAM:
 181    case PROGRAM_ENV_PARAM:
 182    case PROGRAM_LOCAL_PARAM:
 183    case PROGRAM_UNIFORM:
 184       ASSERT(index >= 0);
 185       return t->constants[index];
 186    case PROGRAM_CONSTANT:       /* ie, immediate */
 187       if (index < 0)
 188          return ureg_DECL_constant( t->ureg, 0 );
 189       else
 190          return t->constants[index];
 191
 192    case PROGRAM_INPUT:
 193       return t->inputs[t->inputMapping[index]];
 194
 195    case PROGRAM_OUTPUT:
 196       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 197
 198    case PROGRAM_ADDRESS:
 199       return ureg_src(t->address[index]);
 200
 201    default:
 202       debug_assert( 0 );
 203       return ureg_src_undef();
 204    }
 205 }
 206
 207
 208 /**
 209  * Map mesa texture target to TGSI texture target.
 210  */
 211 static unsigned
 212 translate_texture_target( GLuint textarget,
 213                           GLboolean shadow )
 214 {
 215    if (shadow) {
 216       switch( textarget ) {
 217       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 218       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 219       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 220       default: break;
 221       }
 222    }
 223
 224    switch( textarget ) {
 225    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 226    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 227    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 228    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 229    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 230    default:
 231       debug_assert( 0 );
 232       return TGSI_TEXTURE_1D;
 233    }
 234 }
 235
 236
 237 static struct ureg_dst
 238 translate_dst( struct st_translate *t,
 239                const struct prog_dst_register *DstReg,
 240                boolean saturate )
 241 {
 242    struct ureg_dst dst = dst_register( t,
 243                                        DstReg->File,
 244                                        DstReg->Index );
 245
 246    dst = ureg_writemask( dst,
 247                          DstReg->WriteMask );
 248
 249    if (saturate)
 250       dst = ureg_saturate( dst );
 251
 252    if (DstReg->RelAddr)
 253       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 254
 255    return dst;
 256 }
 257
 258
 259 static struct ureg_src
 260 translate_src( struct st_translate *t,
 261                const struct prog_src_register *SrcReg )
 262 {
 263    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 264
 265    src = ureg_swizzle( src,
 266                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 267                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 268                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 269                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 270
 271    if (SrcReg->Negate == NEGATE_XYZW)
 272       src = ureg_negate(src);
 273
 274    if (SrcReg->Abs)
 275       src = ureg_abs(src);
 276
 277    if (SrcReg->RelAddr) {
 278       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 279       /* If SrcReg->Index was negative, it was set to zero in
 280        * src_register().  Reassign it now.
 281        */
 282       src.Index = SrcReg->Index;
 283    }
 284
 285    return src;
 286 }
 287
 288
 289 static struct ureg_src swizzle_4v( struct ureg_src src,
 290                                    const unsigned *swz )
 291 {
 292    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 293 }
 294
 295
 296 /**
 297  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 298  *
 299  *   SWZ dst, src.x-y10
 300  *
 301  * becomes:
 302  *
 303  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 304  */
 305 static void emit_swz( struct st_translate *t,
 306                       struct ureg_dst dst,
 307                       const struct prog_src_register *SrcReg )
 308 {
 309    struct ureg_program *ureg = t->ureg;
 310    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 311
 312    unsigned negate_mask =  SrcReg->Negate;
 313
 314    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 315                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 316                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 317                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 318
 319    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 320                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 321                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 322                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 323
 324    unsigned negative_one_mask = one_mask & negate_mask;
 325    unsigned positive_one_mask = one_mask & ~negate_mask;
 326
 327    struct ureg_src imm;
 328    unsigned i;
 329    unsigned mul_swizzle[4] = {0,0,0,0};
 330    unsigned add_swizzle[4] = {0,0,0,0};
 331    unsigned src_swizzle[4] = {0,0,0,0};
 332    boolean need_add = FALSE;
 333    boolean need_mul = FALSE;
 334
 335    if (dst.WriteMask == 0)
 336       return;
 337
 338    /* Is this just a MOV?
 339     */
 340    if (zero_mask == 0 &&
 341        one_mask == 0 &&
 342        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 343    {
 344       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 345       return;
 346    }
 347
 348 #define IMM_ZERO    0
 349 #define IMM_ONE     1
 350 #define IMM_NEG_ONE 2
 351
 352    imm = ureg_imm3f( ureg, 0, 1, -1 );
 353
 354    for (i = 0; i < 4; i++) {
 355       unsigned bit = 1 << i;
 356
 357       if (dst.WriteMask & bit) {
 358          if (positive_one_mask & bit) {
 359             mul_swizzle[i] = IMM_ZERO;
 360             add_swizzle[i] = IMM_ONE;
 361             need_add = TRUE;
 362          }
 363          else if (negative_one_mask & bit) {
 364             mul_swizzle[i] = IMM_ZERO;
 365             add_swizzle[i] = IMM_NEG_ONE;
 366             need_add = TRUE;
 367          }
 368          else if (zero_mask & bit) {
 369             mul_swizzle[i] = IMM_ZERO;
 370             add_swizzle[i] = IMM_ZERO;
 371             need_add = TRUE;
 372          }
 373          else {
 374             add_swizzle[i] = IMM_ZERO;
 375             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 376             need_mul = TRUE;
 377             if (negate_mask & bit) {
 378                mul_swizzle[i] = IMM_NEG_ONE;
 379             }
 380             else {
 381                mul_swizzle[i] = IMM_ONE;
 382             }
 383          }
 384       }
 385    }
 386
 387    if (need_mul && need_add) {
 388       ureg_MAD( ureg,
 389                 dst,
 390                 swizzle_4v( src, src_swizzle ),
 391                 swizzle_4v( imm, mul_swizzle ),
 392                 swizzle_4v( imm, add_swizzle ) );
 393    }
 394    else if (need_mul) {
 395       ureg_MUL( ureg,
 396                 dst,
 397                 swizzle_4v( src, src_swizzle ),
 398                 swizzle_4v( imm, mul_swizzle ) );
 399    }
 400    else if (need_add) {
 401       ureg_MOV( ureg,
 402                 dst,
 403                 swizzle_4v( imm, add_swizzle ) );
 404    }
 405    else {
 406       debug_assert(0);
 407    }
 408
 409 #undef IMM_ZERO
 410 #undef IMM_ONE
 411 #undef IMM_NEG_ONE
 412 }
 413
 414
 415 /**
 416  * Negate the value of DDY to match GL semantics where (0,0) is the
 417  * lower-left corner of the window.
 418  * Note that the GL_ARB_fragment_coord_conventions extension will
 419  * effect this someday.
 420  */
 421 static void emit_ddy( struct st_translate *t,
 422                       struct ureg_dst dst,
 423                       const struct prog_src_register *SrcReg )
 424 {
 425    struct ureg_program *ureg = t->ureg;
 426    struct ureg_src src = translate_src( t, SrcReg );
 427    src = ureg_negate( src );
 428    ureg_DDY( ureg, dst, src );
 429 }
 430
 431
 432
 433 static unsigned
 434 translate_opcode( unsigned op )
 435 {
 436    switch( op ) {
 437    case OPCODE_ARL:
 438       return TGSI_OPCODE_ARL;
 439    case OPCODE_ABS:
 440       return TGSI_OPCODE_ABS;
 441    case OPCODE_ADD:
 442       return TGSI_OPCODE_ADD;
 443    case OPCODE_BGNLOOP:
 444       return TGSI_OPCODE_BGNLOOP;
 445    case OPCODE_BGNSUB:
 446       return TGSI_OPCODE_BGNSUB;
 447    case OPCODE_BRA:
 448       return TGSI_OPCODE_BRA;
 449    case OPCODE_BRK:
 450       return TGSI_OPCODE_BRK;
 451    case OPCODE_CAL:
 452       return TGSI_OPCODE_CAL;
 453    case OPCODE_CMP:
 454       return TGSI_OPCODE_CMP;
 455    case OPCODE_CONT:
 456       return TGSI_OPCODE_CONT;
 457    case OPCODE_COS:
 458       return TGSI_OPCODE_COS;
 459    case OPCODE_DDX:
 460       return TGSI_OPCODE_DDX;
 461    case OPCODE_DDY:
 462       return TGSI_OPCODE_DDY;
 463    case OPCODE_DP2:
 464       return TGSI_OPCODE_DP2;
 465    case OPCODE_DP2A:
 466       return TGSI_OPCODE_DP2A;
 467    case OPCODE_DP3:
 468       return TGSI_OPCODE_DP3;
 469    case OPCODE_DP4:
 470       return TGSI_OPCODE_DP4;
 471    case OPCODE_DPH:
 472       return TGSI_OPCODE_DPH;
 473    case OPCODE_DST:
 474       return TGSI_OPCODE_DST;
 475    case OPCODE_ELSE:
 476       return TGSI_OPCODE_ELSE;
 477    case OPCODE_ENDIF:
 478       return TGSI_OPCODE_ENDIF;
 479    case OPCODE_ENDLOOP:
 480       return TGSI_OPCODE_ENDLOOP;
 481    case OPCODE_ENDSUB:
 482       return TGSI_OPCODE_ENDSUB;
 483    case OPCODE_EX2:
 484       return TGSI_OPCODE_EX2;
 485    case OPCODE_EXP:
 486       return TGSI_OPCODE_EXP;
 487    case OPCODE_FLR:
 488       return TGSI_OPCODE_FLR;
 489    case OPCODE_FRC:
 490       return TGSI_OPCODE_FRC;
 491    case OPCODE_IF:
 492       return TGSI_OPCODE_IF;
 493    case OPCODE_TRUNC:
 494       return TGSI_OPCODE_TRUNC;
 495    case OPCODE_KIL:
 496       return TGSI_OPCODE_KIL;
 497    case OPCODE_KIL_NV:
 498       return TGSI_OPCODE_KILP;
 499    case OPCODE_LG2:
 500       return TGSI_OPCODE_LG2;
 501    case OPCODE_LOG:
 502       return TGSI_OPCODE_LOG;
 503    case OPCODE_LIT:
 504       return TGSI_OPCODE_LIT;
 505    case OPCODE_LRP:
 506       return TGSI_OPCODE_LRP;
 507    case OPCODE_MAD:
 508       return TGSI_OPCODE_MAD;
 509    case OPCODE_MAX:
 510       return TGSI_OPCODE_MAX;
 511    case OPCODE_MIN:
 512       return TGSI_OPCODE_MIN;
 513    case OPCODE_MOV:
 514       return TGSI_OPCODE_MOV;
 515    case OPCODE_MUL:
 516       return TGSI_OPCODE_MUL;
 517    case OPCODE_NOP:
 518       return TGSI_OPCODE_NOP;
 519    case OPCODE_NRM3:
 520       return TGSI_OPCODE_NRM;
 521    case OPCODE_NRM4:
 522       return TGSI_OPCODE_NRM4;
 523    case OPCODE_POW:
 524       return TGSI_OPCODE_POW;
 525    case OPCODE_RCP:
 526       return TGSI_OPCODE_RCP;
 527    case OPCODE_RET:
 528       return TGSI_OPCODE_RET;
 529    case OPCODE_RSQ:
 530       return TGSI_OPCODE_RSQ;
 531    case OPCODE_SCS:
 532       return TGSI_OPCODE_SCS;
 533    case OPCODE_SEQ:
 534       return TGSI_OPCODE_SEQ;
 535    case OPCODE_SGE:
 536       return TGSI_OPCODE_SGE;
 537    case OPCODE_SGT:
 538       return TGSI_OPCODE_SGT;
 539    case OPCODE_SIN:
 540       return TGSI_OPCODE_SIN;
 541    case OPCODE_SLE:
 542       return TGSI_OPCODE_SLE;
 543    case OPCODE_SLT:
 544       return TGSI_OPCODE_SLT;
 545    case OPCODE_SNE:
 546       return TGSI_OPCODE_SNE;
 547    case OPCODE_SSG:
 548       return TGSI_OPCODE_SSG;
 549    case OPCODE_SUB:
 550       return TGSI_OPCODE_SUB;
 551    case OPCODE_TEX:
 552       return TGSI_OPCODE_TEX;
 553    case OPCODE_TXB:
 554       return TGSI_OPCODE_TXB;
 555    case OPCODE_TXD:
 556       return TGSI_OPCODE_TXD;
 557    case OPCODE_TXL:
 558       return TGSI_OPCODE_TXL;
 559    case OPCODE_TXP:
 560       return TGSI_OPCODE_TXP;
 561    case OPCODE_XPD:
 562       return TGSI_OPCODE_XPD;
 563    case OPCODE_END:
 564       return TGSI_OPCODE_END;
 565    default:
 566       debug_assert( 0 );
 567       return TGSI_OPCODE_NOP;
 568    }
 569 }
 570
 571
 572 static void
 573 compile_instruction(
 574    struct st_translate *t,
 575    const struct prog_instruction *inst )
 576 {
 577    struct ureg_program *ureg = t->ureg;
 578    GLuint i;
 579    struct ureg_dst dst[1];
 580    struct ureg_src src[4];
 581    unsigned num_dst;
 582    unsigned num_src;
 583
 584    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 585    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 586
 587    if (num_dst)
 588       dst[0] = translate_dst( t,
 589                               &inst->DstReg,
 590                               inst->SaturateMode );
 591
 592    for (i = 0; i < num_src; i++)
 593       src[i] = translate_src( t, &inst->SrcReg[i] );
 594
 595    switch( inst->Opcode ) {
 596    case OPCODE_SWZ:
 597       emit_swz( t, dst[0], &inst->SrcReg[0] );
 598       return;
 599
 600    case OPCODE_BGNLOOP:
 601    case OPCODE_CAL:
 602    case OPCODE_ELSE:
 603    case OPCODE_ENDLOOP:
 604    case OPCODE_IF:
 605       debug_assert(num_dst == 0);
 606       ureg_label_insn( ureg,
 607                        translate_opcode( inst->Opcode ),
 608                        src, num_src,
 609                        get_label( t, inst->BranchTarget ));
 610       return;
 611
 612    case OPCODE_TEX:
 613    case OPCODE_TXB:
 614    case OPCODE_TXD:
 615    case OPCODE_TXL:
 616    case OPCODE_TXP:
 617       src[num_src++] = t->samplers[inst->TexSrcUnit];
 618       ureg_tex_insn( ureg,
 619                      translate_opcode( inst->Opcode ),
 620                      dst, num_dst,
 621                      translate_texture_target( inst->TexSrcTarget,
 622                                                inst->TexShadow ),
 623                      src, num_src );
 624       return;
 625
 626    case OPCODE_SCS:
 627       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 628       ureg_insn( ureg,
 629                  translate_opcode( inst->Opcode ),
 630                  dst, num_dst,
 631                  src, num_src );
 632       break;
 633
 634    case OPCODE_XPD:
 635       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 636       ureg_insn( ureg,
 637                  translate_opcode( inst->Opcode ),
 638                  dst, num_dst,
 639                  src, num_src );
 640       break;
 641
 642    case OPCODE_NOISE1:
 643    case OPCODE_NOISE2:
 644    case OPCODE_NOISE3:
 645    case OPCODE_NOISE4:
 646       /* At some point, a motivated person could add a better
 647        * implementation of noise.  Currently not even the nvidia
 648        * binary drivers do anything more than this.  In any case, the
 649        * place to do this is in the GL state tracker, not the poor
 650        * driver.
 651        */
 652       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 653       break;
 654
 655    case OPCODE_DDY:
 656       emit_ddy( t, dst[0], &inst->SrcReg[0] );
 657       break;
 658
 659    default:
 660       ureg_insn( ureg,
 661                  translate_opcode( inst->Opcode ),
 662                  dst, num_dst,
 663                  src, num_src );
 664       break;
 665    }
 666 }
 667
 668
 669 /**
 670  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 671  */
 672 static void
 673 emit_inverted_wpos( struct st_translate *t,
 674                     const struct gl_program *program )
 675 {
 676    struct ureg_program *ureg = t->ureg;
 677
 678    /* Fragment program uses fragment position input.
 679     * Need to replace instances of INPUT[WPOS] with temp T
 680     * where T = INPUT[WPOS] by y is inverted.
 681     */
 682    static const gl_state_index winSizeState[STATE_LENGTH]
 683       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 684
 685    /* XXX: note we are modifying the incoming shader here!  Need to
 686     * do this before emitting the constant decls below, or this
 687     * will be missed:
 688     */
 689    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 690                                                        winSizeState);
 691
 692    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 693    struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
 694    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 695
 696    /* MOV wpos_temp, input[wpos]
 697     */
 698    ureg_MOV( ureg, wpos_temp, wpos_input );
 699
 700    /* SUB wpos_temp.y, winsize_const, wpos_input
 701     */
 702    ureg_SUB( ureg,
 703              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 704              winsize,
 705              wpos_input);
 706
 707    /* Use wpos_temp as position input from here on:
 708     */
 709    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 710 }
 711
 712
 713 /**
 714  * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
 715  * TGSI uses +1 for front, -1 for back.
 716  * This function converts the TGSI value to the GL value.  Simply clamping/
 717  * saturating the value to [0,1] does the job.
 718  */
 719 static void
 720 emit_face_var( struct st_translate *t,
 721                const struct gl_program *program )
 722 {
 723    struct ureg_program *ureg = t->ureg;
 724    struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
 725    struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
 726
 727    /* MOV_SAT face_temp, input[face]
 728     */
 729    face_temp = ureg_saturate( face_temp );
 730    ureg_MOV( ureg, face_temp, face_input );
 731
 732    /* Use face_temp as face input from here on:
 733     */
 734    t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
 735 }
 736
 737
 738 static void
 739 emit_edgeflags( struct st_translate *t,
 740                  const struct gl_program *program )
 741 {
 742    struct ureg_program *ureg = t->ureg;
 743    struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
 744    struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
 745
 746    ureg_MOV( ureg, edge_dst, edge_src );
 747 }
 748
 749
 750 /**
 751  * Translate Mesa program to TGSI format.
 752  * \param program  the program to translate
 753  * \param numInputs  number of input registers used
 754  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 755  *                      input indexes
 756  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 757  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 758  *                            each input
 759  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 760  * \param numOutputs  number of output registers used
 761  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 762  *                       generic outputs
 763  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 764  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 765  *                             each output
 766  *
 767  * \return  PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
 768  */
 769 enum pipe_error
 770 st_translate_mesa_program(
 771    GLcontext *ctx,
 772    uint procType,
 773    struct ureg_program *ureg,
 774    const struct gl_program *program,
 775    GLuint numInputs,
 776    const GLuint inputMapping[],
 777    const ubyte inputSemanticName[],
 778    const ubyte inputSemanticIndex[],
 779    const GLuint interpMode[],
 780    GLuint numOutputs,
 781    const GLuint outputMapping[],
 782    const ubyte outputSemanticName[],
 783    const ubyte outputSemanticIndex[],
 784    boolean passthrough_edgeflags )
 785 {
 786    struct st_translate translate, *t;
 787    unsigned i;
 788    enum pipe_error ret = PIPE_OK;
 789
 790    t = &translate;
 791    memset(t, 0, sizeof *t);
 792
 793    t->procType = procType;
 794    t->inputMapping = inputMapping;
 795    t->outputMapping = outputMapping;
 796    t->ureg = ureg;
 797
 798    /*_mesa_print_program(program);*/
 799
 800    /*
 801     * Declare input attributes.
 802     */
 803    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 804       for (i = 0; i < numInputs; i++) {
 805          t->inputs[i] = ureg_DECL_fs_input(ureg,
 806                                            inputSemanticName[i],
 807                                            inputSemanticIndex[i],
 808                                            interpMode[i]);
 809       }
 810
 811       if (program->InputsRead & FRAG_BIT_WPOS) {
 812          /* Must do this after setting up t->inputs, and before
 813           * emitting constant references, below:
 814           */
 815          emit_inverted_wpos( t, program );
 816       }
 817
 818       if (program->InputsRead & FRAG_BIT_FACE) {
 819          emit_face_var( t, program );
 820       }
 821
 822       /*
 823        * Declare output attributes.
 824        */
 825       for (i = 0; i < numOutputs; i++) {
 826          switch (outputSemanticName[i]) {
 827          case TGSI_SEMANTIC_POSITION:
 828             t->outputs[i] = ureg_DECL_output( ureg,
 829                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 830                                               outputSemanticIndex[i] );
 831
 832             t->outputs[i] = ureg_writemask( t->outputs[i],
 833                                             TGSI_WRITEMASK_Z );
 834             break;
 835          case TGSI_SEMANTIC_COLOR:
 836             t->outputs[i] = ureg_DECL_output( ureg,
 837                                               TGSI_SEMANTIC_COLOR,
 838                                               outputSemanticIndex[i] );
 839             break;
 840          default:
 841             debug_assert(0);
 842             return 0;
 843          }
 844       }
 845    }
 846    else {
 847       for (i = 0; i < numInputs; i++) {
 848          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 849       }
 850
 851       for (i = 0; i < numOutputs; i++) {
 852          t->outputs[i] = ureg_DECL_output( ureg,
 853                                            outputSemanticName[i],
 854                                            outputSemanticIndex[i] );
 855       }
 856       if (passthrough_edgeflags)
 857          emit_edgeflags( t, program );
 858    }
 859
 860    /* Declare address register.
 861     */
 862    if (program->NumAddressRegs > 0) {
 863       debug_assert( program->NumAddressRegs == 1 );
 864       t->address[0] = ureg_DECL_address( ureg );
 865    }
 866
 867
 868    /* Emit constants and immediates.  Mesa uses a single index space
 869     * for these, so we put all the translated regs in t->constants.
 870     */
 871    if (program->Parameters) {
 872
 873       t->constants = CALLOC( program->Parameters->NumParameters,
 874                              sizeof t->constants[0] );
 875       if (t->constants == NULL) {
 876          ret = PIPE_ERROR_OUT_OF_MEMORY;
 877          goto out;
 878       }
 879
 880       for (i = 0; i < program->Parameters->NumParameters; i++) {
 881          switch (program->Parameters->Parameters[i].Type) {
 882          case PROGRAM_ENV_PARAM:
 883          case PROGRAM_LOCAL_PARAM:
 884          case PROGRAM_STATE_VAR:
 885          case PROGRAM_NAMED_PARAM:
 886          case PROGRAM_UNIFORM:
 887             t->constants[i] = ureg_DECL_constant( ureg, i );
 888             break;
 889
 890             /* Emit immediates only when there is no address register
 891              * in use.  FIXME: Be smarter and recognize param arrays:
 892              * indirect addressing is only valid within the referenced
 893              * array.
 894              */
 895          case PROGRAM_CONSTANT:
 896             if (program->NumAddressRegs > 0)
 897                t->constants[i] = ureg_DECL_constant( ureg, i );
 898             else
 899                t->constants[i] =
 900                   ureg_DECL_immediate( ureg,
 901                                        program->Parameters->ParameterValues[i],
 902                                        4 );
 903             break;
 904          default:
 905             break;
 906          }
 907       }
 908    }
 909
 910    /* texture samplers */
 911    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
 912       if (program->SamplersUsed & (1 << i)) {
 913          t->samplers[i] = ureg_DECL_sampler( ureg, i );
 914       }
 915    }
 916
 917    /* Emit each instruction in turn:
 918     */
 919    for (i = 0; i < program->NumInstructions; i++) {
 920       set_insn_start( t, ureg_get_instruction_number( ureg ));
 921       compile_instruction( t, &program->Instructions[i] );
 922    }
 923
 924    /* Fix up all emitted labels:
 925     */
 926    for (i = 0; i < t->labels_count; i++) {
 927       ureg_fixup_label( ureg,
 928                         t->labels[i].token,
 929                         t->insn[t->labels[i].branch_target] );
 930    }
 931
 932 out:
 933    FREE(t->insn);
 934    FREE(t->labels);
 935    FREE(t->constants);
 936
 937    if (t->error) {
 938       debug_printf("%s: translate error flag set\n", __FUNCTION__);
 939    }
 940
 941    return ret;
 942 }
 943
 944
 945 /**
 946  * Tokens cannot be free with _mesa_free otherwise the builtin gallium
 947  * malloc debugging will get confused.
 948  */
 949 void
 950 st_free_tokens(const struct tgsi_token *tokens)
 951 {
 952    FREE((void *)tokens);
 953 }