src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "tgsi/tgsi_ureg.h"
  38 #include "st_mesa_to_tgsi.h"
  39 #include "shader/prog_instruction.h"
  40 #include "shader/prog_parameter.h"
  41 #include "shader/prog_print.h"
  42 #include "util/u_debug.h"
  43 #include "util/u_math.h"
  44 #include "util/u_memory.h"
  45
  46 struct label {
  47    unsigned branch_target;
  48    unsigned token;
  49 };
  50
  51 struct st_translate {
  52    struct ureg_program *ureg;
  53
  54    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  55    struct ureg_src *constants;
  56    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  57    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  58    struct ureg_dst address[1];
  59    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  60
  61    const GLuint *inputMapping;
  62    const GLuint *outputMapping;
  63
  64    /* For every instruction that contains a label (eg CALL), keep
  65     * details so that we can go back afterwards and emit the correct
  66     * tgsi instruction number for each label.
  67     */
  68    struct label *labels;
  69    unsigned labels_size;
  70    unsigned labels_count;
  71
  72    /* Keep a record of the tgsi instruction number that each mesa
  73     * instruction starts at, will be used to fix up labels after
  74     * translation.
  75     */
  76    unsigned *insn;
  77    unsigned insn_size;
  78    unsigned insn_count;
  79
  80    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  81
  82    boolean error;
  83 };
  84
  85
  86 static unsigned *get_label( struct st_translate *t,
  87                             unsigned branch_target )
  88 {
  89    unsigned i;
  90
  91    if (t->labels_count + 1 >= t->labels_size) {
  92       unsigned old_size = t->labels_size;
  93       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
  94       t->labels = REALLOC( t->labels,
  95                            old_size * sizeof t->labels[0],
  96                            t->labels_size * sizeof t->labels[0] );
  97       if (t->labels == NULL) {
  98          static unsigned dummy;
  99          t->error = TRUE;
 100          return &dummy;
 101       }
 102    }
 103
 104    i = t->labels_count++;
 105    t->labels[i].branch_target = branch_target;
 106    return &t->labels[i].token;
 107 }
 108
 109
 110 static void set_insn_start( struct st_translate *t,
 111                             unsigned start )
 112 {
 113    if (t->insn_count + 1 >= t->insn_size) {
 114       unsigned old_size = t->insn_size;
 115       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 116       t->insn = REALLOC( t->insn,
 117                          old_size * sizeof t->insn[0],
 118                          t->insn_size * sizeof t->insn[0] );
 119       if (t->insn == NULL) {
 120          t->error = TRUE;
 121          return;
 122       }
 123    }
 124
 125    t->insn[t->insn_count++] = start;
 126 }
 127
 128
 129 /*
 130  * Map mesa register file to TGSI register file.
 131  */
 132 static struct ureg_dst
 133 dst_register( struct st_translate *t,
 134               gl_register_file file,
 135               GLuint index )
 136 {
 137    switch( file ) {
 138    case PROGRAM_UNDEFINED:
 139       return ureg_dst_undef();
 140
 141    case PROGRAM_TEMPORARY:
 142       if (ureg_dst_is_undef(t->temps[index]))
 143          t->temps[index] = ureg_DECL_temporary( t->ureg );
 144
 145       return t->temps[index];
 146
 147    case PROGRAM_OUTPUT:
 148       return t->outputs[t->outputMapping[index]];
 149
 150    case PROGRAM_ADDRESS:
 151       return t->address[index];
 152
 153    default:
 154       debug_assert( 0 );
 155       return ureg_dst_undef();
 156    }
 157 }
 158
 159
 160 static struct ureg_src
 161 src_register( struct st_translate *t,
 162               gl_register_file file,
 163               GLuint index )
 164 {
 165    switch( file ) {
 166    case PROGRAM_UNDEFINED:
 167       return ureg_src_undef();
 168
 169    case PROGRAM_TEMPORARY:
 170       if (ureg_dst_is_undef(t->temps[index]))
 171          t->temps[index] = ureg_DECL_temporary( t->ureg );
 172       return ureg_src(t->temps[index]);
 173
 174    case PROGRAM_STATE_VAR:
 175    case PROGRAM_NAMED_PARAM:
 176    case PROGRAM_ENV_PARAM:
 177    case PROGRAM_UNIFORM:
 178    case PROGRAM_CONSTANT:       /* ie, immediate */
 179       return t->constants[index];
 180
 181    case PROGRAM_INPUT:
 182       return t->inputs[t->inputMapping[index]];
 183
 184    case PROGRAM_OUTPUT:
 185       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 186
 187    case PROGRAM_ADDRESS:
 188       return ureg_src(t->address[index]);
 189
 190    default:
 191       debug_assert( 0 );
 192       return ureg_src_undef();
 193    }
 194 }
 195
 196
 197 /**
 198  * Map mesa texture target to TGSI texture target.
 199  */
 200 static unsigned
 201 translate_texture_target( GLuint textarget,
 202                           GLboolean shadow )
 203 {
 204    if (shadow) {
 205       switch( textarget ) {
 206       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 207       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 208       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 209       default: break;
 210       }
 211    }
 212
 213    switch( textarget ) {
 214    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 215    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 216    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 217    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 218    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 219    default:
 220       debug_assert( 0 );
 221       return TGSI_TEXTURE_1D;
 222    }
 223 }
 224
 225
 226 static struct ureg_dst
 227 translate_dst( struct st_translate *t,
 228                const struct prog_dst_register *DstReg,
 229                boolean saturate )
 230 {
 231    struct ureg_dst dst = dst_register( t,
 232                                        DstReg->File,
 233                                        DstReg->Index );
 234
 235    dst = ureg_writemask( dst,
 236                          DstReg->WriteMask );
 237
 238    if (saturate)
 239       dst = ureg_saturate( dst );
 240
 241    if (DstReg->RelAddr)
 242       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 243
 244    return dst;
 245 }
 246
 247
 248 static struct ureg_src
 249 translate_src( struct st_translate *t,
 250                const struct prog_src_register *SrcReg )
 251 {
 252    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 253
 254    src = ureg_swizzle( src,
 255                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 256                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 257                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 258                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 259
 260    if (SrcReg->Negate == NEGATE_XYZW)
 261       src = ureg_negate(src);
 262
 263    if (SrcReg->Abs)
 264       src = ureg_abs(src);
 265
 266    if (SrcReg->RelAddr)
 267       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 268
 269    return src;
 270 }
 271
 272
 273 static struct ureg_src swizzle_4v( struct ureg_src src,
 274                                    const unsigned *swz )
 275 {
 276    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 277 }
 278
 279
 280 /**
 281  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 282  *
 283  *   SWZ dst, src.x-y10
 284  *
 285  * becomes:
 286  *
 287  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 288  */
 289 static void emit_swz( struct st_translate *t,
 290                       struct ureg_dst dst,
 291                       const struct prog_src_register *SrcReg )
 292 {
 293    struct ureg_program *ureg = t->ureg;
 294    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 295
 296    unsigned negate_mask =  SrcReg->Negate;
 297
 298    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 299                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 300                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 301                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 302
 303    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 304                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 305                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 306                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 307
 308    unsigned negative_one_mask = one_mask & negate_mask;
 309    unsigned positive_one_mask = one_mask & ~negate_mask;
 310
 311    struct ureg_src imm;
 312    unsigned i;
 313    unsigned mul_swizzle[4] = {0,0,0,0};
 314    unsigned add_swizzle[4] = {0,0,0,0};
 315    unsigned src_swizzle[4] = {0,0,0,0};
 316    boolean need_add = FALSE;
 317    boolean need_mul = FALSE;
 318
 319    if (dst.WriteMask == 0)
 320       return;
 321
 322    /* Is this just a MOV?
 323     */
 324    if (zero_mask == 0 &&
 325        one_mask == 0 &&
 326        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 327    {
 328       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 329       return;
 330    }
 331
 332 #define IMM_ZERO    0
 333 #define IMM_ONE     1
 334 #define IMM_NEG_ONE 2
 335
 336    imm = ureg_imm3f( ureg, 0, 1, -1 );
 337
 338    for (i = 0; i < 4; i++) {
 339       unsigned bit = 1 << i;
 340
 341       if (dst.WriteMask & bit) {
 342          if (positive_one_mask & bit) {
 343             mul_swizzle[i] = IMM_ZERO;
 344             add_swizzle[i] = IMM_ONE;
 345             need_add = TRUE;
 346          }
 347          else if (negative_one_mask & bit) {
 348             mul_swizzle[i] = IMM_ZERO;
 349             add_swizzle[i] = IMM_NEG_ONE;
 350             need_add = TRUE;
 351          }
 352          else if (zero_mask & bit) {
 353             mul_swizzle[i] = IMM_ZERO;
 354             add_swizzle[i] = IMM_ZERO;
 355             need_add = TRUE;
 356          }
 357          else {
 358             add_swizzle[i] = IMM_ZERO;
 359             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 360             need_mul = TRUE;
 361             if (negate_mask & bit) {
 362                mul_swizzle[i] = IMM_NEG_ONE;
 363             }
 364             else {
 365                mul_swizzle[i] = IMM_ONE;
 366             }
 367          }
 368       }
 369    }
 370
 371    if (need_mul && need_add) {
 372       ureg_MAD( ureg,
 373                 dst,
 374                 swizzle_4v( src, src_swizzle ),
 375                 swizzle_4v( imm, mul_swizzle ),
 376                 swizzle_4v( imm, add_swizzle ) );
 377    }
 378    else if (need_mul) {
 379       ureg_MUL( ureg,
 380                 dst,
 381                 swizzle_4v( src, src_swizzle ),
 382                 swizzle_4v( imm, mul_swizzle ) );
 383    }
 384    else if (need_add) {
 385       ureg_MOV( ureg,
 386                 dst,
 387                 swizzle_4v( imm, add_swizzle ) );
 388    }
 389    else {
 390       debug_assert(0);
 391    }
 392
 393 #undef IMM_ZERO
 394 #undef IMM_ONE
 395 #undef IMM_NEG_ONE
 396 }
 397
 398
 399 /**
 400  * Negate the value of DDY to match GL semantics where (0,0) is the
 401  * lower-left corner of the window.
 402  * Note that the GL_ARB_fragment_coord_conventions extension will
 403  * effect this someday.
 404  */
 405 static void emit_ddy( struct st_translate *t,
 406                       struct ureg_dst dst,
 407                       const struct prog_src_register *SrcReg )
 408 {
 409    struct ureg_program *ureg = t->ureg;
 410    struct ureg_src src = translate_src( t, SrcReg );
 411    src = ureg_negate( src );
 412    ureg_DDY( ureg, dst, src );
 413 }
 414
 415
 416
 417 static unsigned
 418 translate_opcode( unsigned op )
 419 {
 420    switch( op ) {
 421    case OPCODE_ARL:
 422       return TGSI_OPCODE_ARL;
 423    case OPCODE_ABS:
 424       return TGSI_OPCODE_ABS;
 425    case OPCODE_ADD:
 426       return TGSI_OPCODE_ADD;
 427    case OPCODE_BGNLOOP:
 428       return TGSI_OPCODE_BGNLOOP;
 429    case OPCODE_BGNSUB:
 430       return TGSI_OPCODE_BGNSUB;
 431    case OPCODE_BRA:
 432       return TGSI_OPCODE_BRA;
 433    case OPCODE_BRK:
 434       return TGSI_OPCODE_BRK;
 435    case OPCODE_CAL:
 436       return TGSI_OPCODE_CAL;
 437    case OPCODE_CMP:
 438       return TGSI_OPCODE_CMP;
 439    case OPCODE_CONT:
 440       return TGSI_OPCODE_CONT;
 441    case OPCODE_COS:
 442       return TGSI_OPCODE_COS;
 443    case OPCODE_DDX:
 444       return TGSI_OPCODE_DDX;
 445    case OPCODE_DDY:
 446       return TGSI_OPCODE_DDY;
 447    case OPCODE_DP2:
 448       return TGSI_OPCODE_DP2;
 449    case OPCODE_DP2A:
 450       return TGSI_OPCODE_DP2A;
 451    case OPCODE_DP3:
 452       return TGSI_OPCODE_DP3;
 453    case OPCODE_DP4:
 454       return TGSI_OPCODE_DP4;
 455    case OPCODE_DPH:
 456       return TGSI_OPCODE_DPH;
 457    case OPCODE_DST:
 458       return TGSI_OPCODE_DST;
 459    case OPCODE_ELSE:
 460       return TGSI_OPCODE_ELSE;
 461    case OPCODE_ENDIF:
 462       return TGSI_OPCODE_ENDIF;
 463    case OPCODE_ENDLOOP:
 464       return TGSI_OPCODE_ENDLOOP;
 465    case OPCODE_ENDSUB:
 466       return TGSI_OPCODE_ENDSUB;
 467    case OPCODE_EX2:
 468       return TGSI_OPCODE_EX2;
 469    case OPCODE_EXP:
 470       return TGSI_OPCODE_EXP;
 471    case OPCODE_FLR:
 472       return TGSI_OPCODE_FLR;
 473    case OPCODE_FRC:
 474       return TGSI_OPCODE_FRC;
 475    case OPCODE_IF:
 476       return TGSI_OPCODE_IF;
 477    case OPCODE_TRUNC:
 478       return TGSI_OPCODE_TRUNC;
 479    case OPCODE_KIL:
 480       return TGSI_OPCODE_KIL;
 481    case OPCODE_KIL_NV:
 482       return TGSI_OPCODE_KILP;
 483    case OPCODE_LG2:
 484       return TGSI_OPCODE_LG2;
 485    case OPCODE_LOG:
 486       return TGSI_OPCODE_LOG;
 487    case OPCODE_LIT:
 488       return TGSI_OPCODE_LIT;
 489    case OPCODE_LRP:
 490       return TGSI_OPCODE_LRP;
 491    case OPCODE_MAD:
 492       return TGSI_OPCODE_MAD;
 493    case OPCODE_MAX:
 494       return TGSI_OPCODE_MAX;
 495    case OPCODE_MIN:
 496       return TGSI_OPCODE_MIN;
 497    case OPCODE_MOV:
 498       return TGSI_OPCODE_MOV;
 499    case OPCODE_MUL:
 500       return TGSI_OPCODE_MUL;
 501    case OPCODE_NOP:
 502       return TGSI_OPCODE_NOP;
 503    case OPCODE_NRM3:
 504       return TGSI_OPCODE_NRM;
 505    case OPCODE_NRM4:
 506       return TGSI_OPCODE_NRM4;
 507    case OPCODE_POW:
 508       return TGSI_OPCODE_POW;
 509    case OPCODE_RCP:
 510       return TGSI_OPCODE_RCP;
 511    case OPCODE_RET:
 512       return TGSI_OPCODE_RET;
 513    case OPCODE_RSQ:
 514       return TGSI_OPCODE_RSQ;
 515    case OPCODE_SCS:
 516       return TGSI_OPCODE_SCS;
 517    case OPCODE_SEQ:
 518       return TGSI_OPCODE_SEQ;
 519    case OPCODE_SGE:
 520       return TGSI_OPCODE_SGE;
 521    case OPCODE_SGT:
 522       return TGSI_OPCODE_SGT;
 523    case OPCODE_SIN:
 524       return TGSI_OPCODE_SIN;
 525    case OPCODE_SLE:
 526       return TGSI_OPCODE_SLE;
 527    case OPCODE_SLT:
 528       return TGSI_OPCODE_SLT;
 529    case OPCODE_SNE:
 530       return TGSI_OPCODE_SNE;
 531    case OPCODE_SSG:
 532       return TGSI_OPCODE_SSG;
 533    case OPCODE_SUB:
 534       return TGSI_OPCODE_SUB;
 535    case OPCODE_TEX:
 536       return TGSI_OPCODE_TEX;
 537    case OPCODE_TXB:
 538       return TGSI_OPCODE_TXB;
 539    case OPCODE_TXD:
 540       return TGSI_OPCODE_TXD;
 541    case OPCODE_TXL:
 542       return TGSI_OPCODE_TXL;
 543    case OPCODE_TXP:
 544       return TGSI_OPCODE_TXP;
 545    case OPCODE_XPD:
 546       return TGSI_OPCODE_XPD;
 547    case OPCODE_END:
 548       return TGSI_OPCODE_END;
 549    default:
 550       debug_assert( 0 );
 551       return TGSI_OPCODE_NOP;
 552    }
 553 }
 554
 555
 556 static void
 557 compile_instruction(
 558    struct st_translate *t,
 559    const struct prog_instruction *inst )
 560 {
 561    struct ureg_program *ureg = t->ureg;
 562    GLuint i;
 563    struct ureg_dst dst[1];
 564    struct ureg_src src[4];
 565    unsigned num_dst;
 566    unsigned num_src;
 567
 568    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 569    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 570
 571    if (num_dst)
 572       dst[0] = translate_dst( t,
 573                               &inst->DstReg,
 574                               inst->SaturateMode );
 575
 576    for (i = 0; i < num_src; i++)
 577       src[i] = translate_src( t, &inst->SrcReg[i] );
 578
 579    switch( inst->Opcode ) {
 580    case OPCODE_SWZ:
 581       emit_swz( t, dst[0], &inst->SrcReg[0] );
 582       return;
 583
 584    case OPCODE_BGNLOOP:
 585    case OPCODE_CAL:
 586    case OPCODE_ELSE:
 587    case OPCODE_ENDLOOP:
 588    case OPCODE_IF:
 589       debug_assert(num_dst == 0);
 590       ureg_label_insn( ureg,
 591                        translate_opcode( inst->Opcode ),
 592                        src, num_src,
 593                        get_label( t, inst->BranchTarget ));
 594       return;
 595
 596    case OPCODE_TEX:
 597    case OPCODE_TXB:
 598    case OPCODE_TXD:
 599    case OPCODE_TXL:
 600    case OPCODE_TXP:
 601       src[num_src++] = t->samplers[inst->TexSrcUnit];
 602       ureg_tex_insn( ureg,
 603                      translate_opcode( inst->Opcode ),
 604                      dst, num_dst,
 605                      translate_texture_target( inst->TexSrcTarget,
 606                                                inst->TexShadow ),
 607                      src, num_src );
 608       return;
 609
 610    case OPCODE_SCS:
 611       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 612       ureg_insn( ureg,
 613                  translate_opcode( inst->Opcode ),
 614                  dst, num_dst,
 615                  src, num_src );
 616       break;
 617
 618    case OPCODE_XPD:
 619       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 620       ureg_insn( ureg,
 621                  translate_opcode( inst->Opcode ),
 622                  dst, num_dst,
 623                  src, num_src );
 624       break;
 625
 626    case OPCODE_NOISE1:
 627    case OPCODE_NOISE2:
 628    case OPCODE_NOISE3:
 629    case OPCODE_NOISE4:
 630       /* At some point, a motivated person could add a better
 631        * implementation of noise.  Currently not even the nvidia
 632        * binary drivers do anything more than this.  In any case, the
 633        * place to do this is in the GL state tracker, not the poor
 634        * driver.
 635        */
 636       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 637       break;
 638
 639    case OPCODE_DDY:
 640       emit_ddy( t, dst[0], &inst->SrcReg[0] );
 641       break;
 642
 643    default:
 644       ureg_insn( ureg,
 645                  translate_opcode( inst->Opcode ),
 646                  dst, num_dst,
 647                  src, num_src );
 648       break;
 649    }
 650 }
 651
 652
 653 /**
 654  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 655  */
 656 static void
 657 emit_inverted_wpos( struct st_translate *t,
 658                     const struct gl_program *program )
 659 {
 660    struct ureg_program *ureg = t->ureg;
 661
 662    /* Fragment program uses fragment position input.
 663     * Need to replace instances of INPUT[WPOS] with temp T
 664     * where T = INPUT[WPOS] by y is inverted.
 665     */
 666    static const gl_state_index winSizeState[STATE_LENGTH]
 667       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 668
 669    /* XXX: note we are modifying the incoming shader here!  Need to
 670     * do this before emitting the constant decls below, or this
 671     * will be missed:
 672     */
 673    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 674                                                        winSizeState);
 675
 676    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 677    struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
 678    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 679
 680    /* MOV wpos_temp, input[wpos]
 681     */
 682    ureg_MOV( ureg, wpos_temp, wpos_input );
 683
 684    /* SUB wpos_temp.y, winsize_const, wpos_input
 685     */
 686    ureg_SUB( ureg,
 687              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 688              winsize,
 689              wpos_input);
 690
 691    /* Use wpos_temp as position input from here on:
 692     */
 693    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 694 }
 695
 696
 697 /**
 698  * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
 699  * TGSI uses +1 for front, -1 for back.
 700  * This function converts the TGSI value to the GL value.  Simply clamping/
 701  * saturating the value to [0,1] does the job.
 702  */
 703 static void
 704 emit_face_var( struct st_translate *t,
 705                const struct gl_program *program )
 706 {
 707    struct ureg_program *ureg = t->ureg;
 708    struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
 709    struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
 710
 711    /* MOV_SAT face_temp, input[face]
 712     */
 713    face_temp = ureg_saturate( face_temp );
 714    ureg_MOV( ureg, face_temp, face_input );
 715
 716    /* Use face_temp as face input from here on:
 717     */
 718    t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
 719 }
 720
 721
 722 /**
 723  * Translate Mesa program to TGSI format.
 724  * \param program  the program to translate
 725  * \param numInputs  number of input registers used
 726  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 727  *                      input indexes
 728  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 729  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 730  *                            each input
 731  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 732  * \param numOutputs  number of output registers used
 733  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 734  *                       generic outputs
 735  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 736  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 737  *                             each output
 738  *
 739  * \return  array of translated tokens, caller's responsibility to free
 740  */
 741 const struct tgsi_token *
 742 st_translate_mesa_program(
 743    GLcontext *ctx,
 744    uint procType,
 745    const struct gl_program *program,
 746    GLuint numInputs,
 747    const GLuint inputMapping[],
 748    const ubyte inputSemanticName[],
 749    const ubyte inputSemanticIndex[],
 750    const GLuint interpMode[],
 751    GLuint numOutputs,
 752    const GLuint outputMapping[],
 753    const ubyte outputSemanticName[],
 754    const ubyte outputSemanticIndex[] )
 755 {
 756    struct st_translate translate, *t;
 757    struct ureg_program *ureg;
 758    const struct tgsi_token *tokens = NULL;
 759    unsigned i;
 760
 761    t = &translate;
 762    memset(t, 0, sizeof *t);
 763
 764    t->procType = procType;
 765    t->inputMapping = inputMapping;
 766    t->outputMapping = outputMapping;
 767    t->ureg = ureg_create( procType );
 768    if (t->ureg == NULL)
 769       return NULL;
 770
 771    ureg = t->ureg;
 772
 773    /*_mesa_print_program(program);*/
 774
 775    /*
 776     * Declare input attributes.
 777     */
 778    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 779       for (i = 0; i < numInputs; i++) {
 780          t->inputs[i] = ureg_DECL_fs_input(ureg,
 781                                            inputSemanticName[i],
 782                                            inputSemanticIndex[i],
 783                                            interpMode[i]);
 784       }
 785
 786       if (program->InputsRead & FRAG_BIT_WPOS) {
 787          /* Must do this after setting up t->inputs, and before
 788           * emitting constant references, below:
 789           */
 790          emit_inverted_wpos( t, program );
 791       }
 792
 793       if (program->InputsRead & FRAG_BIT_FACE) {
 794          emit_face_var( t, program );
 795       }
 796
 797       /*
 798        * Declare output attributes.
 799        */
 800       for (i = 0; i < numOutputs; i++) {
 801          switch (outputSemanticName[i]) {
 802          case TGSI_SEMANTIC_POSITION:
 803             t->outputs[i] = ureg_DECL_output( ureg,
 804                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 805                                               outputSemanticIndex[i] );
 806
 807             t->outputs[i] = ureg_writemask( t->outputs[i],
 808                                             TGSI_WRITEMASK_Z );
 809             break;
 810          case TGSI_SEMANTIC_COLOR:
 811             t->outputs[i] = ureg_DECL_output( ureg,
 812                                               TGSI_SEMANTIC_COLOR,
 813                                               outputSemanticIndex[i] );
 814             break;
 815          default:
 816             debug_assert(0);
 817             return 0;
 818          }
 819       }
 820    }
 821    else {
 822       for (i = 0; i < numInputs; i++) {
 823          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 824       }
 825
 826       for (i = 0; i < numOutputs; i++) {
 827          t->outputs[i] = ureg_DECL_output( ureg,
 828                                            outputSemanticName[i],
 829                                            outputSemanticIndex[i] );
 830       }
 831    }
 832
 833    /* Declare address register.
 834     */
 835    if (program->NumAddressRegs > 0) {
 836       debug_assert( program->NumAddressRegs == 1 );
 837       t->address[0] = ureg_DECL_address( ureg );
 838    }
 839
 840
 841    /* Emit constants and immediates.  Mesa uses a single index space
 842     * for these, so we put all the translated regs in t->constants.
 843     */
 844    if (program->Parameters) {
 845
 846       t->constants = CALLOC( program->Parameters->NumParameters,
 847                              sizeof t->constants[0] );
 848       if (t->constants == NULL)
 849          goto out;
 850
 851       for (i = 0; i < program->Parameters->NumParameters; i++) {
 852          switch (program->Parameters->Parameters[i].Type) {
 853          case PROGRAM_ENV_PARAM:
 854          case PROGRAM_STATE_VAR:
 855          case PROGRAM_NAMED_PARAM:
 856          case PROGRAM_UNIFORM:
 857             t->constants[i] = ureg_DECL_constant( ureg, i );
 858             break;
 859
 860             /* Emit immediates only when there is no address register
 861              * in use.  FIXME: Be smarter and recognize param arrays:
 862              * indirect addressing is only valid within the referenced
 863              * array.
 864              */
 865          case PROGRAM_CONSTANT:
 866             if (program->NumAddressRegs > 0)
 867                t->constants[i] = ureg_DECL_constant( ureg, i );
 868             else
 869                t->constants[i] =
 870                   ureg_DECL_immediate( ureg,
 871                                        program->Parameters->ParameterValues[i],
 872                                        4 );
 873             break;
 874          default:
 875             break;
 876          }
 877       }
 878    }
 879
 880    /* texture samplers */
 881    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
 882       if (program->SamplersUsed & (1 << i)) {
 883          t->samplers[i] = ureg_DECL_sampler( ureg, i );
 884       }
 885    }
 886
 887    /* Emit each instruction in turn:
 888     */
 889    for (i = 0; i < program->NumInstructions; i++) {
 890       set_insn_start( t, ureg_get_instruction_number( ureg ));
 891       compile_instruction( t, &program->Instructions[i] );
 892    }
 893
 894    /* Fix up all emitted labels:
 895     */
 896    for (i = 0; i < t->labels_count; i++) {
 897       ureg_fixup_label( ureg,
 898                         t->labels[i].token,
 899                         t->insn[t->labels[i].branch_target] );
 900    }
 901
 902    tokens = ureg_get_tokens( ureg, NULL );
 903    ureg_destroy( ureg );
 904
 905 out:
 906    FREE(t->insn);
 907    FREE(t->labels);
 908    FREE(t->constants);
 909
 910    if (t->error) {
 911       debug_printf("%s: translate error flag set\n", __FUNCTION__);
 912       FREE((void *)tokens);
 913       tokens = NULL;
 914    }
 915
 916    if (!tokens) {
 917       debug_printf("%s: failed to translate Mesa program:\n", __FUNCTION__);
 918       _mesa_print_program(program);
 919       debug_assert(0);
 920    }
 921
 922    return tokens;
 923 }
 924
 925
 926 /**
 927  * Tokens cannot be free with _mesa_free otherwise the builtin gallium
 928  * malloc debugging will get confused.
 929  */
 930 void
 931 st_free_tokens(const struct tgsi_token *tokens)
 932 {
 933    FREE((void *)tokens);
 934 }