src/mesa/state_tracker/st_mesa_to_tgsi.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * \author
  30  * Michal Krol,
  31  * Keith Whitwell
  32  */
  33
  34 #include "pipe/p_compiler.h"
  35 #include "pipe/p_shader_tokens.h"
  36 #include "pipe/p_state.h"
  37 #include "pipe/p_context.h"
  38 #include "tgsi/tgsi_ureg.h"
  39 #include "st_mesa_to_tgsi.h"
  40 #include "st_context.h"
  41 #include "program/prog_instruction.h"
  42 #include "program/prog_parameter.h"
  43 #include "util/u_debug.h"
  44 #include "util/u_math.h"
  45 #include "util/u_memory.h"
  46
  47 struct label {
  48    unsigned branch_target;
  49    unsigned token;
  50 };
  51
  52
  53 /**
  54  * Intermediate state used during shader translation.
  55  */
  56 struct st_translate {
  57    struct ureg_program *ureg;
  58
  59    struct ureg_dst temps[MAX_PROGRAM_TEMPS];
  60    struct ureg_src *constants;
  61    struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
  62    struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
  63    struct ureg_dst address[1];
  64    struct ureg_src samplers[PIPE_MAX_SAMPLERS];
  65
  66    /* Extra info for handling point size clamping in vertex shader */
  67    struct ureg_dst pointSizeResult; /**< Actual point size output register */
  68    struct ureg_src pointSizeConst;  /**< Point size range constant register */
  69    GLint pointSizeOutIndex;         /**< Temp point size output register */
  70    GLboolean prevInstWrotePointSize;
  71
  72    const GLuint *inputMapping;
  73    const GLuint *outputMapping;
  74
  75    /* For every instruction that contains a label (eg CALL), keep
  76     * details so that we can go back afterwards and emit the correct
  77     * tgsi instruction number for each label.
  78     */
  79    struct label *labels;
  80    unsigned labels_size;
  81    unsigned labels_count;
  82
  83    /* Keep a record of the tgsi instruction number that each mesa
  84     * instruction starts at, will be used to fix up labels after
  85     * translation.
  86     */
  87    unsigned *insn;
  88    unsigned insn_size;
  89    unsigned insn_count;
  90
  91    unsigned procType;  /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
  92
  93    boolean error;
  94 };
  95
  96
  97 /**
  98  * Make note of a branch to a label in the TGSI code.
  99  * After we've emitted all instructions, we'll go over the list
 100  * of labels built here and patch the TGSI code with the actual
 101  * location of each label.
 102  */
 103 static unsigned *get_label( struct st_translate *t,
 104                             unsigned branch_target )
 105 {
 106    unsigned i;
 107
 108    if (t->labels_count + 1 >= t->labels_size) {
 109       unsigned old_size = t->labels_size;
 110       t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
 111       t->labels = REALLOC( t->labels,
 112                            old_size * sizeof t->labels[0],
 113                            t->labels_size * sizeof t->labels[0] );
 114       if (t->labels == NULL) {
 115          static unsigned dummy;
 116          t->error = TRUE;
 117          return &dummy;
 118       }
 119    }
 120
 121    i = t->labels_count++;
 122    t->labels[i].branch_target = branch_target;
 123    return &t->labels[i].token;
 124 }
 125
 126
 127 /**
 128  * Called prior to emitting the TGSI code for each Mesa instruction.
 129  * Allocate additional space for instructions if needed.
 130  * Update the insn[] array so the next Mesa instruction points to
 131  * the next TGSI instruction.
 132  */
 133 static void set_insn_start( struct st_translate *t,
 134                             unsigned start )
 135 {
 136    if (t->insn_count + 1 >= t->insn_size) {
 137       unsigned old_size = t->insn_size;
 138       t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
 139       t->insn = REALLOC( t->insn,
 140                          old_size * sizeof t->insn[0],
 141                          t->insn_size * sizeof t->insn[0] );
 142       if (t->insn == NULL) {
 143          t->error = TRUE;
 144          return;
 145       }
 146    }
 147
 148    t->insn[t->insn_count++] = start;
 149 }
 150
 151
 152 /**
 153  * Map a Mesa dst register to a TGSI ureg_dst register.
 154  */
 155 static struct ureg_dst
 156 dst_register( struct st_translate *t,
 157               gl_register_file file,
 158               GLuint index )
 159 {
 160    switch( file ) {
 161    case PROGRAM_UNDEFINED:
 162       return ureg_dst_undef();
 163
 164    case PROGRAM_TEMPORARY:
 165       if (ureg_dst_is_undef(t->temps[index]))
 166          t->temps[index] = ureg_DECL_temporary( t->ureg );
 167
 168       return t->temps[index];
 169
 170    case PROGRAM_OUTPUT:
 171       if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
 172          t->prevInstWrotePointSize = GL_TRUE;
 173
 174       if (t->procType == TGSI_PROCESSOR_VERTEX)
 175          assert(index < VERT_RESULT_MAX);
 176       else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
 177          assert(index < FRAG_RESULT_MAX);
 178       else
 179          assert(0 && "geom shaders not handled in dst_register() yet");
 180
 181       assert(t->outputMapping[index] < Elements(t->outputs));
 182
 183       return t->outputs[t->outputMapping[index]];
 184
 185    case PROGRAM_ADDRESS:
 186       return t->address[index];
 187
 188    default:
 189       debug_assert( 0 );
 190       return ureg_dst_undef();
 191    }
 192 }
 193
 194
 195 /**
 196  * Map a Mesa src register to a TGSI ureg_src register.
 197  */
 198 static struct ureg_src
 199 src_register( struct st_translate *t,
 200               gl_register_file file,
 201               GLint index )
 202 {
 203    switch( file ) {
 204    case PROGRAM_UNDEFINED:
 205       return ureg_src_undef();
 206
 207    case PROGRAM_TEMPORARY:
 208       ASSERT(index >= 0);
 209       if (ureg_dst_is_undef(t->temps[index]))
 210          t->temps[index] = ureg_DECL_temporary( t->ureg );
 211       assert(index < Elements(t->temps));
 212       return ureg_src(t->temps[index]);
 213
 214    case PROGRAM_NAMED_PARAM:
 215    case PROGRAM_ENV_PARAM:
 216    case PROGRAM_LOCAL_PARAM:
 217    case PROGRAM_UNIFORM:
 218       ASSERT(index >= 0);
 219       return t->constants[index];
 220    case PROGRAM_STATE_VAR:
 221    case PROGRAM_CONSTANT:       /* ie, immediate */
 222       if (index < 0)
 223          return ureg_DECL_constant( t->ureg, 0 );
 224       else
 225          return t->constants[index];
 226
 227    case PROGRAM_INPUT:
 228       assert(t->inputMapping[index] < Elements(t->inputs));
 229       return t->inputs[t->inputMapping[index]];
 230
 231    case PROGRAM_OUTPUT:
 232       assert(t->outputMapping[index] < Elements(t->outputs));
 233       return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
 234
 235    case PROGRAM_ADDRESS:
 236       return ureg_src(t->address[index]);
 237
 238    default:
 239       debug_assert( 0 );
 240       return ureg_src_undef();
 241    }
 242 }
 243
 244
 245 /**
 246  * Map mesa texture target to TGSI texture target.
 247  */
 248 static unsigned
 249 translate_texture_target( GLuint textarget,
 250                           GLboolean shadow )
 251 {
 252    if (shadow) {
 253       switch( textarget ) {
 254       case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_SHADOW1D;
 255       case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_SHADOW2D;
 256       case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
 257       default: break;
 258       }
 259    }
 260
 261    switch( textarget ) {
 262    case TEXTURE_1D_INDEX:   return TGSI_TEXTURE_1D;
 263    case TEXTURE_2D_INDEX:   return TGSI_TEXTURE_2D;
 264    case TEXTURE_3D_INDEX:   return TGSI_TEXTURE_3D;
 265    case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
 266    case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
 267    default:
 268       debug_assert( 0 );
 269       return TGSI_TEXTURE_1D;
 270    }
 271 }
 272
 273
 274 /**
 275  * Create a TGSI ureg_dst register from a Mesa dest register.
 276  */
 277 static struct ureg_dst
 278 translate_dst( struct st_translate *t,
 279                const struct prog_dst_register *DstReg,
 280                boolean saturate )
 281 {
 282    struct ureg_dst dst = dst_register( t,
 283                                        DstReg->File,
 284                                        DstReg->Index );
 285
 286    dst = ureg_writemask( dst,
 287                          DstReg->WriteMask );
 288
 289    if (saturate)
 290       dst = ureg_saturate( dst );
 291
 292    if (DstReg->RelAddr)
 293       dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
 294
 295    return dst;
 296 }
 297
 298
 299 /**
 300  * Create a TGSI ureg_src register from a Mesa src register.
 301  */
 302 static struct ureg_src
 303 translate_src( struct st_translate *t,
 304                const struct prog_src_register *SrcReg )
 305 {
 306    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 307
 308    src = ureg_swizzle( src,
 309                        GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
 310                        GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
 311                        GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
 312                        GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
 313
 314    if (SrcReg->Negate == NEGATE_XYZW)
 315       src = ureg_negate(src);
 316
 317    if (SrcReg->Abs)
 318       src = ureg_abs(src);
 319
 320    if (SrcReg->RelAddr) {
 321       src = ureg_src_indirect( src, ureg_src(t->address[0]));
 322       if (SrcReg->File != PROGRAM_INPUT &&
 323           SrcReg->File != PROGRAM_OUTPUT) {
 324          /* If SrcReg->Index was negative, it was set to zero in
 325           * src_register().  Reassign it now.  But don't do this
 326           * for input/output regs since they get remapped while
 327           * const buffers don't.
 328           */
 329          src.Index = SrcReg->Index;
 330       }
 331    }
 332
 333    return src;
 334 }
 335
 336
 337 static struct ureg_src swizzle_4v( struct ureg_src src,
 338                                    const unsigned *swz )
 339 {
 340    return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
 341 }
 342
 343
 344 /**
 345  * Translate a SWZ instruction into a MOV, MUL or MAD instruction.  EG:
 346  *
 347  *   SWZ dst, src.x-y10
 348  *
 349  * becomes:
 350  *
 351  *   MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
 352  */
 353 static void emit_swz( struct st_translate *t,
 354                       struct ureg_dst dst,
 355                       const struct prog_src_register *SrcReg )
 356 {
 357    struct ureg_program *ureg = t->ureg;
 358    struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
 359
 360    unsigned negate_mask =  SrcReg->Negate;
 361
 362    unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
 363                         (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
 364                         (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
 365                         (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
 366
 367    unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
 368                          (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
 369                          (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
 370                          (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
 371
 372    unsigned negative_one_mask = one_mask & negate_mask;
 373    unsigned positive_one_mask = one_mask & ~negate_mask;
 374
 375    struct ureg_src imm;
 376    unsigned i;
 377    unsigned mul_swizzle[4] = {0,0,0,0};
 378    unsigned add_swizzle[4] = {0,0,0,0};
 379    unsigned src_swizzle[4] = {0,0,0,0};
 380    boolean need_add = FALSE;
 381    boolean need_mul = FALSE;
 382
 383    if (dst.WriteMask == 0)
 384       return;
 385
 386    /* Is this just a MOV?
 387     */
 388    if (zero_mask == 0 &&
 389        one_mask == 0 &&
 390        (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
 391    {
 392       ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
 393       return;
 394    }
 395
 396 #define IMM_ZERO    0
 397 #define IMM_ONE     1
 398 #define IMM_NEG_ONE 2
 399
 400    imm = ureg_imm3f( ureg, 0, 1, -1 );
 401
 402    for (i = 0; i < 4; i++) {
 403       unsigned bit = 1 << i;
 404
 405       if (dst.WriteMask & bit) {
 406          if (positive_one_mask & bit) {
 407             mul_swizzle[i] = IMM_ZERO;
 408             add_swizzle[i] = IMM_ONE;
 409             need_add = TRUE;
 410          }
 411          else if (negative_one_mask & bit) {
 412             mul_swizzle[i] = IMM_ZERO;
 413             add_swizzle[i] = IMM_NEG_ONE;
 414             need_add = TRUE;
 415          }
 416          else if (zero_mask & bit) {
 417             mul_swizzle[i] = IMM_ZERO;
 418             add_swizzle[i] = IMM_ZERO;
 419             need_add = TRUE;
 420          }
 421          else {
 422             add_swizzle[i] = IMM_ZERO;
 423             src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
 424             need_mul = TRUE;
 425             if (negate_mask & bit) {
 426                mul_swizzle[i] = IMM_NEG_ONE;
 427             }
 428             else {
 429                mul_swizzle[i] = IMM_ONE;
 430             }
 431          }
 432       }
 433    }
 434
 435    if (need_mul && need_add) {
 436       ureg_MAD( ureg,
 437                 dst,
 438                 swizzle_4v( src, src_swizzle ),
 439                 swizzle_4v( imm, mul_swizzle ),
 440                 swizzle_4v( imm, add_swizzle ) );
 441    }
 442    else if (need_mul) {
 443       ureg_MUL( ureg,
 444                 dst,
 445                 swizzle_4v( src, src_swizzle ),
 446                 swizzle_4v( imm, mul_swizzle ) );
 447    }
 448    else if (need_add) {
 449       ureg_MOV( ureg,
 450                 dst,
 451                 swizzle_4v( imm, add_swizzle ) );
 452    }
 453    else {
 454       debug_assert(0);
 455    }
 456
 457 #undef IMM_ZERO
 458 #undef IMM_ONE
 459 #undef IMM_NEG_ONE
 460 }
 461
 462
 463 /**
 464  * Negate the value of DDY to match GL semantics where (0,0) is the
 465  * lower-left corner of the window.
 466  * Note that the GL_ARB_fragment_coord_conventions extension will
 467  * effect this someday.
 468  */
 469 static void emit_ddy( struct st_translate *t,
 470                       struct ureg_dst dst,
 471                       const struct prog_src_register *SrcReg )
 472 {
 473    struct ureg_program *ureg = t->ureg;
 474    struct ureg_src src = translate_src( t, SrcReg );
 475    src = ureg_negate( src );
 476    ureg_DDY( ureg, dst, src );
 477 }
 478
 479
 480
 481 static unsigned
 482 translate_opcode( unsigned op )
 483 {
 484    switch( op ) {
 485    case OPCODE_ARL:
 486       return TGSI_OPCODE_ARL;
 487    case OPCODE_ABS:
 488       return TGSI_OPCODE_ABS;
 489    case OPCODE_ADD:
 490       return TGSI_OPCODE_ADD;
 491    case OPCODE_BGNLOOP:
 492       return TGSI_OPCODE_BGNLOOP;
 493    case OPCODE_BGNSUB:
 494       return TGSI_OPCODE_BGNSUB;
 495    case OPCODE_BRA:
 496       return TGSI_OPCODE_BRA;
 497    case OPCODE_BRK:
 498       return TGSI_OPCODE_BRK;
 499    case OPCODE_CAL:
 500       return TGSI_OPCODE_CAL;
 501    case OPCODE_CMP:
 502       return TGSI_OPCODE_CMP;
 503    case OPCODE_CONT:
 504       return TGSI_OPCODE_CONT;
 505    case OPCODE_COS:
 506       return TGSI_OPCODE_COS;
 507    case OPCODE_DDX:
 508       return TGSI_OPCODE_DDX;
 509    case OPCODE_DDY:
 510       return TGSI_OPCODE_DDY;
 511    case OPCODE_DP2:
 512       return TGSI_OPCODE_DP2;
 513    case OPCODE_DP2A:
 514       return TGSI_OPCODE_DP2A;
 515    case OPCODE_DP3:
 516       return TGSI_OPCODE_DP3;
 517    case OPCODE_DP4:
 518       return TGSI_OPCODE_DP4;
 519    case OPCODE_DPH:
 520       return TGSI_OPCODE_DPH;
 521    case OPCODE_DST:
 522       return TGSI_OPCODE_DST;
 523    case OPCODE_ELSE:
 524       return TGSI_OPCODE_ELSE;
 525    case OPCODE_ENDIF:
 526       return TGSI_OPCODE_ENDIF;
 527    case OPCODE_ENDLOOP:
 528       return TGSI_OPCODE_ENDLOOP;
 529    case OPCODE_ENDSUB:
 530       return TGSI_OPCODE_ENDSUB;
 531    case OPCODE_EX2:
 532       return TGSI_OPCODE_EX2;
 533    case OPCODE_EXP:
 534       return TGSI_OPCODE_EXP;
 535    case OPCODE_FLR:
 536       return TGSI_OPCODE_FLR;
 537    case OPCODE_FRC:
 538       return TGSI_OPCODE_FRC;
 539    case OPCODE_IF:
 540       return TGSI_OPCODE_IF;
 541    case OPCODE_TRUNC:
 542       return TGSI_OPCODE_TRUNC;
 543    case OPCODE_KIL:
 544       return TGSI_OPCODE_KIL;
 545    case OPCODE_KIL_NV:
 546       return TGSI_OPCODE_KILP;
 547    case OPCODE_LG2:
 548       return TGSI_OPCODE_LG2;
 549    case OPCODE_LOG:
 550       return TGSI_OPCODE_LOG;
 551    case OPCODE_LIT:
 552       return TGSI_OPCODE_LIT;
 553    case OPCODE_LRP:
 554       return TGSI_OPCODE_LRP;
 555    case OPCODE_MAD:
 556       return TGSI_OPCODE_MAD;
 557    case OPCODE_MAX:
 558       return TGSI_OPCODE_MAX;
 559    case OPCODE_MIN:
 560       return TGSI_OPCODE_MIN;
 561    case OPCODE_MOV:
 562       return TGSI_OPCODE_MOV;
 563    case OPCODE_MUL:
 564       return TGSI_OPCODE_MUL;
 565    case OPCODE_NOP:
 566       return TGSI_OPCODE_NOP;
 567    case OPCODE_NRM3:
 568       return TGSI_OPCODE_NRM;
 569    case OPCODE_NRM4:
 570       return TGSI_OPCODE_NRM4;
 571    case OPCODE_POW:
 572       return TGSI_OPCODE_POW;
 573    case OPCODE_RCP:
 574       return TGSI_OPCODE_RCP;
 575    case OPCODE_RET:
 576       return TGSI_OPCODE_RET;
 577    case OPCODE_RSQ:
 578       return TGSI_OPCODE_RSQ;
 579    case OPCODE_SCS:
 580       return TGSI_OPCODE_SCS;
 581    case OPCODE_SEQ:
 582       return TGSI_OPCODE_SEQ;
 583    case OPCODE_SGE:
 584       return TGSI_OPCODE_SGE;
 585    case OPCODE_SGT:
 586       return TGSI_OPCODE_SGT;
 587    case OPCODE_SIN:
 588       return TGSI_OPCODE_SIN;
 589    case OPCODE_SLE:
 590       return TGSI_OPCODE_SLE;
 591    case OPCODE_SLT:
 592       return TGSI_OPCODE_SLT;
 593    case OPCODE_SNE:
 594       return TGSI_OPCODE_SNE;
 595    case OPCODE_SSG:
 596       return TGSI_OPCODE_SSG;
 597    case OPCODE_SUB:
 598       return TGSI_OPCODE_SUB;
 599    case OPCODE_TEX:
 600       return TGSI_OPCODE_TEX;
 601    case OPCODE_TXB:
 602       return TGSI_OPCODE_TXB;
 603    case OPCODE_TXD:
 604       return TGSI_OPCODE_TXD;
 605    case OPCODE_TXL:
 606       return TGSI_OPCODE_TXL;
 607    case OPCODE_TXP:
 608       return TGSI_OPCODE_TXP;
 609    case OPCODE_XPD:
 610       return TGSI_OPCODE_XPD;
 611    case OPCODE_END:
 612       return TGSI_OPCODE_END;
 613    default:
 614       debug_assert( 0 );
 615       return TGSI_OPCODE_NOP;
 616    }
 617 }
 618
 619
 620 static void
 621 compile_instruction(
 622    struct st_translate *t,
 623    const struct prog_instruction *inst )
 624 {
 625    struct ureg_program *ureg = t->ureg;
 626    GLuint i;
 627    struct ureg_dst dst[1];
 628    struct ureg_src src[4];
 629    unsigned num_dst;
 630    unsigned num_src;
 631
 632    num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
 633    num_src = _mesa_num_inst_src_regs( inst->Opcode );
 634
 635    if (num_dst)
 636       dst[0] = translate_dst( t,
 637                               &inst->DstReg,
 638                               inst->SaturateMode );
 639
 640    for (i = 0; i < num_src; i++)
 641       src[i] = translate_src( t, &inst->SrcReg[i] );
 642
 643    switch( inst->Opcode ) {
 644    case OPCODE_SWZ:
 645       emit_swz( t, dst[0], &inst->SrcReg[0] );
 646       return;
 647
 648    case OPCODE_BGNLOOP:
 649    case OPCODE_CAL:
 650    case OPCODE_ELSE:
 651    case OPCODE_ENDLOOP:
 652    case OPCODE_IF:
 653       debug_assert(num_dst == 0);
 654       ureg_label_insn( ureg,
 655                        translate_opcode( inst->Opcode ),
 656                        src, num_src,
 657                        get_label( t, inst->BranchTarget ));
 658       return;
 659
 660    case OPCODE_TEX:
 661    case OPCODE_TXB:
 662    case OPCODE_TXD:
 663    case OPCODE_TXL:
 664    case OPCODE_TXP:
 665       src[num_src++] = t->samplers[inst->TexSrcUnit];
 666       ureg_tex_insn( ureg,
 667                      translate_opcode( inst->Opcode ),
 668                      dst, num_dst,
 669                      translate_texture_target( inst->TexSrcTarget,
 670                                                inst->TexShadow ),
 671                      src, num_src );
 672       return;
 673
 674    case OPCODE_SCS:
 675       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
 676       ureg_insn( ureg,
 677                  translate_opcode( inst->Opcode ),
 678                  dst, num_dst,
 679                  src, num_src );
 680       break;
 681
 682    case OPCODE_XPD:
 683       dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
 684       ureg_insn( ureg,
 685                  translate_opcode( inst->Opcode ),
 686                  dst, num_dst,
 687                  src, num_src );
 688       break;
 689
 690    case OPCODE_NOISE1:
 691    case OPCODE_NOISE2:
 692    case OPCODE_NOISE3:
 693    case OPCODE_NOISE4:
 694       /* At some point, a motivated person could add a better
 695        * implementation of noise.  Currently not even the nvidia
 696        * binary drivers do anything more than this.  In any case, the
 697        * place to do this is in the GL state tracker, not the poor
 698        * driver.
 699        */
 700       ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
 701       break;
 702
 703    case OPCODE_DDY:
 704       emit_ddy( t, dst[0], &inst->SrcReg[0] );
 705       break;
 706
 707    default:
 708       ureg_insn( ureg,
 709                  translate_opcode( inst->Opcode ),
 710                  dst, num_dst,
 711                  src, num_src );
 712       break;
 713    }
 714 }
 715
 716
 717 /**
 718  * Emit the TGSI instructions to adjust the WPOS pixel center convention
 719  */
 720 static void
 721 emit_adjusted_wpos( struct st_translate *t,
 722                     const struct gl_program *program, GLfloat value)
 723 {
 724    struct ureg_program *ureg = t->ureg;
 725    struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
 726    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 727
 728    ureg_ADD(ureg,
 729             ureg_writemask(wpos_temp, TGSI_WRITEMASK_X | TGSI_WRITEMASK_Y),
 730             wpos_input, ureg_imm1f(ureg, value));
 731
 732    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 733 }
 734
 735
 736 /**
 737  * Emit the TGSI instructions for inverting the WPOS y coordinate.
 738  */
 739 static void
 740 emit_inverted_wpos( struct st_translate *t,
 741                     const struct gl_program *program )
 742 {
 743    struct ureg_program *ureg = t->ureg;
 744
 745    /* Fragment program uses fragment position input.
 746     * Need to replace instances of INPUT[WPOS] with temp T
 747     * where T = INPUT[WPOS] by y is inverted.
 748     */
 749    static const gl_state_index winSizeState[STATE_LENGTH]
 750       = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
 751
 752    /* XXX: note we are modifying the incoming shader here!  Need to
 753     * do this before emitting the constant decls below, or this
 754     * will be missed:
 755     */
 756    unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
 757                                                        winSizeState);
 758
 759    struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
 760    struct ureg_dst wpos_temp;
 761    struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
 762
 763    /* MOV wpos_temp, input[wpos]
 764     */
 765    if (wpos_input.File == TGSI_FILE_TEMPORARY)
 766       wpos_temp = ureg_dst(wpos_input);
 767    else {
 768       wpos_temp = ureg_DECL_temporary( ureg );
 769       ureg_MOV( ureg, wpos_temp, wpos_input );
 770    }
 771
 772    /* SUB wpos_temp.y, winsize_const, wpos_input
 773     */
 774    ureg_SUB( ureg,
 775              ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
 776              winsize,
 777              wpos_input);
 778
 779    /* Use wpos_temp as position input from here on:
 780     */
 781    t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
 782 }
 783
 784
 785 /**
 786  * Emit fragment position/ooordinate code.
 787  */
 788 static void
 789 emit_wpos(struct st_context *st,
 790           struct st_translate *t,
 791           const struct gl_program *program,
 792           struct ureg_program *ureg)
 793 {
 794    const struct gl_fragment_program *fp =
 795       (const struct gl_fragment_program *) program;
 796    struct pipe_screen *pscreen = st->pipe->screen;
 797    boolean invert = FALSE;
 798
 799    if (fp->OriginUpperLeft) {
 800       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
 801       }
 802       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
 803          ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
 804          invert = TRUE;
 805       }
 806       else
 807          assert(0);
 808    }
 809    else {
 810       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
 811          ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
 812       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
 813          invert = TRUE;
 814       else
 815          assert(0);
 816    }
 817
 818    if (fp->PixelCenterInteger) {
 819       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER))
 820          ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
 821       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER))
 822          emit_adjusted_wpos(t, program, invert ? 0.5f : -0.5f);
 823       else
 824          assert(0);
 825    }
 826    else {
 827       if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
 828       }
 829       else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
 830          ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
 831          emit_adjusted_wpos(t, program, invert ? -0.5f : 0.5f);
 832       }
 833       else
 834          assert(0);
 835    }
 836
 837    /* we invert after adjustment so that we avoid the MOV to temporary,
 838     * and reuse the adjustment ADD instead */
 839    if (invert)
 840       emit_inverted_wpos(t, program);
 841 }
 842
 843
 844 /**
 845  * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
 846  * TGSI uses +1 for front, -1 for back.
 847  * This function converts the TGSI value to the GL value.  Simply clamping/
 848  * saturating the value to [0,1] does the job.
 849  */
 850 static void
 851 emit_face_var( struct st_translate *t,
 852                const struct gl_program *program )
 853 {
 854    struct ureg_program *ureg = t->ureg;
 855    struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
 856    struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
 857
 858    /* MOV_SAT face_temp, input[face]
 859     */
 860    face_temp = ureg_saturate( face_temp );
 861    ureg_MOV( ureg, face_temp, face_input );
 862
 863    /* Use face_temp as face input from here on:
 864     */
 865    t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
 866 }
 867
 868
 869 static void
 870 emit_edgeflags( struct st_translate *t,
 871                  const struct gl_program *program )
 872 {
 873    struct ureg_program *ureg = t->ureg;
 874    struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
 875    struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
 876
 877    ureg_MOV( ureg, edge_dst, edge_src );
 878 }
 879
 880
 881 /**
 882  * Translate Mesa program to TGSI format.
 883  * \param program  the program to translate
 884  * \param numInputs  number of input registers used
 885  * \param inputMapping  maps Mesa fragment program inputs to TGSI generic
 886  *                      input indexes
 887  * \param inputSemanticName  the TGSI_SEMANTIC flag for each input
 888  * \param inputSemanticIndex  the semantic index (ex: which texcoord) for
 889  *                            each input
 890  * \param interpMode  the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
 891  * \param numOutputs  number of output registers used
 892  * \param outputMapping  maps Mesa fragment program outputs to TGSI
 893  *                       generic outputs
 894  * \param outputSemanticName  the TGSI_SEMANTIC flag for each output
 895  * \param outputSemanticIndex  the semantic index (ex: which texcoord) for
 896  *                             each output
 897  *
 898  * \return  PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
 899  */
 900 enum pipe_error
 901 st_translate_mesa_program(
 902    GLcontext *ctx,
 903    uint procType,
 904    struct ureg_program *ureg,
 905    const struct gl_program *program,
 906    GLuint numInputs,
 907    const GLuint inputMapping[],
 908    const ubyte inputSemanticName[],
 909    const ubyte inputSemanticIndex[],
 910    const GLuint interpMode[],
 911    GLuint numOutputs,
 912    const GLuint outputMapping[],
 913    const ubyte outputSemanticName[],
 914    const ubyte outputSemanticIndex[],
 915    boolean passthrough_edgeflags )
 916 {
 917    struct st_translate translate, *t;
 918    unsigned i;
 919    enum pipe_error ret = PIPE_OK;
 920
 921    t = &translate;
 922    memset(t, 0, sizeof *t);
 923
 924    t->procType = procType;
 925    t->inputMapping = inputMapping;
 926    t->outputMapping = outputMapping;
 927    t->ureg = ureg;
 928    t->pointSizeOutIndex = -1;
 929    t->prevInstWrotePointSize = GL_FALSE;
 930
 931    /*_mesa_print_program(program);*/
 932
 933    /*
 934     * Declare input attributes.
 935     */
 936    if (procType == TGSI_PROCESSOR_FRAGMENT) {
 937       for (i = 0; i < numInputs; i++) {
 938          if (program->InputFlags[0] & PROG_PARAM_BIT_CYL_WRAP) {
 939             t->inputs[i] = ureg_DECL_fs_input_cyl(ureg,
 940                                                   inputSemanticName[i],
 941                                                   inputSemanticIndex[i],
 942                                                   interpMode[i],
 943                                                   TGSI_CYLINDRICAL_WRAP_X);
 944          }
 945          else {
 946             t->inputs[i] = ureg_DECL_fs_input(ureg,
 947                                               inputSemanticName[i],
 948                                               inputSemanticIndex[i],
 949                                               interpMode[i]);
 950          }
 951       }
 952
 953       if (program->InputsRead & FRAG_BIT_WPOS) {
 954          /* Must do this after setting up t->inputs, and before
 955           * emitting constant references, below:
 956           */
 957          emit_wpos(st_context(ctx), t, program, ureg);
 958       }
 959
 960       if (program->InputsRead & FRAG_BIT_FACE) {
 961          emit_face_var( t, program );
 962       }
 963
 964       /*
 965        * Declare output attributes.
 966        */
 967       for (i = 0; i < numOutputs; i++) {
 968          switch (outputSemanticName[i]) {
 969          case TGSI_SEMANTIC_POSITION:
 970             t->outputs[i] = ureg_DECL_output( ureg,
 971                                               TGSI_SEMANTIC_POSITION, /* Z / Depth */
 972                                               outputSemanticIndex[i] );
 973
 974             t->outputs[i] = ureg_writemask( t->outputs[i],
 975                                             TGSI_WRITEMASK_Z );
 976             break;
 977          case TGSI_SEMANTIC_COLOR:
 978             t->outputs[i] = ureg_DECL_output( ureg,
 979                                               TGSI_SEMANTIC_COLOR,
 980                                               outputSemanticIndex[i] );
 981             break;
 982          default:
 983             debug_assert(0);
 984             return 0;
 985          }
 986       }
 987    }
 988    else {
 989       for (i = 0; i < numInputs; i++) {
 990          t->inputs[i] = ureg_DECL_vs_input(ureg, i);
 991       }
 992
 993       for (i = 0; i < numOutputs; i++) {
 994          t->outputs[i] = ureg_DECL_output( ureg,
 995                                            outputSemanticName[i],
 996                                            outputSemanticIndex[i] );
 997          if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && program->Id) {
 998             /* Writing to the point size result register requires special
 999              * handling to implement clamping.
1000              */
1001             static const gl_state_index pointSizeClampState[STATE_LENGTH]
1002                = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, 0, 0, 0 };
1003                /* XXX: note we are modifying the incoming shader here!  Need to
1004                * do this before emitting the constant decls below, or this
1005                * will be missed:
1006                */
1007             unsigned pointSizeClampConst =
1008                _mesa_add_state_reference(program->Parameters,
1009                                          pointSizeClampState);
1010             struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
1011             t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
1012             t->pointSizeResult = t->outputs[i];
1013             t->pointSizeOutIndex = i;
1014             t->outputs[i] = psizregtemp;
1015          }
1016       }
1017       if (passthrough_edgeflags)
1018          emit_edgeflags( t, program );
1019    }
1020
1021    /* Declare address register.
1022     */
1023    if (program->NumAddressRegs > 0) {
1024       debug_assert( program->NumAddressRegs == 1 );
1025       t->address[0] = ureg_DECL_address( ureg );
1026    }
1027
1028    /* Emit constants and immediates.  Mesa uses a single index space
1029     * for these, so we put all the translated regs in t->constants.
1030     */
1031    if (program->Parameters) {
1032       t->constants = CALLOC( program->Parameters->NumParameters,
1033                              sizeof t->constants[0] );
1034       if (t->constants == NULL) {
1035          ret = PIPE_ERROR_OUT_OF_MEMORY;
1036          goto out;
1037       }
1038
1039       for (i = 0; i < program->Parameters->NumParameters; i++) {
1040          switch (program->Parameters->Parameters[i].Type) {
1041          case PROGRAM_ENV_PARAM:
1042          case PROGRAM_LOCAL_PARAM:
1043          case PROGRAM_STATE_VAR:
1044          case PROGRAM_NAMED_PARAM:
1045          case PROGRAM_UNIFORM:
1046             t->constants[i] = ureg_DECL_constant( ureg, i );
1047             break;
1048
1049             /* Emit immediates only when there is no address register
1050              * in use.  FIXME: Be smarter and recognize param arrays:
1051              * indirect addressing is only valid within the referenced
1052              * array.
1053              */
1054          case PROGRAM_CONSTANT:
1055             if (program->NumAddressRegs > 0)
1056                t->constants[i] = ureg_DECL_constant( ureg, i );
1057             else
1058                t->constants[i] =
1059                   ureg_DECL_immediate( ureg,
1060                                        program->Parameters->ParameterValues[i],
1061                                        4 );
1062             break;
1063          default:
1064             break;
1065          }
1066       }
1067    }
1068
1069    /* texture samplers */
1070    for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1071       if (program->SamplersUsed & (1 << i)) {
1072          t->samplers[i] = ureg_DECL_sampler( ureg, i );
1073       }
1074    }
1075
1076    /* Emit each instruction in turn:
1077     */
1078    for (i = 0; i < program->NumInstructions; i++) {
1079       set_insn_start( t, ureg_get_instruction_number( ureg ));
1080       compile_instruction( t, &program->Instructions[i] );
1081
1082       if (t->prevInstWrotePointSize && program->Id) {
1083          /* The previous instruction wrote to the (fake) vertex point size
1084           * result register.  Now we need to clamp that value to the min/max
1085           * point size range, putting the result into the real point size
1086           * register.
1087           * Note that we can't do this easily at the end of program due to
1088           * possible early return.
1089           */
1090          set_insn_start( t, ureg_get_instruction_number( ureg ));
1091          ureg_MAX( t->ureg,
1092                    ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
1093                    ureg_src(t->outputs[t->pointSizeOutIndex]),
1094                    ureg_swizzle(t->pointSizeConst, 1,1,1,1));
1095          ureg_MIN( t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
1096                    ureg_src(t->outputs[t->pointSizeOutIndex]),
1097                    ureg_swizzle(t->pointSizeConst, 2,2,2,2));
1098       }
1099       t->prevInstWrotePointSize = GL_FALSE;
1100    }
1101
1102    /* Fix up all emitted labels:
1103     */
1104    for (i = 0; i < t->labels_count; i++) {
1105       ureg_fixup_label( ureg,
1106                         t->labels[i].token,
1107                         t->insn[t->labels[i].branch_target] );
1108    }
1109
1110 out:
1111    FREE(t->insn);
1112    FREE(t->labels);
1113    FREE(t->constants);
1114
1115    if (t->error) {
1116       debug_printf("%s: translate error flag set\n", __FUNCTION__);
1117    }
1118
1119    return ret;
1120 }
1121
1122
1123 /**
1124  * Tokens cannot be free with free otherwise the builtin gallium
1125  * malloc debugging will get confused.
1126  */
1127 void
1128 st_free_tokens(const struct tgsi_token *tokens)
1129 {
1130    FREE((void *)tokens);
1131 }