1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "pipe/p_state.h"
37 #include "pipe/p_context.h"
38 #include "tgsi/tgsi_ureg.h"
39 #include "st_mesa_to_tgsi.h"
40 #include "st_context.h"
41 #include "shader/prog_instruction.h"
42 #include "shader/prog_parameter.h"
43 #include "util/u_debug.h"
44 #include "util/u_math.h"
45 #include "util/u_memory.h"
48 unsigned branch_target
;
54 * Intermediate state used during shader translation.
57 struct ureg_program
*ureg
;
59 struct ureg_dst temps
[MAX_PROGRAM_TEMPS
];
60 struct ureg_src
*constants
;
61 struct ureg_dst outputs
[PIPE_MAX_SHADER_OUTPUTS
];
62 struct ureg_src inputs
[PIPE_MAX_SHADER_INPUTS
];
63 struct ureg_dst address
[1];
64 struct ureg_src samplers
[PIPE_MAX_SAMPLERS
];
66 /* Extra info for handling point size clamping in vertex shader */
67 struct ureg_dst pointSizeResult
; /**< Actual point size output register */
68 struct ureg_src pointSizeConst
; /**< Point size range constant register */
69 GLint pointSizeOutIndex
; /**< Temp point size output register */
70 GLboolean prevInstWrotePointSize
;
72 const GLuint
*inputMapping
;
73 const GLuint
*outputMapping
;
75 /* For every instruction that contains a label (eg CALL), keep
76 * details so that we can go back afterwards and emit the correct
77 * tgsi instruction number for each label.
81 unsigned labels_count
;
83 /* Keep a record of the tgsi instruction number that each mesa
84 * instruction starts at, will be used to fix up labels after
91 unsigned procType
; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
98 * Make note of a branch to a label in the TGSI code.
99 * After we've emitted all instructions, we'll go over the list
100 * of labels built here and patch the TGSI code with the actual
101 * location of each label.
103 static unsigned *get_label( struct st_translate
*t
,
104 unsigned branch_target
)
108 if (t
->labels_count
+ 1 >= t
->labels_size
) {
109 unsigned old_size
= t
->labels_size
;
110 t
->labels_size
= 1 << (util_logbase2(t
->labels_size
) + 1);
111 t
->labels
= REALLOC( t
->labels
,
112 old_size
* sizeof t
->labels
[0],
113 t
->labels_size
* sizeof t
->labels
[0] );
114 if (t
->labels
== NULL
) {
115 static unsigned dummy
;
121 i
= t
->labels_count
++;
122 t
->labels
[i
].branch_target
= branch_target
;
123 return &t
->labels
[i
].token
;
128 * Called prior to emitting the TGSI code for each Mesa instruction.
129 * Allocate additional space for instructions if needed.
130 * Update the insn[] array so the next Mesa instruction points to
131 * the next TGSI instruction.
133 static void set_insn_start( struct st_translate
*t
,
136 if (t
->insn_count
+ 1 >= t
->insn_size
) {
137 unsigned old_size
= t
->insn_size
;
138 t
->insn_size
= 1 << (util_logbase2(t
->insn_size
) + 1);
139 t
->insn
= REALLOC( t
->insn
,
140 old_size
* sizeof t
->insn
[0],
141 t
->insn_size
* sizeof t
->insn
[0] );
142 if (t
->insn
== NULL
) {
148 t
->insn
[t
->insn_count
++] = start
;
153 * Map a Mesa dst register to a TGSI ureg_dst register.
155 static struct ureg_dst
156 dst_register( struct st_translate
*t
,
157 gl_register_file file
,
161 case PROGRAM_UNDEFINED
:
162 return ureg_dst_undef();
164 case PROGRAM_TEMPORARY
:
165 if (ureg_dst_is_undef(t
->temps
[index
]))
166 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
168 return t
->temps
[index
];
171 if (t
->procType
== TGSI_PROCESSOR_VERTEX
&& index
== VERT_RESULT_PSIZ
)
172 t
->prevInstWrotePointSize
= GL_TRUE
;
174 if (t
->procType
== TGSI_PROCESSOR_VERTEX
)
175 assert(index
< VERT_RESULT_MAX
);
176 else if (t
->procType
== TGSI_PROCESSOR_FRAGMENT
)
177 assert(index
< FRAG_RESULT_MAX
);
179 assert(0 && "geom shaders not handled in dst_register() yet");
181 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
183 return t
->outputs
[t
->outputMapping
[index
]];
185 case PROGRAM_ADDRESS
:
186 return t
->address
[index
];
190 return ureg_dst_undef();
196 * Map a Mesa src register to a TGSI ureg_src register.
198 static struct ureg_src
199 src_register( struct st_translate
*t
,
200 gl_register_file file
,
204 case PROGRAM_UNDEFINED
:
205 return ureg_src_undef();
207 case PROGRAM_TEMPORARY
:
209 if (ureg_dst_is_undef(t
->temps
[index
]))
210 t
->temps
[index
] = ureg_DECL_temporary( t
->ureg
);
211 assert(index
< Elements(t
->temps
));
212 return ureg_src(t
->temps
[index
]);
214 case PROGRAM_NAMED_PARAM
:
215 case PROGRAM_ENV_PARAM
:
216 case PROGRAM_LOCAL_PARAM
:
217 case PROGRAM_UNIFORM
:
219 return t
->constants
[index
];
220 case PROGRAM_STATE_VAR
:
221 case PROGRAM_CONSTANT
: /* ie, immediate */
223 return ureg_DECL_constant( t
->ureg
, 0 );
225 return t
->constants
[index
];
228 assert(t
->inputMapping
[index
] < Elements(t
->inputs
));
229 return t
->inputs
[t
->inputMapping
[index
]];
232 assert(t
->outputMapping
[index
] < Elements(t
->outputs
));
233 return ureg_src(t
->outputs
[t
->outputMapping
[index
]]); /* not needed? */
235 case PROGRAM_ADDRESS
:
236 return ureg_src(t
->address
[index
]);
240 return ureg_src_undef();
246 * Map mesa texture target to TGSI texture target.
249 translate_texture_target( GLuint textarget
,
253 switch( textarget
) {
254 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_SHADOW1D
;
255 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_SHADOW2D
;
256 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_SHADOWRECT
;
261 switch( textarget
) {
262 case TEXTURE_1D_INDEX
: return TGSI_TEXTURE_1D
;
263 case TEXTURE_2D_INDEX
: return TGSI_TEXTURE_2D
;
264 case TEXTURE_3D_INDEX
: return TGSI_TEXTURE_3D
;
265 case TEXTURE_CUBE_INDEX
: return TGSI_TEXTURE_CUBE
;
266 case TEXTURE_RECT_INDEX
: return TGSI_TEXTURE_RECT
;
269 return TGSI_TEXTURE_1D
;
275 * Create a TGSI ureg_dst register from a Mesa dest register.
277 static struct ureg_dst
278 translate_dst( struct st_translate
*t
,
279 const struct prog_dst_register
*DstReg
,
282 struct ureg_dst dst
= dst_register( t
,
286 dst
= ureg_writemask( dst
,
290 dst
= ureg_saturate( dst
);
293 dst
= ureg_dst_indirect( dst
, ureg_src(t
->address
[0]) );
300 * Create a TGSI ureg_src register from a Mesa src register.
302 static struct ureg_src
303 translate_src( struct st_translate
*t
,
304 const struct prog_src_register
*SrcReg
)
306 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
308 src
= ureg_swizzle( src
,
309 GET_SWZ( SrcReg
->Swizzle
, 0 ) & 0x3,
310 GET_SWZ( SrcReg
->Swizzle
, 1 ) & 0x3,
311 GET_SWZ( SrcReg
->Swizzle
, 2 ) & 0x3,
312 GET_SWZ( SrcReg
->Swizzle
, 3 ) & 0x3);
314 if (SrcReg
->Negate
== NEGATE_XYZW
)
315 src
= ureg_negate(src
);
320 if (SrcReg
->RelAddr
) {
321 src
= ureg_src_indirect( src
, ureg_src(t
->address
[0]));
322 if (SrcReg
->File
!= PROGRAM_INPUT
&&
323 SrcReg
->File
!= PROGRAM_OUTPUT
) {
324 /* If SrcReg->Index was negative, it was set to zero in
325 * src_register(). Reassign it now. But don't do this
326 * for input/output regs since they get remapped while
327 * const buffers don't.
329 src
.Index
= SrcReg
->Index
;
337 static struct ureg_src
swizzle_4v( struct ureg_src src
,
338 const unsigned *swz
)
340 return ureg_swizzle( src
, swz
[0], swz
[1], swz
[2], swz
[3] );
345 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
351 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
353 static void emit_swz( struct st_translate
*t
,
355 const struct prog_src_register
*SrcReg
)
357 struct ureg_program
*ureg
= t
->ureg
;
358 struct ureg_src src
= src_register( t
, SrcReg
->File
, SrcReg
->Index
);
360 unsigned negate_mask
= SrcReg
->Negate
;
362 unsigned one_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ONE
) << 0 |
363 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ONE
) << 1 |
364 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ONE
) << 2 |
365 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ONE
) << 3);
367 unsigned zero_mask
= ((GET_SWZ(SrcReg
->Swizzle
, 0) == SWIZZLE_ZERO
) << 0 |
368 (GET_SWZ(SrcReg
->Swizzle
, 1) == SWIZZLE_ZERO
) << 1 |
369 (GET_SWZ(SrcReg
->Swizzle
, 2) == SWIZZLE_ZERO
) << 2 |
370 (GET_SWZ(SrcReg
->Swizzle
, 3) == SWIZZLE_ZERO
) << 3);
372 unsigned negative_one_mask
= one_mask
& negate_mask
;
373 unsigned positive_one_mask
= one_mask
& ~negate_mask
;
377 unsigned mul_swizzle
[4] = {0,0,0,0};
378 unsigned add_swizzle
[4] = {0,0,0,0};
379 unsigned src_swizzle
[4] = {0,0,0,0};
380 boolean need_add
= FALSE
;
381 boolean need_mul
= FALSE
;
383 if (dst
.WriteMask
== 0)
386 /* Is this just a MOV?
388 if (zero_mask
== 0 &&
390 (negate_mask
== 0 || negate_mask
== TGSI_WRITEMASK_XYZW
))
392 ureg_MOV( ureg
, dst
, translate_src( t
, SrcReg
));
398 #define IMM_NEG_ONE 2
400 imm
= ureg_imm3f( ureg
, 0, 1, -1 );
402 for (i
= 0; i
< 4; i
++) {
403 unsigned bit
= 1 << i
;
405 if (dst
.WriteMask
& bit
) {
406 if (positive_one_mask
& bit
) {
407 mul_swizzle
[i
] = IMM_ZERO
;
408 add_swizzle
[i
] = IMM_ONE
;
411 else if (negative_one_mask
& bit
) {
412 mul_swizzle
[i
] = IMM_ZERO
;
413 add_swizzle
[i
] = IMM_NEG_ONE
;
416 else if (zero_mask
& bit
) {
417 mul_swizzle
[i
] = IMM_ZERO
;
418 add_swizzle
[i
] = IMM_ZERO
;
422 add_swizzle
[i
] = IMM_ZERO
;
423 src_swizzle
[i
] = GET_SWZ(SrcReg
->Swizzle
, i
);
425 if (negate_mask
& bit
) {
426 mul_swizzle
[i
] = IMM_NEG_ONE
;
429 mul_swizzle
[i
] = IMM_ONE
;
435 if (need_mul
&& need_add
) {
438 swizzle_4v( src
, src_swizzle
),
439 swizzle_4v( imm
, mul_swizzle
),
440 swizzle_4v( imm
, add_swizzle
) );
445 swizzle_4v( src
, src_swizzle
),
446 swizzle_4v( imm
, mul_swizzle
) );
451 swizzle_4v( imm
, add_swizzle
) );
464 * Negate the value of DDY to match GL semantics where (0,0) is the
465 * lower-left corner of the window.
466 * Note that the GL_ARB_fragment_coord_conventions extension will
467 * effect this someday.
469 static void emit_ddy( struct st_translate
*t
,
471 const struct prog_src_register
*SrcReg
)
473 struct ureg_program
*ureg
= t
->ureg
;
474 struct ureg_src src
= translate_src( t
, SrcReg
);
475 src
= ureg_negate( src
);
476 ureg_DDY( ureg
, dst
, src
);
482 translate_opcode( unsigned op
)
486 return TGSI_OPCODE_ARL
;
488 return TGSI_OPCODE_ABS
;
490 return TGSI_OPCODE_ADD
;
492 return TGSI_OPCODE_BGNLOOP
;
494 return TGSI_OPCODE_BGNSUB
;
496 return TGSI_OPCODE_BRA
;
498 return TGSI_OPCODE_BRK
;
500 return TGSI_OPCODE_CAL
;
502 return TGSI_OPCODE_CMP
;
504 return TGSI_OPCODE_CONT
;
506 return TGSI_OPCODE_COS
;
508 return TGSI_OPCODE_DDX
;
510 return TGSI_OPCODE_DDY
;
512 return TGSI_OPCODE_DP2
;
514 return TGSI_OPCODE_DP2A
;
516 return TGSI_OPCODE_DP3
;
518 return TGSI_OPCODE_DP4
;
520 return TGSI_OPCODE_DPH
;
522 return TGSI_OPCODE_DST
;
524 return TGSI_OPCODE_ELSE
;
526 return TGSI_OPCODE_ENDIF
;
528 return TGSI_OPCODE_ENDLOOP
;
530 return TGSI_OPCODE_ENDSUB
;
532 return TGSI_OPCODE_EX2
;
534 return TGSI_OPCODE_EXP
;
536 return TGSI_OPCODE_FLR
;
538 return TGSI_OPCODE_FRC
;
540 return TGSI_OPCODE_IF
;
542 return TGSI_OPCODE_TRUNC
;
544 return TGSI_OPCODE_KIL
;
546 return TGSI_OPCODE_KILP
;
548 return TGSI_OPCODE_LG2
;
550 return TGSI_OPCODE_LOG
;
552 return TGSI_OPCODE_LIT
;
554 return TGSI_OPCODE_LRP
;
556 return TGSI_OPCODE_MAD
;
558 return TGSI_OPCODE_MAX
;
560 return TGSI_OPCODE_MIN
;
562 return TGSI_OPCODE_MOV
;
564 return TGSI_OPCODE_MUL
;
566 return TGSI_OPCODE_NOP
;
568 return TGSI_OPCODE_NRM
;
570 return TGSI_OPCODE_NRM4
;
572 return TGSI_OPCODE_POW
;
574 return TGSI_OPCODE_RCP
;
576 return TGSI_OPCODE_RET
;
578 return TGSI_OPCODE_RSQ
;
580 return TGSI_OPCODE_SCS
;
582 return TGSI_OPCODE_SEQ
;
584 return TGSI_OPCODE_SGE
;
586 return TGSI_OPCODE_SGT
;
588 return TGSI_OPCODE_SIN
;
590 return TGSI_OPCODE_SLE
;
592 return TGSI_OPCODE_SLT
;
594 return TGSI_OPCODE_SNE
;
596 return TGSI_OPCODE_SSG
;
598 return TGSI_OPCODE_SUB
;
600 return TGSI_OPCODE_TEX
;
602 return TGSI_OPCODE_TXB
;
604 return TGSI_OPCODE_TXD
;
606 return TGSI_OPCODE_TXL
;
608 return TGSI_OPCODE_TXP
;
610 return TGSI_OPCODE_XPD
;
612 return TGSI_OPCODE_END
;
615 return TGSI_OPCODE_NOP
;
622 struct st_translate
*t
,
623 const struct prog_instruction
*inst
)
625 struct ureg_program
*ureg
= t
->ureg
;
627 struct ureg_dst dst
[1];
628 struct ureg_src src
[4];
632 num_dst
= _mesa_num_inst_dst_regs( inst
->Opcode
);
633 num_src
= _mesa_num_inst_src_regs( inst
->Opcode
);
636 dst
[0] = translate_dst( t
,
638 inst
->SaturateMode
);
640 for (i
= 0; i
< num_src
; i
++)
641 src
[i
] = translate_src( t
, &inst
->SrcReg
[i
] );
643 switch( inst
->Opcode
) {
645 emit_swz( t
, dst
[0], &inst
->SrcReg
[0] );
653 debug_assert(num_dst
== 0);
654 ureg_label_insn( ureg
,
655 translate_opcode( inst
->Opcode
),
657 get_label( t
, inst
->BranchTarget
));
665 src
[num_src
++] = t
->samplers
[inst
->TexSrcUnit
];
667 translate_opcode( inst
->Opcode
),
669 translate_texture_target( inst
->TexSrcTarget
,
675 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XY
);
677 translate_opcode( inst
->Opcode
),
683 dst
[0] = ureg_writemask(dst
[0], TGSI_WRITEMASK_XYZ
);
685 translate_opcode( inst
->Opcode
),
694 /* At some point, a motivated person could add a better
695 * implementation of noise. Currently not even the nvidia
696 * binary drivers do anything more than this. In any case, the
697 * place to do this is in the GL state tracker, not the poor
700 ureg_MOV( ureg
, dst
[0], ureg_imm1f(ureg
, 0.5) );
704 emit_ddy( t
, dst
[0], &inst
->SrcReg
[0] );
709 translate_opcode( inst
->Opcode
),
718 * Emit the TGSI instructions to adjust the WPOS pixel center convention
721 emit_adjusted_wpos( struct st_translate
*t
,
722 const struct gl_program
*program
, GLfloat value
)
724 struct ureg_program
*ureg
= t
->ureg
;
725 struct ureg_dst wpos_temp
= ureg_DECL_temporary(ureg
);
726 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
729 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_X
| TGSI_WRITEMASK_Y
),
730 wpos_input
, ureg_imm1f(ureg
, value
));
732 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
737 * Emit the TGSI instructions for inverting the WPOS y coordinate.
740 emit_inverted_wpos( struct st_translate
*t
,
741 const struct gl_program
*program
)
743 struct ureg_program
*ureg
= t
->ureg
;
745 /* Fragment program uses fragment position input.
746 * Need to replace instances of INPUT[WPOS] with temp T
747 * where T = INPUT[WPOS] by y is inverted.
749 static const gl_state_index winSizeState
[STATE_LENGTH
]
750 = { STATE_INTERNAL
, STATE_FB_SIZE
, 0, 0, 0 };
752 /* XXX: note we are modifying the incoming shader here! Need to
753 * do this before emitting the constant decls below, or this
756 unsigned winHeightConst
= _mesa_add_state_reference(program
->Parameters
,
759 struct ureg_src winsize
= ureg_DECL_constant( ureg
, winHeightConst
);
760 struct ureg_dst wpos_temp
;
761 struct ureg_src wpos_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]];
763 /* MOV wpos_temp, input[wpos]
765 if (wpos_input
.File
== TGSI_FILE_TEMPORARY
)
766 wpos_temp
= ureg_dst(wpos_input
);
768 wpos_temp
= ureg_DECL_temporary( ureg
);
769 ureg_MOV( ureg
, wpos_temp
, wpos_input
);
772 /* SUB wpos_temp.y, winsize_const, wpos_input
775 ureg_writemask(wpos_temp
, TGSI_WRITEMASK_Y
),
779 /* Use wpos_temp as position input from here on:
781 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_WPOS
]] = ureg_src(wpos_temp
);
786 * Emit fragment position/ooordinate code.
789 emit_wpos(struct st_context
*st
,
790 struct st_translate
*t
,
791 const struct gl_program
*program
,
792 struct ureg_program
*ureg
)
794 const struct gl_fragment_program
*fp
=
795 (const struct gl_fragment_program
*) program
;
796 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
797 boolean invert
= FALSE
;
799 if (fp
->OriginUpperLeft
) {
800 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
)) {
802 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
)) {
803 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
810 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
))
811 ureg_property_fs_coord_origin(ureg
, TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
812 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
))
818 if (fp
->PixelCenterInteger
) {
819 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
))
820 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
821 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
))
822 emit_adjusted_wpos(t
, program
, invert
? 0.5f
: -0.5f
);
827 if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
)) {
829 else if (pscreen
->get_param(pscreen
, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
)) {
830 ureg_property_fs_coord_pixel_center(ureg
, TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
831 emit_adjusted_wpos(t
, program
, invert
? -0.5f
: 0.5f
);
837 /* we invert after adjustment so that we avoid the MOV to temporary,
838 * and reuse the adjustment ADD instead */
840 emit_inverted_wpos(t
, program
);
845 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
846 * TGSI uses +1 for front, -1 for back.
847 * This function converts the TGSI value to the GL value. Simply clamping/
848 * saturating the value to [0,1] does the job.
851 emit_face_var( struct st_translate
*t
,
852 const struct gl_program
*program
)
854 struct ureg_program
*ureg
= t
->ureg
;
855 struct ureg_dst face_temp
= ureg_DECL_temporary( ureg
);
856 struct ureg_src face_input
= t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]];
858 /* MOV_SAT face_temp, input[face]
860 face_temp
= ureg_saturate( face_temp
);
861 ureg_MOV( ureg
, face_temp
, face_input
);
863 /* Use face_temp as face input from here on:
865 t
->inputs
[t
->inputMapping
[FRAG_ATTRIB_FACE
]] = ureg_src(face_temp
);
870 emit_edgeflags( struct st_translate
*t
,
871 const struct gl_program
*program
)
873 struct ureg_program
*ureg
= t
->ureg
;
874 struct ureg_dst edge_dst
= t
->outputs
[t
->outputMapping
[VERT_RESULT_EDGE
]];
875 struct ureg_src edge_src
= t
->inputs
[t
->inputMapping
[VERT_ATTRIB_EDGEFLAG
]];
877 ureg_MOV( ureg
, edge_dst
, edge_src
);
882 * Translate Mesa program to TGSI format.
883 * \param program the program to translate
884 * \param numInputs number of input registers used
885 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
887 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
888 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
890 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
891 * \param numOutputs number of output registers used
892 * \param outputMapping maps Mesa fragment program outputs to TGSI
894 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
895 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
898 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
901 st_translate_mesa_program(
904 struct ureg_program
*ureg
,
905 const struct gl_program
*program
,
907 const GLuint inputMapping
[],
908 const ubyte inputSemanticName
[],
909 const ubyte inputSemanticIndex
[],
910 const GLuint interpMode
[],
912 const GLuint outputMapping
[],
913 const ubyte outputSemanticName
[],
914 const ubyte outputSemanticIndex
[],
915 boolean passthrough_edgeflags
)
917 struct st_translate translate
, *t
;
919 enum pipe_error ret
= PIPE_OK
;
922 memset(t
, 0, sizeof *t
);
924 t
->procType
= procType
;
925 t
->inputMapping
= inputMapping
;
926 t
->outputMapping
= outputMapping
;
928 t
->pointSizeOutIndex
= -1;
929 t
->prevInstWrotePointSize
= GL_FALSE
;
931 /*_mesa_print_program(program);*/
934 * Declare input attributes.
936 if (procType
== TGSI_PROCESSOR_FRAGMENT
) {
937 for (i
= 0; i
< numInputs
; i
++) {
938 if (program
->InputFlags
[0] & PROG_PARAM_BIT_CYL_WRAP
) {
939 t
->inputs
[i
] = ureg_DECL_fs_input_cyl(ureg
,
940 inputSemanticName
[i
],
941 inputSemanticIndex
[i
],
943 TGSI_CYLINDRICAL_WRAP_X
);
946 t
->inputs
[i
] = ureg_DECL_fs_input(ureg
,
947 inputSemanticName
[i
],
948 inputSemanticIndex
[i
],
953 if (program
->InputsRead
& FRAG_BIT_WPOS
) {
954 /* Must do this after setting up t->inputs, and before
955 * emitting constant references, below:
957 emit_wpos(st_context(ctx
), t
, program
, ureg
);
960 if (program
->InputsRead
& FRAG_BIT_FACE
) {
961 emit_face_var( t
, program
);
965 * Declare output attributes.
967 for (i
= 0; i
< numOutputs
; i
++) {
968 switch (outputSemanticName
[i
]) {
969 case TGSI_SEMANTIC_POSITION
:
970 t
->outputs
[i
] = ureg_DECL_output( ureg
,
971 TGSI_SEMANTIC_POSITION
, /* Z / Depth */
972 outputSemanticIndex
[i
] );
974 t
->outputs
[i
] = ureg_writemask( t
->outputs
[i
],
977 case TGSI_SEMANTIC_COLOR
:
978 t
->outputs
[i
] = ureg_DECL_output( ureg
,
980 outputSemanticIndex
[i
] );
989 for (i
= 0; i
< numInputs
; i
++) {
990 t
->inputs
[i
] = ureg_DECL_vs_input(ureg
, i
);
993 for (i
= 0; i
< numOutputs
; i
++) {
994 t
->outputs
[i
] = ureg_DECL_output( ureg
,
995 outputSemanticName
[i
],
996 outputSemanticIndex
[i
] );
997 if ((outputSemanticName
[i
] == TGSI_SEMANTIC_PSIZE
) && program
->Id
) {
998 /* Writing to the point size result register requires special
999 * handling to implement clamping.
1001 static const gl_state_index pointSizeClampState
[STATE_LENGTH
]
1002 = { STATE_INTERNAL
, STATE_POINT_SIZE_IMPL_CLAMP
, 0, 0, 0 };
1003 /* XXX: note we are modifying the incoming shader here! Need to
1004 * do this before emitting the constant decls below, or this
1007 unsigned pointSizeClampConst
=
1008 _mesa_add_state_reference(program
->Parameters
,
1009 pointSizeClampState
);
1010 struct ureg_dst psizregtemp
= ureg_DECL_temporary( ureg
);
1011 t
->pointSizeConst
= ureg_DECL_constant( ureg
, pointSizeClampConst
);
1012 t
->pointSizeResult
= t
->outputs
[i
];
1013 t
->pointSizeOutIndex
= i
;
1014 t
->outputs
[i
] = psizregtemp
;
1017 if (passthrough_edgeflags
)
1018 emit_edgeflags( t
, program
);
1021 /* Declare address register.
1023 if (program
->NumAddressRegs
> 0) {
1024 debug_assert( program
->NumAddressRegs
== 1 );
1025 t
->address
[0] = ureg_DECL_address( ureg
);
1028 /* Emit constants and immediates. Mesa uses a single index space
1029 * for these, so we put all the translated regs in t->constants.
1031 if (program
->Parameters
) {
1032 t
->constants
= CALLOC( program
->Parameters
->NumParameters
,
1033 sizeof t
->constants
[0] );
1034 if (t
->constants
== NULL
) {
1035 ret
= PIPE_ERROR_OUT_OF_MEMORY
;
1039 for (i
= 0; i
< program
->Parameters
->NumParameters
; i
++) {
1040 switch (program
->Parameters
->Parameters
[i
].Type
) {
1041 case PROGRAM_ENV_PARAM
:
1042 case PROGRAM_LOCAL_PARAM
:
1043 case PROGRAM_STATE_VAR
:
1044 case PROGRAM_NAMED_PARAM
:
1045 case PROGRAM_UNIFORM
:
1046 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1049 /* Emit immediates only when there is no address register
1050 * in use. FIXME: Be smarter and recognize param arrays:
1051 * indirect addressing is only valid within the referenced
1054 case PROGRAM_CONSTANT
:
1055 if (program
->NumAddressRegs
> 0)
1056 t
->constants
[i
] = ureg_DECL_constant( ureg
, i
);
1059 ureg_DECL_immediate( ureg
,
1060 program
->Parameters
->ParameterValues
[i
],
1069 /* texture samplers */
1070 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; i
++) {
1071 if (program
->SamplersUsed
& (1 << i
)) {
1072 t
->samplers
[i
] = ureg_DECL_sampler( ureg
, i
);
1076 /* Emit each instruction in turn:
1078 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1079 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1080 compile_instruction( t
, &program
->Instructions
[i
] );
1082 if (t
->prevInstWrotePointSize
&& program
->Id
) {
1083 /* The previous instruction wrote to the (fake) vertex point size
1084 * result register. Now we need to clamp that value to the min/max
1085 * point size range, putting the result into the real point size
1087 * Note that we can't do this easily at the end of program due to
1088 * possible early return.
1090 set_insn_start( t
, ureg_get_instruction_number( ureg
));
1092 ureg_writemask(t
->outputs
[t
->pointSizeOutIndex
], WRITEMASK_X
),
1093 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1094 ureg_swizzle(t
->pointSizeConst
, 1,1,1,1));
1095 ureg_MIN( t
->ureg
, ureg_writemask(t
->pointSizeResult
, WRITEMASK_X
),
1096 ureg_src(t
->outputs
[t
->pointSizeOutIndex
]),
1097 ureg_swizzle(t
->pointSizeConst
, 2,2,2,2));
1099 t
->prevInstWrotePointSize
= GL_FALSE
;
1102 /* Fix up all emitted labels:
1104 for (i
= 0; i
< t
->labels_count
; i
++) {
1105 ureg_fixup_label( ureg
,
1107 t
->insn
[t
->labels
[i
].branch_target
] );
1116 debug_printf("%s: translate error flag set\n", __FUNCTION__
);
1124 * Tokens cannot be free with free otherwise the builtin gallium
1125 * malloc debugging will get confused.
1128 st_free_tokens(const struct tgsi_token
*tokens
)
1130 FREE((void *)tokens
);