src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "compiler/nir/nir_builder.h"
  31
  32 #include "disassemble.h"
  33 #include "bifrost_compile.h"
  34 #include "bifrost_nir.h"
  35 #include "compiler.h"
  36 #include "bi_quirks.h"
  37 #include "bi_print.h"
  38
  39 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  40 static bi_instruction *bi_emit_branch(bi_context *ctx);
  41 static void bi_schedule_barrier(bi_context *ctx);
  42
  43 static void
  44 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  45 {
  46         bi_instruction *branch = bi_emit_branch(ctx);
  47
  48         switch (instr->type) {
  49         case nir_jump_break:
  50                 branch->branch.target = ctx->break_block;
  51                 break;
  52         case nir_jump_continue:
  53                 branch->branch.target = ctx->continue_block;
  54                 break;
  55         default:
  56                 unreachable("Unhandled jump type");
  57         }
  58
  59         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  60 }
  61
  62 /* Gets a bytemask for a complete vecN write */
  63 static unsigned
  64 bi_mask_for_channels_32(unsigned i)
  65 {
  66         return (1 << (4 * i)) - 1;
  67 }
  68
  69 static bi_instruction
  70 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  71 {
  72         bi_instruction load = {
  73                 .type = T,
  74                 .writemask = bi_mask_for_channels_32(instr->num_components),
  75                 .src = { BIR_INDEX_CONSTANT },
  76                 .src_types = { nir_type_uint32 },
  77                 .constant = { .u64 = nir_intrinsic_base(instr) },
  78         };
  79
  80         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  81
  82         if (info->has_dest)
  83                 load.dest = bir_dest_index(&instr->dest);
  84
  85         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  86                 load.dest_type = nir_intrinsic_type(instr);
  87
  88         nir_src *offset = nir_get_io_offset_src(instr);
  89
  90         if (nir_src_is_const(*offset))
  91                 load.constant.u64 += nir_src_as_uint(*offset);
  92         else
  93                 load.src[0] = bir_src_index(offset);
  94
  95         return load;
  96 }
  97
  98 static void
  99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 100 {
 101         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 102         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 103         ins.load_vary.reuse = false; /* TODO */
 104         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 105         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest);
 106
 107         if (nir_src_is_const(*nir_get_io_offset_src(instr))) {
 108                 /* Zero it out for direct */
 109                 ins.src[1] = BIR_INDEX_ZERO;
 110         } else {
 111                 /* R61 contains sample mask stuff, TODO RA XXX */
 112                 ins.src[1] = BIR_INDEX_REGISTER | 61;
 113         }
 114
 115         bi_emit(ctx, ins);
 116 }
 117
 118 static void
 119 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 120 {
 121         if (!ctx->emitted_atest) {
 122                 bi_instruction ins = {
 123                         .type = BI_ATEST,
 124                         .src = {
 125                                 BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 126                                 bir_src_index(&instr->src[0])
 127                         },
 128                         .src_types = {
 129                                 nir_type_uint32,
 130                                 nir_type_float32
 131                         },
 132                         .swizzle = {
 133                                 { 0 },
 134                                 { 3, 0 } /* swizzle out the alpha */
 135                         },
 136                         .dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 137                         .dest_type = nir_type_uint32,
 138                         .writemask = 0xF
 139                 };
 140
 141                 bi_emit(ctx, ins);
 142                 bi_schedule_barrier(ctx);
 143                 ctx->emitted_atest = true;
 144         }
 145
 146         bi_instruction blend = {
 147                 .type = BI_BLEND,
 148                 .blend_location = nir_intrinsic_base(instr),
 149                 .src = {
 150                         bir_src_index(&instr->src[0]),
 151                         BIR_INDEX_REGISTER | 60 /* Can this be arbitrary? */,
 152                 },
 153                 .src_types = {
 154                         nir_type_float32,
 155                         nir_type_uint32
 156                 },
 157                 .swizzle = {
 158                         { 0, 1, 2, 3 },
 159                         { 0 }
 160                 },
 161                 .dest = BIR_INDEX_REGISTER | 48 /* Looks like magic */,
 162                 .dest_type = nir_type_uint32,
 163                 .writemask = 0xF
 164         };
 165
 166         bi_emit(ctx, blend);
 167         bi_schedule_barrier(ctx);
 168 }
 169
 170 static bi_instruction
 171 bi_load_with_r61(enum bi_class T, nir_intrinsic_instr *instr)
 172 {
 173         bi_instruction ld = bi_load(T, instr);
 174         ld.src[1] = BIR_INDEX_REGISTER | 61; /* TODO: RA */
 175         ld.src[2] = BIR_INDEX_REGISTER | 62;
 176         ld.src[3] = 0;
 177         ld.src_types[1] = nir_type_uint32;
 178         ld.src_types[2] = nir_type_uint32;
 179         ld.src_types[3] = nir_intrinsic_type(instr);
 180         return ld;
 181 }
 182
 183 static void
 184 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 185 {
 186         bi_instruction address = bi_load_with_r61(BI_LOAD_VAR_ADDRESS, instr);
 187         address.dest = bi_make_temp(ctx);
 188         address.dest_type = nir_type_uint32;
 189         address.writemask = (1 << 12) - 1;
 190
 191         unsigned nr = nir_intrinsic_src_components(instr, 0);
 192         assert(nir_intrinsic_write_mask(instr) == ((1 << nr) - 1));
 193
 194         bi_instruction st = {
 195                 .type = BI_STORE_VAR,
 196                 .src = {
 197                         bir_src_index(&instr->src[0]),
 198                         address.dest, address.dest, address.dest,
 199                 },
 200                 .src_types = {
 201                         nir_type_uint32,
 202                         nir_type_uint32, nir_type_uint32, nir_type_uint32,
 203                 },
 204                 .swizzle = {
 205                         { 0 },
 206                         { 0 }, { 1 }, { 2}
 207                 },
 208                 .store_channels = nr,
 209         };
 210
 211         for (unsigned i = 0; i < nr; ++i)
 212                 st.swizzle[0][i] = i;
 213
 214         bi_emit(ctx, address);
 215         bi_emit(ctx, st);
 216 }
 217
 218 static void
 219 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 220 {
 221         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 222         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 223
 224         /* TODO: Indirect access, since we need to multiply by the element
 225          * size. I believe we can get this lowering automatically via
 226          * nir_lower_io (as mul instructions) with the proper options, but this
 227          * is TODO */
 228         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 229         ld.constant.u64 += ctx->sysvals.sysval_count;
 230         ld.constant.u64 *= 16;
 231
 232         bi_emit(ctx, ld);
 233 }
 234
 235 static void
 236 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 237                 unsigned nr_components, unsigned offset)
 238 {
 239         nir_dest nir_dest;
 240
 241         /* Figure out which uniform this is */
 242         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 243         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 244
 245         /* Sysvals are prefix uniforms */
 246         unsigned uniform = ((uintptr_t) val) - 1;
 247
 248         /* Emit the read itself -- this is never indirect */
 249
 250         bi_instruction load = {
 251                 .type = BI_LOAD_UNIFORM,
 252                 .writemask = (1 << (nr_components * 4)) - 1,
 253                 .src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
 254                 .src_types = { nir_type_uint32, nir_type_uint32 },
 255                 .constant = { (uniform * 16) + offset },
 256                 .dest = bir_dest_index(&nir_dest),
 257                 .dest_type = nir_type_uint32, /* TODO */
 258         };
 259
 260         bi_emit(ctx, load);
 261 }
 262
 263 static void
 264 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 265 {
 266
 267         switch (instr->intrinsic) {
 268         case nir_intrinsic_load_barycentric_pixel:
 269                 /* stub */
 270                 break;
 271         case nir_intrinsic_load_interpolated_input:
 272         case nir_intrinsic_load_input:
 273                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 274                         bi_emit_ld_vary(ctx, instr);
 275                 else if (ctx->stage == MESA_SHADER_VERTEX)
 276                         bi_emit(ctx, bi_load_with_r61(BI_LOAD_ATTR, instr));
 277                 else {
 278                         unreachable("Unsupported shader stage");
 279                 }
 280                 break;
 281
 282         case nir_intrinsic_store_output:
 283                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 284                         bi_emit_frag_out(ctx, instr);
 285                 else if (ctx->stage == MESA_SHADER_VERTEX)
 286                         bi_emit_st_vary(ctx, instr);
 287                 else
 288                         unreachable("Unsupported shader stage");
 289                 break;
 290
 291         case nir_intrinsic_load_uniform:
 292                 bi_emit_ld_uniform(ctx, instr);
 293                 break;
 294
 295         case nir_intrinsic_load_ssbo_address:
 296                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 297                 break;
 298
 299         case nir_intrinsic_get_buffer_size:
 300                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 301                 break;
 302
 303         case nir_intrinsic_load_viewport_scale:
 304         case nir_intrinsic_load_viewport_offset:
 305         case nir_intrinsic_load_num_work_groups:
 306         case nir_intrinsic_load_sampler_lod_parameters_pan:
 307                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 308                 break;
 309
 310         default:
 311                 /* todo */
 312                 break;
 313         }
 314 }
 315
 316 static void
 317 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 318 {
 319         /* Make sure we've been lowered */
 320         assert(instr->def.num_components == 1);
 321
 322         bi_instruction move = {
 323                 .type = BI_MOV,
 324                 .dest = bir_ssa_index(&instr->def),
 325                 .dest_type = instr->def.bit_size | nir_type_uint,
 326                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 327                 .src = {
 328                         BIR_INDEX_CONSTANT
 329                 },
 330                 .src_types = {
 331                         instr->def.bit_size | nir_type_uint,
 332                 },
 333                 .constant = {
 334                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 335                 }
 336         };
 337
 338         bi_emit(ctx, move);
 339 }
 340
 341 #define BI_CASE_CMP(op) \
 342         case op##8: \
 343         case op##16: \
 344         case op##32: \
 345
 346 static enum bi_class
 347 bi_class_for_nir_alu(nir_op op)
 348 {
 349         switch (op) {
 350         case nir_op_iadd:
 351         case nir_op_fadd:
 352         case nir_op_fsub:
 353                 return BI_ADD;
 354         case nir_op_isub:
 355                 return BI_ISUB;
 356
 357         BI_CASE_CMP(nir_op_flt)
 358         BI_CASE_CMP(nir_op_fge)
 359         BI_CASE_CMP(nir_op_feq)
 360         BI_CASE_CMP(nir_op_fne)
 361         BI_CASE_CMP(nir_op_ilt)
 362         BI_CASE_CMP(nir_op_ige)
 363         BI_CASE_CMP(nir_op_ieq)
 364         BI_CASE_CMP(nir_op_ine)
 365                 return BI_CMP;
 366
 367         case nir_op_b8csel:
 368         case nir_op_b16csel:
 369         case nir_op_b32csel:
 370                 return BI_CSEL;
 371
 372         case nir_op_i2i8:
 373         case nir_op_i2i16:
 374         case nir_op_i2i32:
 375         case nir_op_i2i64:
 376         case nir_op_u2u8:
 377         case nir_op_u2u16:
 378         case nir_op_u2u32:
 379         case nir_op_u2u64:
 380         case nir_op_f2i16:
 381         case nir_op_f2i32:
 382         case nir_op_f2i64:
 383         case nir_op_f2u16:
 384         case nir_op_f2u32:
 385         case nir_op_f2u64:
 386         case nir_op_i2f16:
 387         case nir_op_i2f32:
 388         case nir_op_i2f64:
 389         case nir_op_u2f16:
 390         case nir_op_u2f32:
 391         case nir_op_u2f64:
 392         case nir_op_f2f16:
 393         case nir_op_f2f32:
 394         case nir_op_f2f64:
 395         case nir_op_f2fmp:
 396                 return BI_CONVERT;
 397
 398         case nir_op_vec2:
 399         case nir_op_vec3:
 400         case nir_op_vec4:
 401                 return BI_COMBINE;
 402
 403         case nir_op_vec8:
 404         case nir_op_vec16:
 405                 unreachable("should've been lowered");
 406
 407         case nir_op_ffma:
 408         case nir_op_fmul:
 409                 return BI_FMA;
 410
 411         case nir_op_imin:
 412         case nir_op_imax:
 413         case nir_op_umin:
 414         case nir_op_umax:
 415         case nir_op_fmin:
 416         case nir_op_fmax:
 417                 return BI_MINMAX;
 418
 419         case nir_op_fsat:
 420         case nir_op_fneg:
 421         case nir_op_fabs:
 422                 return BI_FMOV;
 423         case nir_op_mov:
 424                 return BI_MOV;
 425
 426         case nir_op_fround_even:
 427         case nir_op_fceil:
 428         case nir_op_ffloor:
 429         case nir_op_ftrunc:
 430                 return BI_ROUND;
 431
 432         case nir_op_frcp:
 433         case nir_op_frsq:
 434                 return BI_SPECIAL;
 435
 436         default:
 437                 unreachable("Unknown ALU op");
 438         }
 439 }
 440
 441 /* Gets a bi_cond for a given NIR comparison opcode. In soft mode, it will
 442  * return BI_COND_ALWAYS as a sentinel if it fails to do so (when used for
 443  * optimizations). Otherwise it will bail (when used for primary code
 444  * generation). */
 445
 446 static enum bi_cond
 447 bi_cond_for_nir(nir_op op, bool soft)
 448 {
 449         switch (op) {
 450         BI_CASE_CMP(nir_op_flt)
 451         BI_CASE_CMP(nir_op_ilt)
 452                 return BI_COND_LT;
 453
 454         BI_CASE_CMP(nir_op_fge)
 455         BI_CASE_CMP(nir_op_ige)
 456                 return BI_COND_GE;
 457
 458         BI_CASE_CMP(nir_op_feq)
 459         BI_CASE_CMP(nir_op_ieq)
 460                 return BI_COND_EQ;
 461
 462         BI_CASE_CMP(nir_op_fne)
 463         BI_CASE_CMP(nir_op_ine)
 464                 return BI_COND_NE;
 465         default:
 466                 if (soft)
 467                         return BI_COND_ALWAYS;
 468                 else
 469                         unreachable("Invalid compare");
 470         }
 471 }
 472
 473 static void
 474 bi_copy_src(bi_instruction *alu, nir_alu_instr *instr, unsigned i, unsigned to,
 475                 unsigned *constants_left, unsigned *constant_shift)
 476 {
 477         unsigned bits = nir_src_bit_size(instr->src[i].src);
 478         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 479
 480         alu->src_types[to] = nir_op_infos[instr->op].input_types[i]
 481                 | bits;
 482
 483         /* Try to inline a constant */
 484         if (nir_src_is_const(instr->src[i].src) && *constants_left && (dest_bits == bits)) {
 485                 uint64_t mask = (1ull << dest_bits) - 1;
 486                 uint64_t cons = nir_src_as_uint(instr->src[i].src);
 487
 488                 /* Try to reuse a constant */
 489                 for (unsigned i = 0; i < (*constant_shift); i += dest_bits) {
 490                         if (((alu->constant.u64 >> i) & mask) == cons) {
 491                                 alu->src[to] = BIR_INDEX_CONSTANT | i;
 492                                 return;
 493                         }
 494                 }
 495
 496                 alu->constant.u64 |= cons << *constant_shift;
 497                 alu->src[to] = BIR_INDEX_CONSTANT | (*constant_shift);
 498                 --(*constants_left);
 499                 (*constant_shift) += MAX2(dest_bits, 32); /* lo/hi */
 500                 return;
 501         }
 502
 503         alu->src[to] = bir_src_index(&instr->src[i].src);
 504
 505         /* We assert scalarization above */
 506         alu->swizzle[to][0] = instr->src[i].swizzle[0];
 507 }
 508
 509 static void
 510 bi_fuse_csel_cond(bi_instruction *csel, nir_alu_src cond,
 511                 unsigned *constants_left, unsigned *constant_shift)
 512 {
 513         /* Bail for vector weirdness */
 514         if (cond.swizzle[0] != 0)
 515                 return;
 516
 517         if (!cond.src.is_ssa)
 518                 return;
 519
 520         nir_ssa_def *def = cond.src.ssa;
 521         nir_instr *parent = def->parent_instr;
 522
 523         if (parent->type != nir_instr_type_alu)
 524                 return;
 525
 526         nir_alu_instr *alu = nir_instr_as_alu(parent);
 527
 528         /* Try to match a condition */
 529         enum bi_cond bcond = bi_cond_for_nir(alu->op, true);
 530
 531         if (bcond == BI_COND_ALWAYS)
 532                 return;
 533
 534         /* We found one, let's fuse it in */
 535         csel->csel_cond = bcond;
 536         bi_copy_src(csel, alu, 0, 0, constants_left, constant_shift);
 537         bi_copy_src(csel, alu, 1, 1, constants_left, constant_shift);
 538 }
 539
 540 static void
 541 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 542 {
 543         /* Try some special functions */
 544         switch (instr->op) {
 545         case nir_op_fexp2:
 546                 bi_emit_fexp2(ctx, instr);
 547                 return;
 548         case nir_op_flog2:
 549                 bi_emit_flog2(ctx, instr);
 550                 return;
 551         default:
 552                 break;
 553         }
 554
 555         /* Otherwise, assume it's something we can handle normally */
 556         bi_instruction alu = {
 557                 .type = bi_class_for_nir_alu(instr->op),
 558                 .dest = bir_dest_index(&instr->dest.dest),
 559                 .dest_type = nir_op_infos[instr->op].output_type
 560                         | nir_dest_bit_size(instr->dest.dest),
 561         };
 562
 563         /* TODO: Implement lowering of special functions for older Bifrost */
 564         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 565
 566         if (instr->dest.dest.is_ssa) {
 567                 /* Construct a writemask */
 568                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 569                 unsigned comps = instr->dest.dest.ssa.num_components;
 570
 571                 if (alu.type != BI_COMBINE)
 572                         assert(comps == 1);
 573
 574                 unsigned bits = bits_per_comp * comps;
 575                 unsigned bytes = bits / 8;
 576                 alu.writemask = (1 << bytes) - 1;
 577         } else {
 578                 unsigned comp_mask = instr->dest.write_mask;
 579
 580                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 581                                 comp_mask);
 582         }
 583
 584         /* We inline constants as we go. This tracks how many constants have
 585          * been inlined, since we're limited to 64-bits of constants per
 586          * instruction */
 587
 588         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 589         unsigned constants_left = (64 / dest_bits);
 590         unsigned constant_shift = 0;
 591
 592         if (alu.type == BI_COMBINE)
 593                 constants_left = 0;
 594
 595         /* Copy sources */
 596
 597         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 598         assert(num_inputs <= ARRAY_SIZE(alu.src));
 599
 600         for (unsigned i = 0; i < num_inputs; ++i) {
 601                 unsigned f = 0;
 602
 603                 if (i && alu.type == BI_CSEL)
 604                         f++;
 605
 606                 bi_copy_src(&alu, instr, i, i + f, &constants_left, &constant_shift);
 607         }
 608
 609         /* Op-specific fixup */
 610         switch (instr->op) {
 611         case nir_op_fmul:
 612                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 613                 alu.src_types[2] = alu.src_types[1];
 614                 break;
 615         case nir_op_fsat:
 616                 alu.outmod = BIFROST_SAT; /* FMOV */
 617                 break;
 618         case nir_op_fneg:
 619                 alu.src_neg[0] = true; /* FMOV */
 620                 break;
 621         case nir_op_fabs:
 622                 alu.src_abs[0] = true; /* FMOV */
 623                 break;
 624         case nir_op_fsub:
 625                 alu.src_neg[1] = true; /* FADD */
 626                 break;
 627         case nir_op_fmax:
 628         case nir_op_imax:
 629         case nir_op_umax:
 630                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 631                 break;
 632         case nir_op_frcp:
 633                 alu.op.special = BI_SPECIAL_FRCP;
 634                 break;
 635         case nir_op_frsq:
 636                 alu.op.special = BI_SPECIAL_FRSQ;
 637                 break;
 638         BI_CASE_CMP(nir_op_flt)
 639         BI_CASE_CMP(nir_op_ilt)
 640         BI_CASE_CMP(nir_op_fge)
 641         BI_CASE_CMP(nir_op_ige)
 642         BI_CASE_CMP(nir_op_feq)
 643         BI_CASE_CMP(nir_op_ieq)
 644         BI_CASE_CMP(nir_op_fne)
 645         BI_CASE_CMP(nir_op_ine)
 646                 alu.op.compare = bi_cond_for_nir(instr->op, false);
 647                 break;
 648         case nir_op_fround_even:
 649                 alu.op.round = BI_ROUND_MODE;
 650                 alu.roundmode = BIFROST_RTE;
 651                 break;
 652         case nir_op_fceil:
 653                 alu.op.round = BI_ROUND_MODE;
 654                 alu.roundmode = BIFROST_RTP;
 655                 break;
 656         case nir_op_ffloor:
 657                 alu.op.round = BI_ROUND_MODE;
 658                 alu.roundmode = BIFROST_RTN;
 659                 break;
 660         case nir_op_ftrunc:
 661                 alu.op.round = BI_ROUND_MODE;
 662                 alu.roundmode = BIFROST_RTZ;
 663                 break;
 664         default:
 665                 break;
 666         }
 667
 668         if (alu.type == BI_CSEL) {
 669                 /* Default to csel3 */
 670                 alu.csel_cond = BI_COND_NE;
 671                 alu.src[1] = BIR_INDEX_ZERO;
 672                 alu.src_types[1] = alu.src_types[0];
 673
 674                 bi_fuse_csel_cond(&alu, instr->src[0],
 675                                 &constants_left, &constant_shift);
 676         }
 677
 678         bi_emit(ctx, alu);
 679 }
 680
 681 static void
 682 emit_instr(bi_context *ctx, struct nir_instr *instr)
 683 {
 684         switch (instr->type) {
 685         case nir_instr_type_load_const:
 686                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 687                 break;
 688
 689         case nir_instr_type_intrinsic:
 690                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 691                 break;
 692
 693         case nir_instr_type_alu:
 694                 emit_alu(ctx, nir_instr_as_alu(instr));
 695                 break;
 696
 697 #if 0
 698         case nir_instr_type_tex:
 699                 emit_tex(ctx, nir_instr_as_tex(instr));
 700                 break;
 701 #endif
 702
 703         case nir_instr_type_jump:
 704                 emit_jump(ctx, nir_instr_as_jump(instr));
 705                 break;
 706
 707         case nir_instr_type_ssa_undef:
 708                 /* Spurious */
 709                 break;
 710
 711         default:
 712                 //unreachable("Unhandled instruction type");
 713                 break;
 714         }
 715 }
 716
 717
 718
 719 static bi_block *
 720 create_empty_block(bi_context *ctx)
 721 {
 722         bi_block *blk = rzalloc(ctx, bi_block);
 723
 724         blk->base.predecessors = _mesa_set_create(blk,
 725                         _mesa_hash_pointer,
 726                         _mesa_key_pointer_equal);
 727
 728         blk->base.name = ctx->block_name_count++;
 729
 730         return blk;
 731 }
 732
 733 static void
 734 bi_schedule_barrier(bi_context *ctx)
 735 {
 736         bi_block *temp = ctx->after_block;
 737         ctx->after_block = create_empty_block(ctx);
 738         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 739         list_inithead(&ctx->after_block->base.instructions);
 740         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 741         ctx->current_block = ctx->after_block;
 742         ctx->after_block = temp;
 743 }
 744
 745 static bi_block *
 746 emit_block(bi_context *ctx, nir_block *block)
 747 {
 748         if (ctx->after_block) {
 749                 ctx->current_block = ctx->after_block;
 750                 ctx->after_block = NULL;
 751         } else {
 752                 ctx->current_block = create_empty_block(ctx);
 753         }
 754
 755         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 756         list_inithead(&ctx->current_block->base.instructions);
 757
 758         nir_foreach_instr(instr, block) {
 759                 emit_instr(ctx, instr);
 760                 ++ctx->instruction_count;
 761         }
 762
 763         return ctx->current_block;
 764 }
 765
 766 /* Emits an unconditional branch to the end of the current block, returning a
 767  * pointer so the user can fill in details */
 768
 769 static bi_instruction *
 770 bi_emit_branch(bi_context *ctx)
 771 {
 772         bi_instruction branch = {
 773                 .type = BI_BRANCH,
 774                 .branch = {
 775                         .cond = BI_COND_ALWAYS
 776                 }
 777         };
 778
 779         return bi_emit(ctx, branch);
 780 }
 781
 782 /* Sets a condition for a branch by examing the NIR condition. If we're
 783  * familiar with the condition, we unwrap it to fold it into the branch
 784  * instruction. Otherwise, we consume the condition directly. We
 785  * generally use 1-bit booleans which allows us to use small types for
 786  * the conditions.
 787  */
 788
 789 static void
 790 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 791 {
 792         /* TODO: Try to unwrap instead of always bailing */
 793         branch->src[0] = bir_src_index(cond);
 794         branch->src[1] = BIR_INDEX_ZERO;
 795         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 796         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 797 }
 798
 799 static void
 800 emit_if(bi_context *ctx, nir_if *nif)
 801 {
 802         bi_block *before_block = ctx->current_block;
 803
 804         /* Speculatively emit the branch, but we can't fill it in until later */
 805         bi_instruction *then_branch = bi_emit_branch(ctx);
 806         bi_set_branch_cond(then_branch, &nif->condition, true);
 807
 808         /* Emit the two subblocks. */
 809         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 810         bi_block *end_then_block = ctx->current_block;
 811
 812         /* Emit a jump from the end of the then block to the end of the else */
 813         bi_instruction *then_exit = bi_emit_branch(ctx);
 814
 815         /* Emit second block, and check if it's empty */
 816
 817         int count_in = ctx->instruction_count;
 818         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 819         bi_block *end_else_block = ctx->current_block;
 820         ctx->after_block = create_empty_block(ctx);
 821
 822         /* Now that we have the subblocks emitted, fix up the branches */
 823
 824         assert(then_block);
 825         assert(else_block);
 826
 827         if (ctx->instruction_count == count_in) {
 828                 /* The else block is empty, so don't emit an exit jump */
 829                 bi_remove_instruction(then_exit);
 830                 then_branch->branch.target = ctx->after_block;
 831         } else {
 832                 then_branch->branch.target = else_block;
 833                 then_exit->branch.target = ctx->after_block;
 834                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 835         }
 836
 837         /* Wire up the successors */
 838
 839         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 840
 841         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 842         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 843 }
 844
 845 static void
 846 emit_loop(bi_context *ctx, nir_loop *nloop)
 847 {
 848         /* Remember where we are */
 849         bi_block *start_block = ctx->current_block;
 850
 851         bi_block *saved_break = ctx->break_block;
 852         bi_block *saved_continue = ctx->continue_block;
 853
 854         ctx->continue_block = create_empty_block(ctx);
 855         ctx->break_block = create_empty_block(ctx);
 856         ctx->after_block = ctx->continue_block;
 857
 858         /* Emit the body itself */
 859         emit_cf_list(ctx, &nloop->body);
 860
 861         /* Branch back to loop back */
 862         bi_instruction *br_back = bi_emit_branch(ctx);
 863         br_back->branch.target = ctx->continue_block;
 864         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 865         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 866
 867         ctx->after_block = ctx->break_block;
 868
 869         /* Pop off */
 870         ctx->break_block = saved_break;
 871         ctx->continue_block = saved_continue;
 872         ++ctx->loop_count;
 873 }
 874
 875 static bi_block *
 876 emit_cf_list(bi_context *ctx, struct exec_list *list)
 877 {
 878         bi_block *start_block = NULL;
 879
 880         foreach_list_typed(nir_cf_node, node, node, list) {
 881                 switch (node->type) {
 882                 case nir_cf_node_block: {
 883                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 884
 885                         if (!start_block)
 886                                 start_block = block;
 887
 888                         break;
 889                 }
 890
 891                 case nir_cf_node_if:
 892                         emit_if(ctx, nir_cf_node_as_if(node));
 893                         break;
 894
 895                 case nir_cf_node_loop:
 896                         emit_loop(ctx, nir_cf_node_as_loop(node));
 897                         break;
 898
 899                 default:
 900                         unreachable("Unknown control flow");
 901                 }
 902         }
 903
 904         return start_block;
 905 }
 906
 907 static int
 908 glsl_type_size(const struct glsl_type *type, bool bindless)
 909 {
 910         return glsl_count_attribute_slots(type, false);
 911 }
 912
 913 static void
 914 bi_optimize_nir(nir_shader *nir)
 915 {
 916         bool progress;
 917         unsigned lower_flrp = 16 | 32 | 64;
 918
 919         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 920         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 921
 922         nir_lower_tex_options lower_tex_options = {
 923                 .lower_txs_lod = true,
 924                 .lower_txp = ~0,
 925                 .lower_tex_without_implicit_lod = true,
 926                 .lower_txd = true,
 927         };
 928
 929         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 930         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 931         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 932
 933         do {
 934                 progress = false;
 935
 936                 NIR_PASS(progress, nir, nir_lower_var_copies);
 937                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 938
 939                 NIR_PASS(progress, nir, nir_copy_prop);
 940                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 941                 NIR_PASS(progress, nir, nir_opt_dce);
 942                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 943                 NIR_PASS(progress, nir, nir_opt_cse);
 944                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 945                 NIR_PASS(progress, nir, nir_opt_algebraic);
 946                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 947
 948                 if (lower_flrp != 0) {
 949                         bool lower_flrp_progress = false;
 950                         NIR_PASS(lower_flrp_progress,
 951                                  nir,
 952                                  nir_lower_flrp,
 953                                  lower_flrp,
 954                                  false /* always_precise */,
 955                                  nir->options->lower_ffma);
 956                         if (lower_flrp_progress) {
 957                                 NIR_PASS(progress, nir,
 958                                          nir_opt_constant_folding);
 959                                 progress = true;
 960                         }
 961
 962                         /* Nothing should rematerialize any flrps, so we only
 963                          * need to do this lowering once.
 964                          */
 965                         lower_flrp = 0;
 966                 }
 967
 968                 NIR_PASS(progress, nir, nir_opt_undef);
 969                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 970                          nir_var_shader_in |
 971                          nir_var_shader_out |
 972                          nir_var_function_temp);
 973         } while (progress);
 974
 975         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 976         NIR_PASS(progress, nir, nir_lower_bool_to_int32);
 977         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 978         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 979         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 980
 981         /* Take us out of SSA */
 982         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 983         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 984         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 985 }
 986
 987 void
 988 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 989 {
 990         bi_context *ctx = rzalloc(NULL, bi_context);
 991         ctx->nir = nir;
 992         ctx->stage = nir->info.stage;
 993         ctx->quirks = bifrost_get_quirks(product_id);
 994         list_inithead(&ctx->blocks);
 995
 996         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 997          * (so we don't accidentally duplicate the epilogue since mesa/st has
 998          * messed with our I/O quite a bit already) */
 999
1000         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1001
1002         if (ctx->stage == MESA_SHADER_VERTEX) {
1003                 NIR_PASS_V(nir, nir_lower_viewport_transform);
1004                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
1005         }
1006
1007         NIR_PASS_V(nir, nir_split_var_copies);
1008         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
1009         NIR_PASS_V(nir, nir_lower_var_copies);
1010         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1011         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
1012         NIR_PASS_V(nir, nir_lower_ssbo);
1013
1014         bi_optimize_nir(nir);
1015         nir_print_shader(nir, stdout);
1016
1017         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
1018         program->sysval_count = ctx->sysvals.sysval_count;
1019         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
1020
1021         nir_foreach_function(func, nir) {
1022                 if (!func->impl)
1023                         continue;
1024
1025                 ctx->impl = func->impl;
1026                 emit_cf_list(ctx, &func->impl->body);
1027                 break; /* TODO: Multi-function shaders */
1028         }
1029
1030         bi_foreach_block(ctx, _block) {
1031                 bi_block *block = (bi_block *) _block;
1032                 bi_lower_combine(ctx, block);
1033         }
1034
1035         bool progress = false;
1036
1037         do {
1038                 progress = false;
1039
1040                 bi_foreach_block(ctx, _block) {
1041                         bi_block *block = (bi_block *) _block;
1042                         progress |= bi_opt_dead_code_eliminate(ctx, block);
1043                 }
1044         } while(progress);
1045
1046         bi_print_shader(ctx, stdout);
1047         bi_schedule(ctx);
1048         bi_register_allocate(ctx);
1049         bi_print_shader(ctx, stdout);
1050         bi_pack(ctx, &program->compiled);
1051         disassemble_bifrost(stdout, program->compiled.data, program->compiled.size, true);
1052
1053         ralloc_free(ctx);
1054 }