src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "main/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_schedule_barrier(bi_context *ctx);
  43
  44 static void
  45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  46 {
  47         bi_instruction *branch = bi_emit_branch(ctx);
  48
  49         switch (instr->type) {
  50         case nir_jump_break:
  51                 branch->branch.target = ctx->break_block;
  52                 break;
  53         case nir_jump_continue:
  54                 branch->branch.target = ctx->continue_block;
  55                 break;
  56         default:
  57                 unreachable("Unhandled jump type");
  58         }
  59
  60         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  61 }
  62
  63 /* Gets a bytemask for a complete vecN write */
  64 static unsigned
  65 bi_mask_for_channels_32(unsigned i)
  66 {
  67         return (1 << (4 * i)) - 1;
  68 }
  69
  70 static bi_instruction
  71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  72 {
  73         bi_instruction load = {
  74                 .type = T,
  75                 .writemask = bi_mask_for_channels_32(instr->num_components),
  76                 .src = { BIR_INDEX_CONSTANT },
  77                 .constant = { .u64 = nir_intrinsic_base(instr) },
  78         };
  79
  80         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  81
  82         if (info->has_dest)
  83                 load.dest = bir_dest_index(&instr->dest);
  84
  85         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  86                 load.dest_type = nir_intrinsic_type(instr);
  87
  88         nir_src *offset = nir_get_io_offset_src(instr);
  89
  90         if (nir_src_is_const(*offset))
  91                 load.constant.u64 += nir_src_as_uint(*offset);
  92         else
  93                 load.src[0] = bir_src_index(offset);
  94
  95         return load;
  96 }
  97
  98 static void
  99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 100 {
 101         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 102         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 103         ins.load_vary.reuse = false; /* TODO */
 104         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 105         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
 106         bi_emit(ctx, ins);
 107 }
 108
 109 static void
 110 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 111 {
 112         if (!ctx->emitted_atest) {
 113                 bi_instruction ins = {
 114                         .type = BI_ATEST
 115                 };
 116
 117                 bi_emit(ctx, ins);
 118                 bi_schedule_barrier(ctx);
 119                 ctx->emitted_atest = true;
 120         }
 121
 122         bi_instruction blend = {
 123                 .type = BI_BLEND,
 124                 .blend_location = nir_intrinsic_base(instr),
 125                 .src = {
 126                         bir_src_index(&instr->src[0])
 127                 },
 128                 .swizzle = {
 129                         { 0, 1, 2, 3 }
 130                 }
 131         };
 132
 133         bi_emit(ctx, blend);
 134         bi_schedule_barrier(ctx);
 135 }
 136
 137 static void
 138 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 139 {
 140         bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
 141         address.dest = bi_make_temp(ctx);
 142         address.dest_type = nir_type_uint64;
 143         address.writemask = (1 << 8) - 1;
 144
 145         bi_instruction st = {
 146                 .type = BI_STORE_VAR,
 147                 .src = {
 148                         address.dest,
 149                         bir_src_index(&instr->src[0])
 150                 },
 151                 .swizzle = {
 152                         { 0 },
 153                         { 0, 1, 2, 3 }
 154                 }
 155         };
 156
 157         bi_emit(ctx, address);
 158         bi_emit(ctx, st);
 159 }
 160
 161 static void
 162 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 163 {
 164         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 165         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 166
 167         /* TODO: Indirect access, since we need to multiply by the element
 168          * size. I believe we can get this lowering automatically via
 169          * nir_lower_io (as mul instructions) with the proper options, but this
 170          * is TODO */
 171         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 172         ld.constant.u64 += ctx->sysvals.sysval_count;
 173         ld.constant.u64 *= 16;
 174
 175         bi_emit(ctx, ld);
 176 }
 177
 178 static void
 179 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 180                 unsigned nr_components, unsigned offset)
 181 {
 182         nir_dest nir_dest;
 183
 184         /* Figure out which uniform this is */
 185         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 186         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 187
 188         /* Sysvals are prefix uniforms */
 189         unsigned uniform = ((uintptr_t) val) - 1;
 190
 191         /* Emit the read itself -- this is never indirect */
 192
 193         bi_instruction load = {
 194                 .type = BI_LOAD_UNIFORM,
 195                 .writemask = (1 << (nr_components * 4)) - 1,
 196                 .src = { BIR_INDEX_CONSTANT},
 197                 .constant = { (uniform * 16) + offset },
 198                 .dest = bir_dest_index(&nir_dest),
 199                 .dest_type = nir_type_uint32, /* TODO */
 200         };
 201
 202         bi_emit(ctx, load);
 203 }
 204
 205 static void
 206 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 207 {
 208
 209         switch (instr->intrinsic) {
 210         case nir_intrinsic_load_barycentric_pixel:
 211                 /* stub */
 212                 break;
 213         case nir_intrinsic_load_interpolated_input:
 214         case nir_intrinsic_load_input:
 215                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 216                         bi_emit_ld_vary(ctx, instr);
 217                 else if (ctx->stage == MESA_SHADER_VERTEX)
 218                         bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
 219                 else {
 220                         unreachable("Unsupported shader stage");
 221                 }
 222                 break;
 223
 224         case nir_intrinsic_store_output:
 225                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 226                         bi_emit_frag_out(ctx, instr);
 227                 else if (ctx->stage == MESA_SHADER_VERTEX)
 228                         bi_emit_st_vary(ctx, instr);
 229                 else
 230                         unreachable("Unsupported shader stage");
 231                 break;
 232
 233         case nir_intrinsic_load_uniform:
 234                 bi_emit_ld_uniform(ctx, instr);
 235                 break;
 236
 237         case nir_intrinsic_load_ssbo_address:
 238                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 239                 break;
 240
 241         case nir_intrinsic_get_buffer_size:
 242                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 243                 break;
 244
 245         case nir_intrinsic_load_viewport_scale:
 246         case nir_intrinsic_load_viewport_offset:
 247         case nir_intrinsic_load_num_work_groups:
 248         case nir_intrinsic_load_sampler_lod_parameters_pan:
 249                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 250                 break;
 251
 252         default:
 253                 /* todo */
 254                 break;
 255         }
 256 }
 257
 258 static void
 259 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 260 {
 261         /* Make sure we've been lowered */
 262         assert(instr->def.num_components == 1);
 263
 264         bi_instruction move = {
 265                 .type = BI_MOV,
 266                 .dest = bir_ssa_index(&instr->def),
 267                 .dest_type = instr->def.bit_size | nir_type_uint,
 268                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 269                 .src = {
 270                         BIR_INDEX_CONSTANT
 271                 },
 272                 .constant = {
 273                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 274                 }
 275         };
 276
 277         bi_emit(ctx, move);
 278 }
 279
 280 static enum bi_class
 281 bi_class_for_nir_alu(nir_op op)
 282 {
 283         switch (op) {
 284         case nir_op_iadd:
 285         case nir_op_fadd:
 286         case nir_op_fsub:
 287                 return BI_ADD;
 288         case nir_op_isub:
 289                 return BI_ISUB;
 290
 291         case nir_op_flt:
 292         case nir_op_fge:
 293         case nir_op_feq:
 294         case nir_op_fne:
 295         case nir_op_ilt:
 296         case nir_op_ige:
 297         case nir_op_ieq:
 298         case nir_op_ine:
 299                 return BI_CMP;
 300
 301         case nir_op_bcsel:
 302                 return BI_CSEL;
 303
 304         case nir_op_i2i8:
 305         case nir_op_i2i16:
 306         case nir_op_i2i32:
 307         case nir_op_i2i64:
 308         case nir_op_u2u8:
 309         case nir_op_u2u16:
 310         case nir_op_u2u32:
 311         case nir_op_u2u64:
 312         case nir_op_f2i16:
 313         case nir_op_f2i32:
 314         case nir_op_f2i64:
 315         case nir_op_f2u16:
 316         case nir_op_f2u32:
 317         case nir_op_f2u64:
 318         case nir_op_i2f16:
 319         case nir_op_i2f32:
 320         case nir_op_i2f64:
 321         case nir_op_u2f16:
 322         case nir_op_u2f32:
 323         case nir_op_u2f64:
 324                 return BI_CONVERT;
 325
 326         case nir_op_ffma:
 327         case nir_op_fmul:
 328                 return BI_FMA;
 329
 330         case nir_op_imin:
 331         case nir_op_imax:
 332         case nir_op_umin:
 333         case nir_op_umax:
 334         case nir_op_fmin:
 335         case nir_op_fmax:
 336                 return BI_MINMAX;
 337
 338         case nir_op_fsat:
 339         case nir_op_fneg:
 340         case nir_op_fabs:
 341         case nir_op_mov:
 342                 return BI_MOV;
 343
 344         case nir_op_frcp:
 345         case nir_op_frsq:
 346         case nir_op_fsin:
 347         case nir_op_fcos:
 348                 return BI_SPECIAL;
 349
 350         default:
 351                 unreachable("Unknown ALU op");
 352         }
 353 }
 354
 355 static enum bi_cond
 356 bi_cond_for_nir(nir_op op)
 357 {
 358         switch (op) {
 359         case nir_op_flt:
 360         case nir_op_ilt:
 361                 return BI_COND_LT;
 362         case nir_op_fge:
 363         case nir_op_ige:
 364                 return BI_COND_GE;
 365         case nir_op_feq:
 366         case nir_op_ieq:
 367                 return BI_COND_EQ;
 368         case nir_op_fne:
 369         case nir_op_ine:
 370                 return BI_COND_NE;
 371         default:
 372                 unreachable("Invalid compare");
 373         }
 374 }
 375
 376 static void
 377 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 378 {
 379         /* Assume it's something we can handle normally */
 380         bi_instruction alu = {
 381                 .type = bi_class_for_nir_alu(instr->op),
 382                 .dest = bir_dest_index(&instr->dest.dest),
 383                 .dest_type = nir_op_infos[instr->op].output_type
 384                         | nir_dest_bit_size(instr->dest.dest),
 385         };
 386
 387         /* TODO: Implement lowering of special functions for older Bifrost */
 388         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 389
 390         if (instr->dest.dest.is_ssa) {
 391                 /* Construct a writemask */
 392                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 393                 unsigned comps = instr->dest.dest.ssa.num_components;
 394                 assert(comps == 1);
 395                 unsigned bits = bits_per_comp * comps;
 396                 unsigned bytes = MAX2(bits / 8, 1);
 397                 alu.writemask = (1 << bytes) - 1;
 398         } else {
 399                 unsigned comp_mask = instr->dest.write_mask;
 400
 401                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 402                                 comp_mask);
 403         }
 404
 405         /* We inline constants as we go. This tracks how many constants have
 406          * been inlined, since we're limited to 64-bits of constants per
 407          * instruction */
 408
 409         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 410         unsigned constants_left = (64 / dest_bits);
 411         unsigned constant_shift = 0;
 412
 413         /* Copy sources */
 414
 415         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 416         assert(num_inputs <= ARRAY_SIZE(alu.src));
 417
 418         for (unsigned i = 0; i < num_inputs; ++i) {
 419                 unsigned bits = nir_src_bit_size(instr->src[i].src);
 420                 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
 421                         | bits;
 422
 423                 /* Try to inline a constant */
 424                 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
 425                         alu.constant.u64 |=
 426                                 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
 427
 428                         alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
 429                         --constants_left;
 430                         constant_shift += dest_bits;
 431                         continue;
 432                 }
 433
 434                 alu.src[i] = bir_src_index(&instr->src[i].src);
 435
 436                 /* We assert scalarization above */
 437                 alu.swizzle[i][0] = instr->src[i].swizzle[0];
 438         }
 439
 440         /* Op-specific fixup */
 441         switch (instr->op) {
 442         case nir_op_fmul:
 443                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 444                 break;
 445         case nir_op_fsat:
 446                 alu.outmod = BIFROST_SAT; /* MOV */
 447                 break;
 448         case nir_op_fneg:
 449                 alu.src_neg[0] = true; /* MOV */
 450                 break;
 451         case nir_op_fabs:
 452                 alu.src_abs[0] = true; /* MOV */
 453                 break;
 454         case nir_op_fsub:
 455                 alu.src_neg[1] = true; /* ADD */
 456                 break;
 457         case nir_op_fmax:
 458         case nir_op_imax:
 459         case nir_op_umax:
 460                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 461                 break;
 462         case nir_op_frcp:
 463                 alu.op.special = BI_SPECIAL_FRCP;
 464                 break;
 465         case nir_op_frsq:
 466                 alu.op.special = BI_SPECIAL_FRSQ;
 467                 break;
 468         case nir_op_fsin:
 469                 alu.op.special = BI_SPECIAL_FSIN;
 470                 break;
 471         case nir_op_fcos:
 472                 alu.op.special = BI_SPECIAL_FCOS;
 473                 break;
 474         case nir_op_flt:
 475         case nir_op_ilt:
 476         case nir_op_fge:
 477         case nir_op_ige:
 478         case nir_op_feq:
 479         case nir_op_ieq:
 480         case nir_op_fne:
 481         case nir_op_ine:
 482                 alu.op.compare = bi_cond_for_nir(instr->op);
 483                 break;
 484         default:
 485                 break;
 486         }
 487
 488         bi_emit(ctx, alu);
 489 }
 490
 491 static void
 492 emit_instr(bi_context *ctx, struct nir_instr *instr)
 493 {
 494         switch (instr->type) {
 495         case nir_instr_type_load_const:
 496                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 497                 break;
 498
 499         case nir_instr_type_intrinsic:
 500                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 501                 break;
 502
 503         case nir_instr_type_alu:
 504                 emit_alu(ctx, nir_instr_as_alu(instr));
 505                 break;
 506
 507 #if 0
 508         case nir_instr_type_tex:
 509                 emit_tex(ctx, nir_instr_as_tex(instr));
 510                 break;
 511 #endif
 512
 513         case nir_instr_type_jump:
 514                 emit_jump(ctx, nir_instr_as_jump(instr));
 515                 break;
 516
 517         case nir_instr_type_ssa_undef:
 518                 /* Spurious */
 519                 break;
 520
 521         default:
 522                 //unreachable("Unhandled instruction type");
 523                 break;
 524         }
 525 }
 526
 527
 528
 529 static bi_block *
 530 create_empty_block(bi_context *ctx)
 531 {
 532         bi_block *blk = rzalloc(ctx, bi_block);
 533
 534         blk->base.predecessors = _mesa_set_create(blk,
 535                         _mesa_hash_pointer,
 536                         _mesa_key_pointer_equal);
 537
 538         blk->base.name = ctx->block_name_count++;
 539
 540         return blk;
 541 }
 542
 543 static void
 544 bi_schedule_barrier(bi_context *ctx)
 545 {
 546         bi_block *temp = ctx->after_block;
 547         ctx->after_block = create_empty_block(ctx);
 548         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 549         list_inithead(&ctx->after_block->base.instructions);
 550         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 551         ctx->current_block = ctx->after_block;
 552         ctx->after_block = temp;
 553 }
 554
 555 static bi_block *
 556 emit_block(bi_context *ctx, nir_block *block)
 557 {
 558         if (ctx->after_block) {
 559                 ctx->current_block = ctx->after_block;
 560                 ctx->after_block = NULL;
 561         } else {
 562                 ctx->current_block = create_empty_block(ctx);
 563         }
 564
 565         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 566         list_inithead(&ctx->current_block->base.instructions);
 567
 568         nir_foreach_instr(instr, block) {
 569                 emit_instr(ctx, instr);
 570                 ++ctx->instruction_count;
 571         }
 572
 573         return ctx->current_block;
 574 }
 575
 576 /* Emits an unconditional branch to the end of the current block, returning a
 577  * pointer so the user can fill in details */
 578
 579 static bi_instruction *
 580 bi_emit_branch(bi_context *ctx)
 581 {
 582         bi_instruction branch = {
 583                 .type = BI_BRANCH,
 584                 .branch = {
 585                         .cond = BI_COND_ALWAYS
 586                 }
 587         };
 588
 589         return bi_emit(ctx, branch);
 590 }
 591
 592 /* Sets a condition for a branch by examing the NIR condition. If we're
 593  * familiar with the condition, we unwrap it to fold it into the branch
 594  * instruction. Otherwise, we consume the condition directly. We
 595  * generally use 1-bit booleans which allows us to use small types for
 596  * the conditions.
 597  */
 598
 599 static void
 600 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 601 {
 602         /* TODO: Try to unwrap instead of always bailing */
 603         branch->src[0] = bir_src_index(cond);
 604         branch->src[1] = BIR_INDEX_ZERO;
 605         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 606         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 607 }
 608
 609 static void
 610 emit_if(bi_context *ctx, nir_if *nif)
 611 {
 612         bi_block *before_block = ctx->current_block;
 613
 614         /* Speculatively emit the branch, but we can't fill it in until later */
 615         bi_instruction *then_branch = bi_emit_branch(ctx);
 616         bi_set_branch_cond(then_branch, &nif->condition, true);
 617
 618         /* Emit the two subblocks. */
 619         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 620         bi_block *end_then_block = ctx->current_block;
 621
 622         /* Emit a jump from the end of the then block to the end of the else */
 623         bi_instruction *then_exit = bi_emit_branch(ctx);
 624
 625         /* Emit second block, and check if it's empty */
 626
 627         int count_in = ctx->instruction_count;
 628         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 629         bi_block *end_else_block = ctx->current_block;
 630         ctx->after_block = create_empty_block(ctx);
 631
 632         /* Now that we have the subblocks emitted, fix up the branches */
 633
 634         assert(then_block);
 635         assert(else_block);
 636
 637         if (ctx->instruction_count == count_in) {
 638                 /* The else block is empty, so don't emit an exit jump */
 639                 bi_remove_instruction(then_exit);
 640                 then_branch->branch.target = ctx->after_block;
 641         } else {
 642                 then_branch->branch.target = else_block;
 643                 then_exit->branch.target = ctx->after_block;
 644                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 645         }
 646
 647         /* Wire up the successors */
 648
 649         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 650
 651         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 652         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 653 }
 654
 655 static void
 656 emit_loop(bi_context *ctx, nir_loop *nloop)
 657 {
 658         /* Remember where we are */
 659         bi_block *start_block = ctx->current_block;
 660
 661         bi_block *saved_break = ctx->break_block;
 662         bi_block *saved_continue = ctx->continue_block;
 663
 664         ctx->continue_block = create_empty_block(ctx);
 665         ctx->break_block = create_empty_block(ctx);
 666         ctx->after_block = ctx->continue_block;
 667
 668         /* Emit the body itself */
 669         emit_cf_list(ctx, &nloop->body);
 670
 671         /* Branch back to loop back */
 672         bi_instruction *br_back = bi_emit_branch(ctx);
 673         br_back->branch.target = ctx->continue_block;
 674         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 675         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 676
 677         ctx->after_block = ctx->break_block;
 678
 679         /* Pop off */
 680         ctx->break_block = saved_break;
 681         ctx->continue_block = saved_continue;
 682         ++ctx->loop_count;
 683 }
 684
 685 static bi_block *
 686 emit_cf_list(bi_context *ctx, struct exec_list *list)
 687 {
 688         bi_block *start_block = NULL;
 689
 690         foreach_list_typed(nir_cf_node, node, node, list) {
 691                 switch (node->type) {
 692                 case nir_cf_node_block: {
 693                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 694
 695                         if (!start_block)
 696                                 start_block = block;
 697
 698                         break;
 699                 }
 700
 701                 case nir_cf_node_if:
 702                         emit_if(ctx, nir_cf_node_as_if(node));
 703                         break;
 704
 705                 case nir_cf_node_loop:
 706                         emit_loop(ctx, nir_cf_node_as_loop(node));
 707                         break;
 708
 709                 default:
 710                         unreachable("Unknown control flow");
 711                 }
 712         }
 713
 714         return start_block;
 715 }
 716
 717 static int
 718 glsl_type_size(const struct glsl_type *type, bool bindless)
 719 {
 720         return glsl_count_attribute_slots(type, false);
 721 }
 722
 723 static void
 724 bi_optimize_nir(nir_shader *nir)
 725 {
 726         bool progress;
 727         unsigned lower_flrp = 16 | 32 | 64;
 728
 729         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 730         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 731
 732         nir_lower_tex_options lower_tex_options = {
 733                 .lower_txs_lod = true,
 734                 .lower_txp = ~0,
 735                 .lower_tex_without_implicit_lod = true,
 736                 .lower_txd = true,
 737         };
 738
 739         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 740         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 741         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 742
 743         do {
 744                 progress = false;
 745
 746                 NIR_PASS(progress, nir, nir_lower_var_copies);
 747                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 748
 749                 NIR_PASS(progress, nir, nir_copy_prop);
 750                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 751                 NIR_PASS(progress, nir, nir_opt_dce);
 752                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 753                 NIR_PASS(progress, nir, nir_opt_cse);
 754                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 755                 NIR_PASS(progress, nir, nir_opt_algebraic);
 756                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 757
 758                 if (lower_flrp != 0) {
 759                         bool lower_flrp_progress = false;
 760                         NIR_PASS(lower_flrp_progress,
 761                                  nir,
 762                                  nir_lower_flrp,
 763                                  lower_flrp,
 764                                  false /* always_precise */,
 765                                  nir->options->lower_ffma);
 766                         if (lower_flrp_progress) {
 767                                 NIR_PASS(progress, nir,
 768                                          nir_opt_constant_folding);
 769                                 progress = true;
 770                         }
 771
 772                         /* Nothing should rematerialize any flrps, so we only
 773                          * need to do this lowering once.
 774                          */
 775                         lower_flrp = 0;
 776                 }
 777
 778                 NIR_PASS(progress, nir, nir_opt_undef);
 779                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 780                          nir_var_shader_in |
 781                          nir_var_shader_out |
 782                          nir_var_function_temp);
 783         } while (progress);
 784
 785         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 786         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 787         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 788         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 789
 790         /* Take us out of SSA */
 791         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 792         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 793
 794         /* We're a primary scalar architecture but there's enough vector that
 795          * we use a vector IR so let's not also deal with scalar hacks on top
 796          * of the vector hacks */
 797
 798         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 799         NIR_PASS(progress, nir, nir_lower_vec_to_movs);
 800         NIR_PASS(progress, nir, nir_opt_dce);
 801 }
 802
 803 void
 804 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 805 {
 806         bi_context *ctx = rzalloc(NULL, bi_context);
 807         ctx->nir = nir;
 808         ctx->stage = nir->info.stage;
 809         ctx->quirks = bifrost_get_quirks(product_id);
 810         list_inithead(&ctx->blocks);
 811
 812         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 813          * (so we don't accidentally duplicate the epilogue since mesa/st has
 814          * messed with our I/O quite a bit already) */
 815
 816         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 817
 818         if (ctx->stage == MESA_SHADER_VERTEX) {
 819                 NIR_PASS_V(nir, nir_lower_viewport_transform);
 820                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
 821         }
 822
 823         NIR_PASS_V(nir, nir_split_var_copies);
 824         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
 825         NIR_PASS_V(nir, nir_lower_var_copies);
 826         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 827         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
 828         NIR_PASS_V(nir, nir_lower_ssbo);
 829
 830         bi_optimize_nir(nir);
 831         nir_print_shader(nir, stdout);
 832
 833         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
 834         program->sysval_count = ctx->sysvals.sysval_count;
 835         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
 836
 837         nir_foreach_function(func, nir) {
 838                 if (!func->impl)
 839                         continue;
 840
 841                 ctx->impl = func->impl;
 842                 emit_cf_list(ctx, &func->impl->body);
 843                 break; /* TODO: Multi-function shaders */
 844         }
 845
 846         bool progress = false;
 847
 848         do {
 849                 progress = false;
 850
 851                 bi_foreach_block(ctx, _block) {
 852                         bi_block *block = (bi_block *) _block;
 853                         progress |= bi_opt_dead_code_eliminate(ctx, block);
 854                 }
 855         } while(progress);
 856
 857         bi_print_shader(ctx, stdout);
 858         bi_schedule(ctx);
 859
 860         ralloc_free(ctx);
 861 }