2 * Copyright (C) 2020 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "bifrost_nir.h"
37 #include "bi_quirks.h"
40 static bi_block
*emit_cf_list(bi_context
*ctx
, struct exec_list
*list
);
41 static bi_instruction
*bi_emit_branch(bi_context
*ctx
);
42 static void bi_schedule_barrier(bi_context
*ctx
);
45 emit_jump(bi_context
*ctx
, nir_jump_instr
*instr
)
47 bi_instruction
*branch
= bi_emit_branch(ctx
);
49 switch (instr
->type
) {
51 branch
->branch
.target
= ctx
->break_block
;
53 case nir_jump_continue
:
54 branch
->branch
.target
= ctx
->continue_block
;
57 unreachable("Unhandled jump type");
60 pan_block_add_successor(&ctx
->current_block
->base
, &branch
->branch
.target
->base
);
63 /* Gets a bytemask for a complete vecN write */
65 bi_mask_for_channels_32(unsigned i
)
67 return (1 << (4 * i
)) - 1;
71 bi_load(enum bi_class T
, nir_intrinsic_instr
*instr
)
73 bi_instruction load
= {
75 .writemask
= bi_mask_for_channels_32(instr
->num_components
),
76 .src
= { BIR_INDEX_CONSTANT
},
77 .constant
= { .u64
= nir_intrinsic_base(instr
) },
80 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[instr
->intrinsic
];
83 load
.dest
= bir_dest_index(&instr
->dest
);
85 if (info
->has_dest
&& info
->index_map
[NIR_INTRINSIC_TYPE
] > 0)
86 load
.dest_type
= nir_intrinsic_type(instr
);
88 nir_src
*offset
= nir_get_io_offset_src(instr
);
90 if (nir_src_is_const(*offset
))
91 load
.constant
.u64
+= nir_src_as_uint(*offset
);
93 load
.src
[0] = bir_src_index(offset
);
99 bi_emit_ld_vary(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
101 bi_instruction ins
= bi_load(BI_LOAD_VAR
, instr
);
102 ins
.load_vary
.interp_mode
= BIFROST_INTERP_DEFAULT
; /* TODO */
103 ins
.load_vary
.reuse
= false; /* TODO */
104 ins
.load_vary
.flat
= instr
->intrinsic
!= nir_intrinsic_load_interpolated_input
;
105 ins
.dest_type
= nir_type_float
| nir_dest_bit_size(instr
->dest
);
107 if (nir_src_is_const(*nir_get_io_offset_src(instr
))) {
108 /* Zero it out for direct */
109 ins
.src
[1] = BIR_INDEX_ZERO
;
111 /* R61 contains sample mask stuff, TODO RA XXX */
112 ins
.src
[1] = BIR_INDEX_REGISTER
| 61;
119 bi_emit_frag_out(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
121 if (!ctx
->emitted_atest
) {
122 bi_instruction ins
= {
125 BIR_INDEX_REGISTER
| 60 /* TODO: RA */,
126 bir_src_index(&instr
->src
[0])
134 { 3, 0 } /* swizzle out the alpha */
136 .dest
= BIR_INDEX_REGISTER
| 60 /* TODO: RA */,
137 .dest_type
= nir_type_uint32
,
142 bi_schedule_barrier(ctx
);
143 ctx
->emitted_atest
= true;
146 bi_instruction blend
= {
148 .blend_location
= nir_intrinsic_base(instr
),
150 BIR_INDEX_REGISTER
| 60 /* Can this be arbitrary? */,
151 bir_src_index(&instr
->src
[0])
161 .dest
= BIR_INDEX_REGISTER
| 48 /* Looks like magic */,
162 .dest_type
= nir_type_uint32
,
167 bi_schedule_barrier(ctx
);
171 bi_emit_st_vary(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
173 bi_instruction address
= bi_load(BI_LOAD_VAR_ADDRESS
, instr
);
174 address
.src
[1] = BIR_INDEX_REGISTER
| 61; /* TODO: RA */
175 address
.src
[2] = BIR_INDEX_REGISTER
| 62;
177 address
.src_types
[1] = nir_type_uint32
;
178 address
.src_types
[2] = nir_type_uint32
;
179 address
.src_types
[3] = nir_intrinsic_type(instr
);
180 address
.dest
= bi_make_temp(ctx
);
181 address
.dest_type
= nir_type_uint32
;
182 address
.writemask
= (1 << 12) - 1;
184 bi_instruction st
= {
185 .type
= BI_STORE_VAR
,
187 bir_src_index(&instr
->src
[0]),
188 address
.dest
, address
.dest
, address
.dest
,
192 nir_type_uint32
, nir_type_uint32
, nir_type_uint32
,
198 .store_channels
= 4, /* TODO: WRITEMASK */
201 bi_emit(ctx
, address
);
206 bi_emit_ld_uniform(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
208 bi_instruction ld
= bi_load(BI_LOAD_UNIFORM
, instr
);
209 ld
.src
[1] = BIR_INDEX_ZERO
; /* TODO: UBO index */
211 /* TODO: Indirect access, since we need to multiply by the element
212 * size. I believe we can get this lowering automatically via
213 * nir_lower_io (as mul instructions) with the proper options, but this
215 assert(ld
.src
[0] & BIR_INDEX_CONSTANT
);
216 ld
.constant
.u64
+= ctx
->sysvals
.sysval_count
;
217 ld
.constant
.u64
*= 16;
223 bi_emit_sysval(bi_context
*ctx
, nir_instr
*instr
,
224 unsigned nr_components
, unsigned offset
)
228 /* Figure out which uniform this is */
229 int sysval
= panfrost_sysval_for_instr(instr
, &nir_dest
);
230 void *val
= _mesa_hash_table_u64_search(ctx
->sysvals
.sysval_to_id
, sysval
);
232 /* Sysvals are prefix uniforms */
233 unsigned uniform
= ((uintptr_t) val
) - 1;
235 /* Emit the read itself -- this is never indirect */
237 bi_instruction load
= {
238 .type
= BI_LOAD_UNIFORM
,
239 .writemask
= (1 << (nr_components
* 4)) - 1,
240 .src
= { BIR_INDEX_CONSTANT
, BIR_INDEX_ZERO
},
241 .constant
= { (uniform
* 16) + offset
},
242 .dest
= bir_dest_index(&nir_dest
),
243 .dest_type
= nir_type_uint32
, /* TODO */
250 emit_intrinsic(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
253 switch (instr
->intrinsic
) {
254 case nir_intrinsic_load_barycentric_pixel
:
257 case nir_intrinsic_load_interpolated_input
:
258 case nir_intrinsic_load_input
:
259 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
260 bi_emit_ld_vary(ctx
, instr
);
261 else if (ctx
->stage
== MESA_SHADER_VERTEX
)
262 bi_emit(ctx
, bi_load(BI_LOAD_ATTR
, instr
));
264 unreachable("Unsupported shader stage");
268 case nir_intrinsic_store_output
:
269 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
270 bi_emit_frag_out(ctx
, instr
);
271 else if (ctx
->stage
== MESA_SHADER_VERTEX
)
272 bi_emit_st_vary(ctx
, instr
);
274 unreachable("Unsupported shader stage");
277 case nir_intrinsic_load_uniform
:
278 bi_emit_ld_uniform(ctx
, instr
);
281 case nir_intrinsic_load_ssbo_address
:
282 bi_emit_sysval(ctx
, &instr
->instr
, 1, 0);
285 case nir_intrinsic_get_buffer_size
:
286 bi_emit_sysval(ctx
, &instr
->instr
, 1, 8);
289 case nir_intrinsic_load_viewport_scale
:
290 case nir_intrinsic_load_viewport_offset
:
291 case nir_intrinsic_load_num_work_groups
:
292 case nir_intrinsic_load_sampler_lod_parameters_pan
:
293 bi_emit_sysval(ctx
, &instr
->instr
, 3, 0);
303 emit_load_const(bi_context
*ctx
, nir_load_const_instr
*instr
)
305 /* Make sure we've been lowered */
306 assert(instr
->def
.num_components
== 1);
308 bi_instruction move
= {
310 .dest
= bir_ssa_index(&instr
->def
),
311 .dest_type
= instr
->def
.bit_size
| nir_type_uint
,
312 .writemask
= (1 << (instr
->def
.bit_size
/ 8)) - 1,
317 .u64
= nir_const_value_as_uint(instr
->value
[0], instr
->def
.bit_size
)
325 bi_class_for_nir_alu(nir_op op
)
396 unreachable("Unknown ALU op");
401 bi_cond_for_nir(nir_op op
)
417 unreachable("Invalid compare");
422 emit_alu(bi_context
*ctx
, nir_alu_instr
*instr
)
424 /* Assume it's something we can handle normally */
425 bi_instruction alu
= {
426 .type
= bi_class_for_nir_alu(instr
->op
),
427 .dest
= bir_dest_index(&instr
->dest
.dest
),
428 .dest_type
= nir_op_infos
[instr
->op
].output_type
429 | nir_dest_bit_size(instr
->dest
.dest
),
432 /* TODO: Implement lowering of special functions for older Bifrost */
433 assert((alu
.type
!= BI_SPECIAL
) || !(ctx
->quirks
& BIFROST_NO_FAST_OP
));
435 if (instr
->dest
.dest
.is_ssa
) {
436 /* Construct a writemask */
437 unsigned bits_per_comp
= instr
->dest
.dest
.ssa
.bit_size
;
438 unsigned comps
= instr
->dest
.dest
.ssa
.num_components
;
440 unsigned bits
= bits_per_comp
* comps
;
441 unsigned bytes
= MAX2(bits
/ 8, 1);
442 alu
.writemask
= (1 << bytes
) - 1;
444 unsigned comp_mask
= instr
->dest
.write_mask
;
446 alu
.writemask
= pan_to_bytemask(nir_dest_bit_size(instr
->dest
.dest
),
450 /* We inline constants as we go. This tracks how many constants have
451 * been inlined, since we're limited to 64-bits of constants per
454 unsigned dest_bits
= nir_dest_bit_size(instr
->dest
.dest
);
455 unsigned constants_left
= (64 / dest_bits
);
456 unsigned constant_shift
= 0;
460 unsigned num_inputs
= nir_op_infos
[instr
->op
].num_inputs
;
461 assert(num_inputs
<= ARRAY_SIZE(alu
.src
));
463 for (unsigned i
= 0; i
< num_inputs
; ++i
) {
464 unsigned bits
= nir_src_bit_size(instr
->src
[i
].src
);
465 alu
.src_types
[i
] = nir_op_infos
[instr
->op
].input_types
[i
]
468 /* Try to inline a constant */
469 if (nir_src_is_const(instr
->src
[i
].src
) && constants_left
&& (dest_bits
== bits
)) {
471 (nir_src_as_uint(instr
->src
[i
].src
)) << constant_shift
;
473 alu
.src
[i
] = BIR_INDEX_CONSTANT
| constant_shift
;
475 constant_shift
+= dest_bits
;
479 alu
.src
[i
] = bir_src_index(&instr
->src
[i
].src
);
481 /* We assert scalarization above */
482 alu
.swizzle
[i
][0] = instr
->src
[i
].swizzle
[0];
485 /* Op-specific fixup */
488 alu
.src
[2] = BIR_INDEX_ZERO
; /* FMA */
491 alu
.outmod
= BIFROST_SAT
; /* FMOV */
494 alu
.src_neg
[0] = true; /* FMOV */
497 alu
.src_abs
[0] = true; /* FMOV */
500 alu
.src_neg
[1] = true; /* FADD */
505 alu
.op
.minmax
= BI_MINMAX_MAX
; /* MINMAX */
508 alu
.op
.special
= BI_SPECIAL_FRCP
;
511 alu
.op
.special
= BI_SPECIAL_FRSQ
;
514 alu
.op
.special
= BI_SPECIAL_FSIN
;
517 alu
.op
.special
= BI_SPECIAL_FCOS
;
527 alu
.op
.compare
= bi_cond_for_nir(instr
->op
);
537 emit_instr(bi_context
*ctx
, struct nir_instr
*instr
)
539 switch (instr
->type
) {
540 case nir_instr_type_load_const
:
541 emit_load_const(ctx
, nir_instr_as_load_const(instr
));
544 case nir_instr_type_intrinsic
:
545 emit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
548 case nir_instr_type_alu
:
549 emit_alu(ctx
, nir_instr_as_alu(instr
));
553 case nir_instr_type_tex
:
554 emit_tex(ctx
, nir_instr_as_tex(instr
));
558 case nir_instr_type_jump
:
559 emit_jump(ctx
, nir_instr_as_jump(instr
));
562 case nir_instr_type_ssa_undef
:
567 //unreachable("Unhandled instruction type");
575 create_empty_block(bi_context
*ctx
)
577 bi_block
*blk
= rzalloc(ctx
, bi_block
);
579 blk
->base
.predecessors
= _mesa_set_create(blk
,
581 _mesa_key_pointer_equal
);
583 blk
->base
.name
= ctx
->block_name_count
++;
589 bi_schedule_barrier(bi_context
*ctx
)
591 bi_block
*temp
= ctx
->after_block
;
592 ctx
->after_block
= create_empty_block(ctx
);
593 list_addtail(&ctx
->after_block
->base
.link
, &ctx
->blocks
);
594 list_inithead(&ctx
->after_block
->base
.instructions
);
595 pan_block_add_successor(&ctx
->current_block
->base
, &ctx
->after_block
->base
);
596 ctx
->current_block
= ctx
->after_block
;
597 ctx
->after_block
= temp
;
601 emit_block(bi_context
*ctx
, nir_block
*block
)
603 if (ctx
->after_block
) {
604 ctx
->current_block
= ctx
->after_block
;
605 ctx
->after_block
= NULL
;
607 ctx
->current_block
= create_empty_block(ctx
);
610 list_addtail(&ctx
->current_block
->base
.link
, &ctx
->blocks
);
611 list_inithead(&ctx
->current_block
->base
.instructions
);
613 nir_foreach_instr(instr
, block
) {
614 emit_instr(ctx
, instr
);
615 ++ctx
->instruction_count
;
618 return ctx
->current_block
;
621 /* Emits an unconditional branch to the end of the current block, returning a
622 * pointer so the user can fill in details */
624 static bi_instruction
*
625 bi_emit_branch(bi_context
*ctx
)
627 bi_instruction branch
= {
630 .cond
= BI_COND_ALWAYS
634 return bi_emit(ctx
, branch
);
637 /* Sets a condition for a branch by examing the NIR condition. If we're
638 * familiar with the condition, we unwrap it to fold it into the branch
639 * instruction. Otherwise, we consume the condition directly. We
640 * generally use 1-bit booleans which allows us to use small types for
645 bi_set_branch_cond(bi_instruction
*branch
, nir_src
*cond
, bool invert
)
647 /* TODO: Try to unwrap instead of always bailing */
648 branch
->src
[0] = bir_src_index(cond
);
649 branch
->src
[1] = BIR_INDEX_ZERO
;
650 branch
->src_types
[0] = branch
->src_types
[1] = nir_type_uint16
;
651 branch
->branch
.cond
= invert
? BI_COND_EQ
: BI_COND_NE
;
655 emit_if(bi_context
*ctx
, nir_if
*nif
)
657 bi_block
*before_block
= ctx
->current_block
;
659 /* Speculatively emit the branch, but we can't fill it in until later */
660 bi_instruction
*then_branch
= bi_emit_branch(ctx
);
661 bi_set_branch_cond(then_branch
, &nif
->condition
, true);
663 /* Emit the two subblocks. */
664 bi_block
*then_block
= emit_cf_list(ctx
, &nif
->then_list
);
665 bi_block
*end_then_block
= ctx
->current_block
;
667 /* Emit a jump from the end of the then block to the end of the else */
668 bi_instruction
*then_exit
= bi_emit_branch(ctx
);
670 /* Emit second block, and check if it's empty */
672 int count_in
= ctx
->instruction_count
;
673 bi_block
*else_block
= emit_cf_list(ctx
, &nif
->else_list
);
674 bi_block
*end_else_block
= ctx
->current_block
;
675 ctx
->after_block
= create_empty_block(ctx
);
677 /* Now that we have the subblocks emitted, fix up the branches */
682 if (ctx
->instruction_count
== count_in
) {
683 /* The else block is empty, so don't emit an exit jump */
684 bi_remove_instruction(then_exit
);
685 then_branch
->branch
.target
= ctx
->after_block
;
687 then_branch
->branch
.target
= else_block
;
688 then_exit
->branch
.target
= ctx
->after_block
;
689 pan_block_add_successor(&end_then_block
->base
, &then_exit
->branch
.target
->base
);
692 /* Wire up the successors */
694 pan_block_add_successor(&before_block
->base
, &then_branch
->branch
.target
->base
); /* then_branch */
696 pan_block_add_successor(&before_block
->base
, &then_block
->base
); /* fallthrough */
697 pan_block_add_successor(&end_else_block
->base
, &ctx
->after_block
->base
); /* fallthrough */
701 emit_loop(bi_context
*ctx
, nir_loop
*nloop
)
703 /* Remember where we are */
704 bi_block
*start_block
= ctx
->current_block
;
706 bi_block
*saved_break
= ctx
->break_block
;
707 bi_block
*saved_continue
= ctx
->continue_block
;
709 ctx
->continue_block
= create_empty_block(ctx
);
710 ctx
->break_block
= create_empty_block(ctx
);
711 ctx
->after_block
= ctx
->continue_block
;
713 /* Emit the body itself */
714 emit_cf_list(ctx
, &nloop
->body
);
716 /* Branch back to loop back */
717 bi_instruction
*br_back
= bi_emit_branch(ctx
);
718 br_back
->branch
.target
= ctx
->continue_block
;
719 pan_block_add_successor(&start_block
->base
, &ctx
->continue_block
->base
);
720 pan_block_add_successor(&ctx
->current_block
->base
, &ctx
->continue_block
->base
);
722 ctx
->after_block
= ctx
->break_block
;
725 ctx
->break_block
= saved_break
;
726 ctx
->continue_block
= saved_continue
;
731 emit_cf_list(bi_context
*ctx
, struct exec_list
*list
)
733 bi_block
*start_block
= NULL
;
735 foreach_list_typed(nir_cf_node
, node
, node
, list
) {
736 switch (node
->type
) {
737 case nir_cf_node_block
: {
738 bi_block
*block
= emit_block(ctx
, nir_cf_node_as_block(node
));
747 emit_if(ctx
, nir_cf_node_as_if(node
));
750 case nir_cf_node_loop
:
751 emit_loop(ctx
, nir_cf_node_as_loop(node
));
755 unreachable("Unknown control flow");
763 glsl_type_size(const struct glsl_type
*type
, bool bindless
)
765 return glsl_count_attribute_slots(type
, false);
769 bi_optimize_nir(nir_shader
*nir
)
772 unsigned lower_flrp
= 16 | 32 | 64;
774 NIR_PASS(progress
, nir
, nir_lower_regs_to_ssa
);
775 NIR_PASS(progress
, nir
, nir_lower_idiv
, nir_lower_idiv_fast
);
777 nir_lower_tex_options lower_tex_options
= {
778 .lower_txs_lod
= true,
780 .lower_tex_without_implicit_lod
= true,
784 NIR_PASS(progress
, nir
, nir_lower_tex
, &lower_tex_options
);
785 NIR_PASS(progress
, nir
, nir_lower_alu_to_scalar
, NULL
, NULL
);
786 NIR_PASS(progress
, nir
, nir_lower_load_const_to_scalar
);
791 NIR_PASS(progress
, nir
, nir_lower_var_copies
);
792 NIR_PASS(progress
, nir
, nir_lower_vars_to_ssa
);
794 NIR_PASS(progress
, nir
, nir_copy_prop
);
795 NIR_PASS(progress
, nir
, nir_opt_remove_phis
);
796 NIR_PASS(progress
, nir
, nir_opt_dce
);
797 NIR_PASS(progress
, nir
, nir_opt_dead_cf
);
798 NIR_PASS(progress
, nir
, nir_opt_cse
);
799 NIR_PASS(progress
, nir
, nir_opt_peephole_select
, 64, false, true);
800 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
801 NIR_PASS(progress
, nir
, nir_opt_constant_folding
);
803 if (lower_flrp
!= 0) {
804 bool lower_flrp_progress
= false;
805 NIR_PASS(lower_flrp_progress
,
809 false /* always_precise */,
810 nir
->options
->lower_ffma
);
811 if (lower_flrp_progress
) {
812 NIR_PASS(progress
, nir
,
813 nir_opt_constant_folding
);
817 /* Nothing should rematerialize any flrps, so we only
818 * need to do this lowering once.
823 NIR_PASS(progress
, nir
, nir_opt_undef
);
824 NIR_PASS(progress
, nir
, nir_opt_loop_unroll
,
827 nir_var_function_temp
);
830 NIR_PASS(progress
, nir
, nir_opt_algebraic_late
);
831 NIR_PASS(progress
, nir
, bifrost_nir_lower_algebraic_late
);
832 NIR_PASS(progress
, nir
, nir_lower_alu_to_scalar
, NULL
, NULL
);
833 NIR_PASS(progress
, nir
, nir_lower_load_const_to_scalar
);
835 /* Take us out of SSA */
836 NIR_PASS(progress
, nir
, nir_lower_locals_to_regs
);
837 NIR_PASS(progress
, nir
, nir_convert_from_ssa
, true);
839 /* We're a primary scalar architecture but there's enough vector that
840 * we use a vector IR so let's not also deal with scalar hacks on top
841 * of the vector hacks */
843 NIR_PASS(progress
, nir
, nir_move_vec_src_uses_to_dest
);
844 NIR_PASS(progress
, nir
, nir_lower_vec_to_movs
);
845 NIR_PASS(progress
, nir
, nir_opt_dce
);
849 bi_insert_mov32(bi_context
*ctx
, bi_instruction
*parent
, unsigned comp
)
851 bi_instruction move
= {
853 .dest
= parent
->dest
,
854 .dest_type
= nir_type_uint32
,
855 .writemask
= (0xF << (4 * comp
)),
856 .src
= { parent
->src
[0] },
857 .src_types
= { nir_type_uint32
},
858 .swizzle
= { { comp
} }
861 bi_emit_before(ctx
, parent
, move
);
865 bi_lower_mov(bi_context
*ctx
, bi_block
*block
)
867 bi_foreach_instr_in_block_safe(block
, ins
) {
868 if (ins
->type
!= BI_MOV
) continue;
869 if (util_bitcount(ins
->writemask
) <= 4) continue;
871 for (unsigned i
= 0; i
< 4; ++i
) {
872 unsigned quad
= (ins
->writemask
>> (4 * i
)) & 0xF;
876 else if (quad
== 0xF)
877 bi_insert_mov32(ctx
, ins
, i
);
879 unreachable("TODO: Lowering <32bit moves");
882 bi_remove_instruction(ins
);
887 bifrost_compile_shader_nir(nir_shader
*nir
, panfrost_program
*program
, unsigned product_id
)
889 bi_context
*ctx
= rzalloc(NULL
, bi_context
);
891 ctx
->stage
= nir
->info
.stage
;
892 ctx
->quirks
= bifrost_get_quirks(product_id
);
893 list_inithead(&ctx
->blocks
);
895 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
896 * (so we don't accidentally duplicate the epilogue since mesa/st has
897 * messed with our I/O quite a bit already) */
899 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
901 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
902 NIR_PASS_V(nir
, nir_lower_viewport_transform
);
903 NIR_PASS_V(nir
, nir_lower_point_size
, 1.0, 1024.0);
906 NIR_PASS_V(nir
, nir_split_var_copies
);
907 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
908 NIR_PASS_V(nir
, nir_lower_var_copies
);
909 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
910 NIR_PASS_V(nir
, nir_lower_io
, nir_var_all
, glsl_type_size
, 0);
911 NIR_PASS_V(nir
, nir_lower_ssbo
);
913 bi_optimize_nir(nir
);
914 nir_print_shader(nir
, stdout
);
916 panfrost_nir_assign_sysvals(&ctx
->sysvals
, nir
);
917 program
->sysval_count
= ctx
->sysvals
.sysval_count
;
918 memcpy(program
->sysvals
, ctx
->sysvals
.sysvals
, sizeof(ctx
->sysvals
.sysvals
[0]) * ctx
->sysvals
.sysval_count
);
920 nir_foreach_function(func
, nir
) {
924 ctx
->impl
= func
->impl
;
925 emit_cf_list(ctx
, &func
->impl
->body
);
926 break; /* TODO: Multi-function shaders */
929 bi_foreach_block(ctx
, _block
) {
930 bi_block
*block
= (bi_block
*) _block
;
931 bi_lower_mov(ctx
, block
);
934 bool progress
= false;
939 bi_foreach_block(ctx
, _block
) {
940 bi_block
*block
= (bi_block
*) _block
;
941 progress
|= bi_opt_dead_code_eliminate(ctx
, block
);
945 bi_print_shader(ctx
, stdout
);
947 bi_register_allocate(ctx
);
948 bi_print_shader(ctx
, stdout
);
949 bi_pack(ctx
, &program
->compiled
);
950 disassemble_bifrost(stdout
, program
->compiled
.data
, program
->compiled
.size
, true);