2 * Copyright (C) 2020 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
36 #include "bi_quirks.h"
39 static bi_block
*emit_cf_list(bi_context
*ctx
, struct exec_list
*list
);
40 static bi_instruction
*bi_emit_branch(bi_context
*ctx
);
41 static void bi_block_add_successor(bi_block
*block
, bi_block
*successor
);
42 static void bi_schedule_barrier(bi_context
*ctx
);
45 emit_jump(bi_context
*ctx
, nir_jump_instr
*instr
)
47 bi_instruction
*branch
= bi_emit_branch(ctx
);
49 switch (instr
->type
) {
51 branch
->branch
.target
= ctx
->break_block
;
53 case nir_jump_continue
:
54 branch
->branch
.target
= ctx
->continue_block
;
57 unreachable("Unhandled jump type");
60 bi_block_add_successor(ctx
->current_block
, branch
->branch
.target
);
63 /* Gets a bytemask for a complete vecN write */
65 bi_mask_for_channels_32(unsigned i
)
67 return (1 << (4 * i
)) - 1;
71 bi_load(enum bi_class T
, nir_intrinsic_instr
*instr
)
73 bi_instruction load
= {
75 .writemask
= bi_mask_for_channels_32(instr
->num_components
),
76 .src
= { BIR_INDEX_CONSTANT
},
77 .constant
= { .u64
= nir_intrinsic_base(instr
) },
80 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[instr
->intrinsic
];
83 load
.dest
= bir_dest_index(&instr
->dest
);
85 if (info
->has_dest
&& info
->index_map
[NIR_INTRINSIC_TYPE
] > 0)
86 load
.dest_type
= nir_intrinsic_type(instr
);
88 nir_src
*offset
= nir_get_io_offset_src(instr
);
90 if (nir_src_is_const(*offset
))
91 load
.constant
.u64
+= nir_src_as_uint(*offset
);
93 load
.src
[0] = bir_src_index(offset
);
99 bi_emit_ld_vary(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
101 bi_instruction ins
= bi_load(BI_LOAD_VAR
, instr
);
102 ins
.load_vary
.interp_mode
= BIFROST_INTERP_DEFAULT
; /* TODO */
103 ins
.load_vary
.reuse
= false; /* TODO */
104 ins
.load_vary
.flat
= instr
->intrinsic
!= nir_intrinsic_load_interpolated_input
;
105 ins
.dest_type
= nir_type_float
| nir_dest_bit_size(instr
->dest
),
110 bi_emit_frag_out(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
112 if (!ctx
->emitted_atest
) {
113 bi_instruction ins
= {
118 bi_schedule_barrier(ctx
);
119 ctx
->emitted_atest
= true;
122 bi_instruction blend
= {
124 .blend_location
= nir_intrinsic_base(instr
),
126 bir_src_index(&instr
->src
[0])
134 bi_schedule_barrier(ctx
);
138 bi_emit_st_vary(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
140 bi_instruction address
= bi_load(BI_LOAD_VAR_ADDRESS
, instr
);
141 address
.dest
= bi_make_temp(ctx
);
142 address
.dest_type
= nir_type_uint64
;
143 address
.writemask
= (1 << 8) - 1;
145 bi_instruction st
= {
146 .type
= BI_STORE_VAR
,
149 bir_src_index(&instr
->src
[0])
156 bi_emit(ctx
, address
);
161 bi_emit_ld_uniform(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
163 bi_instruction ld
= bi_load(BI_LOAD_UNIFORM
, instr
);
164 ld
.src
[1] = BIR_INDEX_ZERO
; /* TODO: UBO index */
169 emit_intrinsic(bi_context
*ctx
, nir_intrinsic_instr
*instr
)
172 switch (instr
->intrinsic
) {
173 case nir_intrinsic_load_barycentric_pixel
:
176 case nir_intrinsic_load_interpolated_input
:
177 case nir_intrinsic_load_input
:
178 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
179 bi_emit_ld_vary(ctx
, instr
);
180 else if (ctx
->stage
== MESA_SHADER_VERTEX
)
181 bi_emit(ctx
, bi_load(BI_LOAD_ATTR
, instr
));
183 unreachable("Unsupported shader stage");
187 case nir_intrinsic_store_output
:
188 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
189 bi_emit_frag_out(ctx
, instr
);
190 else if (ctx
->stage
== MESA_SHADER_VERTEX
)
191 bi_emit_st_vary(ctx
, instr
);
193 unreachable("Unsupported shader stage");
196 case nir_intrinsic_load_uniform
:
197 bi_emit_ld_uniform(ctx
, instr
);
207 emit_load_const(bi_context
*ctx
, nir_load_const_instr
*instr
)
209 /* Make sure we've been lowered */
210 assert(instr
->def
.num_components
== 1);
212 bi_instruction move
= {
214 .dest
= bir_ssa_index(&instr
->def
),
215 .dest_type
= instr
->def
.bit_size
| nir_type_uint
,
216 .writemask
= (1 << (instr
->def
.bit_size
/ 8)) - 1,
221 .u64
= nir_const_value_as_uint(instr
->value
[0], instr
->def
.bit_size
)
229 bi_class_for_nir_alu(nir_op op
)
232 case nir_op_fadd
: return BI_ADD
;
233 case nir_op_fmul
: return BI_FMA
;
234 case nir_op_mov
: return BI_MOV
;
235 default: unreachable("Unknown ALU op");
240 emit_alu(bi_context
*ctx
, nir_alu_instr
*instr
)
242 /* Assume it's something we can handle normally */
243 bi_instruction alu
= {
244 .type
= bi_class_for_nir_alu(instr
->op
),
245 .dest
= bir_dest_index(&instr
->dest
.dest
),
246 .dest_type
= nir_op_infos
[instr
->op
].output_type
247 | nir_dest_bit_size(instr
->dest
.dest
),
250 if (instr
->dest
.dest
.is_ssa
) {
251 /* Construct a writemask */
252 unsigned bits_per_comp
= instr
->dest
.dest
.ssa
.bit_size
;
253 unsigned comps
= instr
->dest
.dest
.ssa
.num_components
;
255 unsigned bits
= bits_per_comp
* comps
;
256 unsigned bytes
= MAX2(bits
/ 8, 1);
257 alu
.writemask
= (1 << bytes
) - 1;
259 unsigned comp_mask
= instr
->dest
.write_mask
;
261 alu
.writemask
= pan_to_bytemask(nir_dest_bit_size(instr
->dest
.dest
),
267 unsigned num_inputs
= nir_op_infos
[instr
->op
].num_inputs
;
268 assert(num_inputs
<= ARRAY_SIZE(alu
.src
));
270 for (unsigned i
= 0; i
< num_inputs
; ++i
) {
271 alu
.src
[i
] = bir_src_index(&instr
->src
[i
].src
);
273 alu
.src_types
[i
] = nir_op_infos
[instr
->op
].input_types
[i
]
274 | nir_src_bit_size(instr
->src
[i
].src
);
276 /* We assert scalarization above */
277 alu
.swizzle
[i
][0] = instr
->src
[i
].swizzle
[0];
280 /* Op-specific fixup */
283 alu
.src
[2] = BIR_INDEX_ZERO
; /* FMA */
293 emit_instr(bi_context
*ctx
, struct nir_instr
*instr
)
295 switch (instr
->type
) {
296 case nir_instr_type_load_const
:
297 emit_load_const(ctx
, nir_instr_as_load_const(instr
));
300 case nir_instr_type_intrinsic
:
301 emit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
304 case nir_instr_type_alu
:
305 emit_alu(ctx
, nir_instr_as_alu(instr
));
309 case nir_instr_type_tex
:
310 emit_tex(ctx
, nir_instr_as_tex(instr
));
314 case nir_instr_type_jump
:
315 emit_jump(ctx
, nir_instr_as_jump(instr
));
318 case nir_instr_type_ssa_undef
:
323 //unreachable("Unhandled instruction type");
331 create_empty_block(bi_context
*ctx
)
333 bi_block
*blk
= rzalloc(ctx
, bi_block
);
335 blk
->predecessors
= _mesa_set_create(blk
,
337 _mesa_key_pointer_equal
);
339 blk
->name
= ctx
->block_name_count
++;
345 bi_block_add_successor(bi_block
*block
, bi_block
*successor
)
350 for (unsigned i
= 0; i
< ARRAY_SIZE(block
->successors
); ++i
) {
351 if (block
->successors
[i
]) {
352 if (block
->successors
[i
] == successor
)
358 block
->successors
[i
] = successor
;
359 _mesa_set_add(successor
->predecessors
, block
);
363 unreachable("Too many successors");
367 bi_schedule_barrier(bi_context
*ctx
)
369 bi_block
*temp
= ctx
->after_block
;
370 ctx
->after_block
= create_empty_block(ctx
);
371 list_addtail(&ctx
->after_block
->link
, &ctx
->blocks
);
372 list_inithead(&ctx
->after_block
->instructions
);
373 bi_block_add_successor(ctx
->current_block
, ctx
->after_block
);
374 ctx
->current_block
= ctx
->after_block
;
375 ctx
->after_block
= temp
;
379 emit_block(bi_context
*ctx
, nir_block
*block
)
381 if (ctx
->after_block
) {
382 ctx
->current_block
= ctx
->after_block
;
383 ctx
->after_block
= NULL
;
385 ctx
->current_block
= create_empty_block(ctx
);
388 list_addtail(&ctx
->current_block
->link
, &ctx
->blocks
);
389 list_inithead(&ctx
->current_block
->instructions
);
391 nir_foreach_instr(instr
, block
) {
392 emit_instr(ctx
, instr
);
393 ++ctx
->instruction_count
;
396 return ctx
->current_block
;
399 /* Emits an unconditional branch to the end of the current block, returning a
400 * pointer so the user can fill in details */
402 static bi_instruction
*
403 bi_emit_branch(bi_context
*ctx
)
405 bi_instruction branch
= {
408 .cond
= BI_COND_ALWAYS
412 return bi_emit(ctx
, branch
);
415 /* Sets a condition for a branch by examing the NIR condition. If we're
416 * familiar with the condition, we unwrap it to fold it into the branch
417 * instruction. Otherwise, we consume the condition directly. We
418 * generally use 1-bit booleans which allows us to use small types for
423 bi_set_branch_cond(bi_instruction
*branch
, nir_src
*cond
, bool invert
)
425 /* TODO: Try to unwrap instead of always bailing */
426 branch
->src
[0] = bir_src_index(cond
);
427 branch
->src
[1] = BIR_INDEX_ZERO
;
428 branch
->src_types
[0] = branch
->src_types
[1] = nir_type_uint16
;
429 branch
->branch
.cond
= invert
? BI_COND_EQ
: BI_COND_NE
;
433 emit_if(bi_context
*ctx
, nir_if
*nif
)
435 bi_block
*before_block
= ctx
->current_block
;
437 /* Speculatively emit the branch, but we can't fill it in until later */
438 bi_instruction
*then_branch
= bi_emit_branch(ctx
);
439 bi_set_branch_cond(then_branch
, &nif
->condition
, true);
441 /* Emit the two subblocks. */
442 bi_block
*then_block
= emit_cf_list(ctx
, &nif
->then_list
);
443 bi_block
*end_then_block
= ctx
->current_block
;
445 /* Emit a jump from the end of the then block to the end of the else */
446 bi_instruction
*then_exit
= bi_emit_branch(ctx
);
448 /* Emit second block, and check if it's empty */
450 int count_in
= ctx
->instruction_count
;
451 bi_block
*else_block
= emit_cf_list(ctx
, &nif
->else_list
);
452 bi_block
*end_else_block
= ctx
->current_block
;
453 ctx
->after_block
= create_empty_block(ctx
);
455 /* Now that we have the subblocks emitted, fix up the branches */
460 if (ctx
->instruction_count
== count_in
) {
461 /* The else block is empty, so don't emit an exit jump */
462 bi_remove_instruction(then_exit
);
463 then_branch
->branch
.target
= ctx
->after_block
;
465 then_branch
->branch
.target
= else_block
;
466 then_exit
->branch
.target
= ctx
->after_block
;
467 bi_block_add_successor(end_then_block
, then_exit
->branch
.target
);
470 /* Wire up the successors */
472 bi_block_add_successor(before_block
, then_branch
->branch
.target
); /* then_branch */
474 bi_block_add_successor(before_block
, then_block
); /* fallthrough */
475 bi_block_add_successor(end_else_block
, ctx
->after_block
); /* fallthrough */
479 emit_loop(bi_context
*ctx
, nir_loop
*nloop
)
481 /* Remember where we are */
482 bi_block
*start_block
= ctx
->current_block
;
484 bi_block
*saved_break
= ctx
->break_block
;
485 bi_block
*saved_continue
= ctx
->continue_block
;
487 ctx
->continue_block
= create_empty_block(ctx
);
488 ctx
->break_block
= create_empty_block(ctx
);
489 ctx
->after_block
= ctx
->continue_block
;
491 /* Emit the body itself */
492 emit_cf_list(ctx
, &nloop
->body
);
494 /* Branch back to loop back */
495 bi_instruction
*br_back
= bi_emit_branch(ctx
);
496 br_back
->branch
.target
= ctx
->continue_block
;
497 bi_block_add_successor(start_block
, ctx
->continue_block
);
498 bi_block_add_successor(ctx
->current_block
, ctx
->continue_block
);
500 ctx
->after_block
= ctx
->break_block
;
503 ctx
->break_block
= saved_break
;
504 ctx
->continue_block
= saved_continue
;
509 emit_cf_list(bi_context
*ctx
, struct exec_list
*list
)
511 bi_block
*start_block
= NULL
;
513 foreach_list_typed(nir_cf_node
, node
, node
, list
) {
514 switch (node
->type
) {
515 case nir_cf_node_block
: {
516 bi_block
*block
= emit_block(ctx
, nir_cf_node_as_block(node
));
525 emit_if(ctx
, nir_cf_node_as_if(node
));
528 case nir_cf_node_loop
:
529 emit_loop(ctx
, nir_cf_node_as_loop(node
));
533 unreachable("Unknown control flow");
541 glsl_type_size(const struct glsl_type
*type
, bool bindless
)
543 return glsl_count_attribute_slots(type
, false);
547 bi_optimize_nir(nir_shader
*nir
)
550 unsigned lower_flrp
= 16 | 32 | 64;
552 NIR_PASS(progress
, nir
, nir_lower_regs_to_ssa
);
553 NIR_PASS(progress
, nir
, nir_lower_idiv
, nir_lower_idiv_fast
);
555 nir_lower_tex_options lower_tex_options
= {
556 .lower_txs_lod
= true,
558 .lower_tex_without_implicit_lod
= true,
562 NIR_PASS(progress
, nir
, nir_lower_tex
, &lower_tex_options
);
563 NIR_PASS(progress
, nir
, nir_lower_alu_to_scalar
, NULL
, NULL
);
564 NIR_PASS(progress
, nir
, nir_lower_load_const_to_scalar
);
569 NIR_PASS(progress
, nir
, nir_lower_var_copies
);
570 NIR_PASS(progress
, nir
, nir_lower_vars_to_ssa
);
572 NIR_PASS(progress
, nir
, nir_copy_prop
);
573 NIR_PASS(progress
, nir
, nir_opt_remove_phis
);
574 NIR_PASS(progress
, nir
, nir_opt_dce
);
575 NIR_PASS(progress
, nir
, nir_opt_dead_cf
);
576 NIR_PASS(progress
, nir
, nir_opt_cse
);
577 NIR_PASS(progress
, nir
, nir_opt_peephole_select
, 64, false, true);
578 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
579 NIR_PASS(progress
, nir
, nir_opt_constant_folding
);
581 if (lower_flrp
!= 0) {
582 bool lower_flrp_progress
= false;
583 NIR_PASS(lower_flrp_progress
,
587 false /* always_precise */,
588 nir
->options
->lower_ffma
);
589 if (lower_flrp_progress
) {
590 NIR_PASS(progress
, nir
,
591 nir_opt_constant_folding
);
595 /* Nothing should rematerialize any flrps, so we only
596 * need to do this lowering once.
601 NIR_PASS(progress
, nir
, nir_opt_undef
);
602 NIR_PASS(progress
, nir
, nir_opt_loop_unroll
,
605 nir_var_function_temp
);
608 NIR_PASS(progress
, nir
, nir_opt_algebraic_late
);
609 NIR_PASS(progress
, nir
, nir_lower_alu_to_scalar
, NULL
, NULL
);
610 NIR_PASS(progress
, nir
, nir_lower_load_const_to_scalar
);
612 /* Take us out of SSA */
613 NIR_PASS(progress
, nir
, nir_lower_locals_to_regs
);
614 NIR_PASS(progress
, nir
, nir_convert_from_ssa
, true);
616 /* We're a primary scalar architecture but there's enough vector that
617 * we use a vector IR so let's not also deal with scalar hacks on top
618 * of the vector hacks */
620 NIR_PASS(progress
, nir
, nir_move_vec_src_uses_to_dest
);
621 NIR_PASS(progress
, nir
, nir_lower_vec_to_movs
);
622 NIR_PASS(progress
, nir
, nir_opt_dce
);
626 bifrost_compile_shader_nir(nir_shader
*nir
, bifrost_program
*program
, unsigned product_id
)
628 bi_context
*ctx
= rzalloc(NULL
, bi_context
);
630 ctx
->stage
= nir
->info
.stage
;
631 ctx
->quirks
= bifrost_get_quirks(product_id
);
632 list_inithead(&ctx
->blocks
);
634 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
635 * (so we don't accidentally duplicate the epilogue since mesa/st has
636 * messed with our I/O quite a bit already) */
638 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
640 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
641 NIR_PASS_V(nir
, nir_lower_viewport_transform
);
642 NIR_PASS_V(nir
, nir_lower_point_size
, 1.0, 1024.0);
645 NIR_PASS_V(nir
, nir_split_var_copies
);
646 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
647 NIR_PASS_V(nir
, nir_lower_var_copies
);
648 NIR_PASS_V(nir
, nir_lower_vars_to_ssa
);
649 NIR_PASS_V(nir
, nir_lower_io
, nir_var_all
, glsl_type_size
, 0);
650 NIR_PASS_V(nir
, nir_lower_ssbo
);
652 bi_optimize_nir(nir
);
653 nir_print_shader(nir
, stdout
);
655 nir_foreach_function(func
, nir
) {
659 ctx
->impl
= func
->impl
;
660 emit_cf_list(ctx
, &func
->impl
->body
);
661 break; /* TODO: Multi-function shaders */
664 bi_print_shader(ctx
, stdout
);