pan/bi: Add initial handling of ALU ops
[mesa.git] / src / panfrost / bifrost / bifrost_compile.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
32
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "compiler.h"
36 #include "bi_quirks.h"
37 #include "bi_print.h"
38
39 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
40 static bi_instruction *bi_emit_branch(bi_context *ctx);
41 static void bi_block_add_successor(bi_block *block, bi_block *successor);
42 static void bi_schedule_barrier(bi_context *ctx);
43
44 static void
45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
46 {
47 bi_instruction *branch = bi_emit_branch(ctx);
48
49 switch (instr->type) {
50 case nir_jump_break:
51 branch->branch.target = ctx->break_block;
52 break;
53 case nir_jump_continue:
54 branch->branch.target = ctx->continue_block;
55 break;
56 default:
57 unreachable("Unhandled jump type");
58 }
59
60 bi_block_add_successor(ctx->current_block, branch->branch.target);
61 }
62
63 /* Gets a bytemask for a complete vecN write */
64 static unsigned
65 bi_mask_for_channels_32(unsigned i)
66 {
67 return (1 << (4 * i)) - 1;
68 }
69
70 static bi_instruction
71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
72 {
73 bi_instruction load = {
74 .type = T,
75 .writemask = bi_mask_for_channels_32(instr->num_components),
76 .src = { BIR_INDEX_CONSTANT },
77 .constant = { .u64 = nir_intrinsic_base(instr) },
78 };
79
80 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
81
82 if (info->has_dest)
83 load.dest = bir_dest_index(&instr->dest);
84
85 if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
86 load.dest_type = nir_intrinsic_type(instr);
87
88 nir_src *offset = nir_get_io_offset_src(instr);
89
90 if (nir_src_is_const(*offset))
91 load.constant.u64 += nir_src_as_uint(*offset);
92 else
93 load.src[0] = bir_src_index(offset);
94
95 return load;
96 }
97
98 static void
99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
100 {
101 bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
102 ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
103 ins.load_vary.reuse = false; /* TODO */
104 ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
105 ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
106 bi_emit(ctx, ins);
107 }
108
109 static void
110 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
111 {
112 if (!ctx->emitted_atest) {
113 bi_instruction ins = {
114 .type = BI_ATEST
115 };
116
117 bi_emit(ctx, ins);
118 bi_schedule_barrier(ctx);
119 ctx->emitted_atest = true;
120 }
121
122 bi_instruction blend = {
123 .type = BI_BLEND,
124 .blend_location = nir_intrinsic_base(instr),
125 .src = {
126 bir_src_index(&instr->src[0])
127 },
128 .swizzle = {
129 { 0, 1, 2, 3 }
130 }
131 };
132
133 bi_emit(ctx, blend);
134 bi_schedule_barrier(ctx);
135 }
136
137 static void
138 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
139 {
140 bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
141 address.dest = bi_make_temp(ctx);
142 address.dest_type = nir_type_uint64;
143 address.writemask = (1 << 8) - 1;
144
145 bi_instruction st = {
146 .type = BI_STORE_VAR,
147 .src = {
148 address.dest,
149 bir_src_index(&instr->src[0])
150 },
151 .swizzle = {
152 { 0, 1, 2, 3 }
153 }
154 };
155
156 bi_emit(ctx, address);
157 bi_emit(ctx, st);
158 }
159
160 static void
161 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
162 {
163 bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
164 ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
165 bi_emit(ctx, ld);
166 }
167
168 static void
169 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
170 {
171
172 switch (instr->intrinsic) {
173 case nir_intrinsic_load_barycentric_pixel:
174 /* stub */
175 break;
176 case nir_intrinsic_load_interpolated_input:
177 case nir_intrinsic_load_input:
178 if (ctx->stage == MESA_SHADER_FRAGMENT)
179 bi_emit_ld_vary(ctx, instr);
180 else if (ctx->stage == MESA_SHADER_VERTEX)
181 bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
182 else {
183 unreachable("Unsupported shader stage");
184 }
185 break;
186
187 case nir_intrinsic_store_output:
188 if (ctx->stage == MESA_SHADER_FRAGMENT)
189 bi_emit_frag_out(ctx, instr);
190 else if (ctx->stage == MESA_SHADER_VERTEX)
191 bi_emit_st_vary(ctx, instr);
192 else
193 unreachable("Unsupported shader stage");
194 break;
195
196 case nir_intrinsic_load_uniform:
197 bi_emit_ld_uniform(ctx, instr);
198 break;
199
200 default:
201 /* todo */
202 break;
203 }
204 }
205
206 static void
207 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
208 {
209 /* Make sure we've been lowered */
210 assert(instr->def.num_components == 1);
211
212 bi_instruction move = {
213 .type = BI_MOV,
214 .dest = bir_ssa_index(&instr->def),
215 .dest_type = instr->def.bit_size | nir_type_uint,
216 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
217 .src = {
218 BIR_INDEX_CONSTANT
219 },
220 .constant = {
221 .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
222 }
223 };
224
225 bi_emit(ctx, move);
226 }
227
228 static enum bi_class
229 bi_class_for_nir_alu(nir_op op)
230 {
231 switch (op) {
232 case nir_op_fadd: return BI_ADD;
233 case nir_op_fmul: return BI_FMA;
234 case nir_op_mov: return BI_MOV;
235 default: unreachable("Unknown ALU op");
236 }
237 }
238
239 static void
240 emit_alu(bi_context *ctx, nir_alu_instr *instr)
241 {
242 /* Assume it's something we can handle normally */
243 bi_instruction alu = {
244 .type = bi_class_for_nir_alu(instr->op),
245 .dest = bir_dest_index(&instr->dest.dest),
246 .dest_type = nir_op_infos[instr->op].output_type
247 | nir_dest_bit_size(instr->dest.dest),
248 };
249
250 if (instr->dest.dest.is_ssa) {
251 /* Construct a writemask */
252 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
253 unsigned comps = instr->dest.dest.ssa.num_components;
254 assert(comps == 1);
255 unsigned bits = bits_per_comp * comps;
256 unsigned bytes = MAX2(bits / 8, 1);
257 alu.writemask = (1 << bytes) - 1;
258 } else {
259 unsigned comp_mask = instr->dest.write_mask;
260
261 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
262 comp_mask);
263 }
264
265 /* Copy sources */
266
267 unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
268 assert(num_inputs <= ARRAY_SIZE(alu.src));
269
270 for (unsigned i = 0; i < num_inputs; ++i) {
271 alu.src[i] = bir_src_index(&instr->src[i].src);
272
273 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
274 | nir_src_bit_size(instr->src[i].src);
275
276 /* We assert scalarization above */
277 alu.swizzle[i][0] = instr->src[i].swizzle[0];
278 }
279
280 /* Op-specific fixup */
281 switch (instr->op) {
282 case nir_op_fmul:
283 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
284 break;
285 default:
286 break;
287 }
288
289 bi_emit(ctx, alu);
290 }
291
292 static void
293 emit_instr(bi_context *ctx, struct nir_instr *instr)
294 {
295 switch (instr->type) {
296 case nir_instr_type_load_const:
297 emit_load_const(ctx, nir_instr_as_load_const(instr));
298 break;
299
300 case nir_instr_type_intrinsic:
301 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
302 break;
303
304 case nir_instr_type_alu:
305 emit_alu(ctx, nir_instr_as_alu(instr));
306 break;
307
308 #if 0
309 case nir_instr_type_tex:
310 emit_tex(ctx, nir_instr_as_tex(instr));
311 break;
312 #endif
313
314 case nir_instr_type_jump:
315 emit_jump(ctx, nir_instr_as_jump(instr));
316 break;
317
318 case nir_instr_type_ssa_undef:
319 /* Spurious */
320 break;
321
322 default:
323 //unreachable("Unhandled instruction type");
324 break;
325 }
326 }
327
328
329
330 static bi_block *
331 create_empty_block(bi_context *ctx)
332 {
333 bi_block *blk = rzalloc(ctx, bi_block);
334
335 blk->predecessors = _mesa_set_create(blk,
336 _mesa_hash_pointer,
337 _mesa_key_pointer_equal);
338
339 blk->name = ctx->block_name_count++;
340
341 return blk;
342 }
343
344 static void
345 bi_block_add_successor(bi_block *block, bi_block *successor)
346 {
347 assert(block);
348 assert(successor);
349
350 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
351 if (block->successors[i]) {
352 if (block->successors[i] == successor)
353 return;
354 else
355 continue;
356 }
357
358 block->successors[i] = successor;
359 _mesa_set_add(successor->predecessors, block);
360 return;
361 }
362
363 unreachable("Too many successors");
364 }
365
366 static void
367 bi_schedule_barrier(bi_context *ctx)
368 {
369 bi_block *temp = ctx->after_block;
370 ctx->after_block = create_empty_block(ctx);
371 list_addtail(&ctx->after_block->link, &ctx->blocks);
372 list_inithead(&ctx->after_block->instructions);
373 bi_block_add_successor(ctx->current_block, ctx->after_block);
374 ctx->current_block = ctx->after_block;
375 ctx->after_block = temp;
376 }
377
378 static bi_block *
379 emit_block(bi_context *ctx, nir_block *block)
380 {
381 if (ctx->after_block) {
382 ctx->current_block = ctx->after_block;
383 ctx->after_block = NULL;
384 } else {
385 ctx->current_block = create_empty_block(ctx);
386 }
387
388 list_addtail(&ctx->current_block->link, &ctx->blocks);
389 list_inithead(&ctx->current_block->instructions);
390
391 nir_foreach_instr(instr, block) {
392 emit_instr(ctx, instr);
393 ++ctx->instruction_count;
394 }
395
396 return ctx->current_block;
397 }
398
399 /* Emits an unconditional branch to the end of the current block, returning a
400 * pointer so the user can fill in details */
401
402 static bi_instruction *
403 bi_emit_branch(bi_context *ctx)
404 {
405 bi_instruction branch = {
406 .type = BI_BRANCH,
407 .branch = {
408 .cond = BI_COND_ALWAYS
409 }
410 };
411
412 return bi_emit(ctx, branch);
413 }
414
415 /* Sets a condition for a branch by examing the NIR condition. If we're
416 * familiar with the condition, we unwrap it to fold it into the branch
417 * instruction. Otherwise, we consume the condition directly. We
418 * generally use 1-bit booleans which allows us to use small types for
419 * the conditions.
420 */
421
422 static void
423 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
424 {
425 /* TODO: Try to unwrap instead of always bailing */
426 branch->src[0] = bir_src_index(cond);
427 branch->src[1] = BIR_INDEX_ZERO;
428 branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
429 branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
430 }
431
432 static void
433 emit_if(bi_context *ctx, nir_if *nif)
434 {
435 bi_block *before_block = ctx->current_block;
436
437 /* Speculatively emit the branch, but we can't fill it in until later */
438 bi_instruction *then_branch = bi_emit_branch(ctx);
439 bi_set_branch_cond(then_branch, &nif->condition, true);
440
441 /* Emit the two subblocks. */
442 bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
443 bi_block *end_then_block = ctx->current_block;
444
445 /* Emit a jump from the end of the then block to the end of the else */
446 bi_instruction *then_exit = bi_emit_branch(ctx);
447
448 /* Emit second block, and check if it's empty */
449
450 int count_in = ctx->instruction_count;
451 bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
452 bi_block *end_else_block = ctx->current_block;
453 ctx->after_block = create_empty_block(ctx);
454
455 /* Now that we have the subblocks emitted, fix up the branches */
456
457 assert(then_block);
458 assert(else_block);
459
460 if (ctx->instruction_count == count_in) {
461 /* The else block is empty, so don't emit an exit jump */
462 bi_remove_instruction(then_exit);
463 then_branch->branch.target = ctx->after_block;
464 } else {
465 then_branch->branch.target = else_block;
466 then_exit->branch.target = ctx->after_block;
467 bi_block_add_successor(end_then_block, then_exit->branch.target);
468 }
469
470 /* Wire up the successors */
471
472 bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
473
474 bi_block_add_successor(before_block, then_block); /* fallthrough */
475 bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
476 }
477
478 static void
479 emit_loop(bi_context *ctx, nir_loop *nloop)
480 {
481 /* Remember where we are */
482 bi_block *start_block = ctx->current_block;
483
484 bi_block *saved_break = ctx->break_block;
485 bi_block *saved_continue = ctx->continue_block;
486
487 ctx->continue_block = create_empty_block(ctx);
488 ctx->break_block = create_empty_block(ctx);
489 ctx->after_block = ctx->continue_block;
490
491 /* Emit the body itself */
492 emit_cf_list(ctx, &nloop->body);
493
494 /* Branch back to loop back */
495 bi_instruction *br_back = bi_emit_branch(ctx);
496 br_back->branch.target = ctx->continue_block;
497 bi_block_add_successor(start_block, ctx->continue_block);
498 bi_block_add_successor(ctx->current_block, ctx->continue_block);
499
500 ctx->after_block = ctx->break_block;
501
502 /* Pop off */
503 ctx->break_block = saved_break;
504 ctx->continue_block = saved_continue;
505 ++ctx->loop_count;
506 }
507
508 static bi_block *
509 emit_cf_list(bi_context *ctx, struct exec_list *list)
510 {
511 bi_block *start_block = NULL;
512
513 foreach_list_typed(nir_cf_node, node, node, list) {
514 switch (node->type) {
515 case nir_cf_node_block: {
516 bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
517
518 if (!start_block)
519 start_block = block;
520
521 break;
522 }
523
524 case nir_cf_node_if:
525 emit_if(ctx, nir_cf_node_as_if(node));
526 break;
527
528 case nir_cf_node_loop:
529 emit_loop(ctx, nir_cf_node_as_loop(node));
530 break;
531
532 default:
533 unreachable("Unknown control flow");
534 }
535 }
536
537 return start_block;
538 }
539
540 static int
541 glsl_type_size(const struct glsl_type *type, bool bindless)
542 {
543 return glsl_count_attribute_slots(type, false);
544 }
545
546 static void
547 bi_optimize_nir(nir_shader *nir)
548 {
549 bool progress;
550 unsigned lower_flrp = 16 | 32 | 64;
551
552 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
553 NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
554
555 nir_lower_tex_options lower_tex_options = {
556 .lower_txs_lod = true,
557 .lower_txp = ~0,
558 .lower_tex_without_implicit_lod = true,
559 .lower_txd = true,
560 };
561
562 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
563 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
564 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
565
566 do {
567 progress = false;
568
569 NIR_PASS(progress, nir, nir_lower_var_copies);
570 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
571
572 NIR_PASS(progress, nir, nir_copy_prop);
573 NIR_PASS(progress, nir, nir_opt_remove_phis);
574 NIR_PASS(progress, nir, nir_opt_dce);
575 NIR_PASS(progress, nir, nir_opt_dead_cf);
576 NIR_PASS(progress, nir, nir_opt_cse);
577 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
578 NIR_PASS(progress, nir, nir_opt_algebraic);
579 NIR_PASS(progress, nir, nir_opt_constant_folding);
580
581 if (lower_flrp != 0) {
582 bool lower_flrp_progress = false;
583 NIR_PASS(lower_flrp_progress,
584 nir,
585 nir_lower_flrp,
586 lower_flrp,
587 false /* always_precise */,
588 nir->options->lower_ffma);
589 if (lower_flrp_progress) {
590 NIR_PASS(progress, nir,
591 nir_opt_constant_folding);
592 progress = true;
593 }
594
595 /* Nothing should rematerialize any flrps, so we only
596 * need to do this lowering once.
597 */
598 lower_flrp = 0;
599 }
600
601 NIR_PASS(progress, nir, nir_opt_undef);
602 NIR_PASS(progress, nir, nir_opt_loop_unroll,
603 nir_var_shader_in |
604 nir_var_shader_out |
605 nir_var_function_temp);
606 } while (progress);
607
608 NIR_PASS(progress, nir, nir_opt_algebraic_late);
609 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
610 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
611
612 /* Take us out of SSA */
613 NIR_PASS(progress, nir, nir_lower_locals_to_regs);
614 NIR_PASS(progress, nir, nir_convert_from_ssa, true);
615
616 /* We're a primary scalar architecture but there's enough vector that
617 * we use a vector IR so let's not also deal with scalar hacks on top
618 * of the vector hacks */
619
620 NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
621 NIR_PASS(progress, nir, nir_lower_vec_to_movs);
622 NIR_PASS(progress, nir, nir_opt_dce);
623 }
624
625 void
626 bifrost_compile_shader_nir(nir_shader *nir, bifrost_program *program, unsigned product_id)
627 {
628 bi_context *ctx = rzalloc(NULL, bi_context);
629 ctx->nir = nir;
630 ctx->stage = nir->info.stage;
631 ctx->quirks = bifrost_get_quirks(product_id);
632 list_inithead(&ctx->blocks);
633
634 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
635 * (so we don't accidentally duplicate the epilogue since mesa/st has
636 * messed with our I/O quite a bit already) */
637
638 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
639
640 if (ctx->stage == MESA_SHADER_VERTEX) {
641 NIR_PASS_V(nir, nir_lower_viewport_transform);
642 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
643 }
644
645 NIR_PASS_V(nir, nir_split_var_copies);
646 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
647 NIR_PASS_V(nir, nir_lower_var_copies);
648 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
649 NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
650 NIR_PASS_V(nir, nir_lower_ssbo);
651
652 bi_optimize_nir(nir);
653 nir_print_shader(nir, stdout);
654
655 nir_foreach_function(func, nir) {
656 if (!func->impl)
657 continue;
658
659 ctx->impl = func->impl;
660 emit_cf_list(ctx, &func->impl->body);
661 break; /* TODO: Multi-function shaders */
662 }
663
664 bi_print_shader(ctx, stdout);
665 bi_schedule(ctx);
666
667 ralloc_free(ctx);
668 }