src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "compiler/nir/nir_builder.h"
  31
  32 #include "disassemble.h"
  33 #include "bifrost_compile.h"
  34 #include "bifrost_nir.h"
  35 #include "compiler.h"
  36 #include "bi_quirks.h"
  37 #include "bi_print.h"
  38
  39 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  40 static bi_instruction *bi_emit_branch(bi_context *ctx);
  41 static void bi_schedule_barrier(bi_context *ctx);
  42
  43 static void
  44 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  45 {
  46         bi_instruction *branch = bi_emit_branch(ctx);
  47
  48         switch (instr->type) {
  49         case nir_jump_break:
  50                 branch->branch.target = ctx->break_block;
  51                 break;
  52         case nir_jump_continue:
  53                 branch->branch.target = ctx->continue_block;
  54                 break;
  55         default:
  56                 unreachable("Unhandled jump type");
  57         }
  58
  59         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  60 }
  61
  62 static bi_instruction
  63 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  64 {
  65         bi_instruction load = {
  66                 .type = T,
  67                 .vector_channels = instr->num_components,
  68                 .src = { BIR_INDEX_CONSTANT },
  69                 .src_types = { nir_type_uint32 },
  70                 .constant = { .u64 = nir_intrinsic_base(instr) },
  71         };
  72
  73         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  74
  75         if (info->has_dest)
  76                 load.dest = pan_dest_index(&instr->dest);
  77
  78         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  79                 load.dest_type = nir_intrinsic_type(instr);
  80
  81         nir_src *offset = nir_get_io_offset_src(instr);
  82
  83         if (nir_src_is_const(*offset))
  84                 load.constant.u64 += nir_src_as_uint(*offset);
  85         else
  86                 load.src[0] = pan_src_index(offset);
  87
  88         return load;
  89 }
  90
  91 static void
  92 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
  93 {
  94         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
  95         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
  96         ins.load_vary.reuse = false; /* TODO */
  97         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
  98         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest);
  99
 100         if (nir_src_is_const(*nir_get_io_offset_src(instr))) {
 101                 /* Zero it out for direct */
 102                 ins.src[1] = BIR_INDEX_ZERO;
 103         } else {
 104                 /* R61 contains sample mask stuff, TODO RA XXX */
 105                 ins.src[1] = BIR_INDEX_REGISTER | 61;
 106         }
 107
 108         bi_emit(ctx, ins);
 109 }
 110
 111 static void
 112 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 113 {
 114         if (!ctx->emitted_atest) {
 115                 bi_instruction ins = {
 116                         .type = BI_ATEST,
 117                         .src = {
 118                                 BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 119                                 pan_src_index(&instr->src[0])
 120                         },
 121                         .src_types = {
 122                                 nir_type_uint32,
 123                                 nir_intrinsic_type(instr)
 124                         },
 125                         .swizzle = {
 126                                 { 0 },
 127                                 { 3, 0 } /* swizzle out the alpha */
 128                         },
 129                         .dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 130                         .dest_type = nir_type_uint32,
 131                 };
 132
 133                 bi_emit(ctx, ins);
 134                 bi_schedule_barrier(ctx);
 135                 ctx->emitted_atest = true;
 136         }
 137
 138         bi_instruction blend = {
 139                 .type = BI_BLEND,
 140                 .blend_location = nir_intrinsic_base(instr),
 141                 .src = {
 142                         pan_src_index(&instr->src[0]),
 143                         BIR_INDEX_REGISTER | 60 /* Can this be arbitrary? */,
 144                 },
 145                 .src_types = {
 146                         nir_intrinsic_type(instr),
 147                         nir_type_uint32
 148                 },
 149                 .swizzle = {
 150                         { 0, 1, 2, 3 },
 151                         { 0 }
 152                 },
 153                 .dest = BIR_INDEX_REGISTER | 48 /* Looks like magic */,
 154                 .dest_type = nir_type_uint32,
 155                 .vector_channels = 4
 156         };
 157
 158         assert(blend.blend_location < BIFROST_MAX_RENDER_TARGET_COUNT);
 159         assert(ctx->blend_types);
 160         assert(blend.src_types[0]);
 161         ctx->blend_types[blend.blend_location] = blend.src_types[0];
 162
 163         bi_emit(ctx, blend);
 164         bi_schedule_barrier(ctx);
 165 }
 166
 167 static bi_instruction
 168 bi_load_with_r61(enum bi_class T, nir_intrinsic_instr *instr)
 169 {
 170         bi_instruction ld = bi_load(T, instr);
 171         ld.src[1] = BIR_INDEX_REGISTER | 61; /* TODO: RA */
 172         ld.src[2] = BIR_INDEX_REGISTER | 62;
 173         ld.src[3] = 0;
 174         ld.src_types[1] = nir_type_uint32;
 175         ld.src_types[2] = nir_type_uint32;
 176         ld.src_types[3] = nir_intrinsic_type(instr);
 177         return ld;
 178 }
 179
 180 static void
 181 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 182 {
 183         bi_instruction address = bi_load_with_r61(BI_LOAD_VAR_ADDRESS, instr);
 184         address.dest = bi_make_temp(ctx);
 185         address.dest_type = nir_type_uint32;
 186         address.vector_channels = 3;
 187
 188         unsigned nr = nir_intrinsic_src_components(instr, 0);
 189         assert(nir_intrinsic_write_mask(instr) == ((1 << nr) - 1));
 190
 191         bi_instruction st = {
 192                 .type = BI_STORE_VAR,
 193                 .src = {
 194                         pan_src_index(&instr->src[0]),
 195                         address.dest, address.dest, address.dest,
 196                 },
 197                 .src_types = {
 198                         nir_type_uint32,
 199                         nir_type_uint32, nir_type_uint32, nir_type_uint32,
 200                 },
 201                 .swizzle = {
 202                         { 0 },
 203                         { 0 }, { 1 }, { 2}
 204                 },
 205                 .vector_channels = nr,
 206         };
 207
 208         for (unsigned i = 0; i < nr; ++i)
 209                 st.swizzle[0][i] = i;
 210
 211         bi_emit(ctx, address);
 212         bi_emit(ctx, st);
 213 }
 214
 215 static void
 216 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 217 {
 218         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 219         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 220
 221         /* TODO: Indirect access, since we need to multiply by the element
 222          * size. I believe we can get this lowering automatically via
 223          * nir_lower_io (as mul instructions) with the proper options, but this
 224          * is TODO */
 225         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 226         ld.constant.u64 += ctx->sysvals.sysval_count;
 227         ld.constant.u64 *= 16;
 228
 229         bi_emit(ctx, ld);
 230 }
 231
 232 static void
 233 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 234                 unsigned nr_components, unsigned offset)
 235 {
 236         nir_dest nir_dest;
 237
 238         /* Figure out which uniform this is */
 239         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 240         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 241
 242         /* Sysvals are prefix uniforms */
 243         unsigned uniform = ((uintptr_t) val) - 1;
 244
 245         /* Emit the read itself -- this is never indirect */
 246
 247         bi_instruction load = {
 248                 .type = BI_LOAD_UNIFORM,
 249                 .vector_channels = nr_components,
 250                 .src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
 251                 .src_types = { nir_type_uint32, nir_type_uint32 },
 252                 .constant = { (uniform * 16) + offset },
 253                 .dest = pan_dest_index(&nir_dest),
 254                 .dest_type = nir_type_uint32, /* TODO */
 255         };
 256
 257         bi_emit(ctx, load);
 258 }
 259
 260 static void
 261 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 262 {
 263
 264         switch (instr->intrinsic) {
 265         case nir_intrinsic_load_barycentric_pixel:
 266                 /* stub */
 267                 break;
 268         case nir_intrinsic_load_interpolated_input:
 269         case nir_intrinsic_load_input:
 270                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 271                         bi_emit_ld_vary(ctx, instr);
 272                 else if (ctx->stage == MESA_SHADER_VERTEX)
 273                         bi_emit(ctx, bi_load_with_r61(BI_LOAD_ATTR, instr));
 274                 else {
 275                         unreachable("Unsupported shader stage");
 276                 }
 277                 break;
 278
 279         case nir_intrinsic_store_output:
 280                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 281                         bi_emit_frag_out(ctx, instr);
 282                 else if (ctx->stage == MESA_SHADER_VERTEX)
 283                         bi_emit_st_vary(ctx, instr);
 284                 else
 285                         unreachable("Unsupported shader stage");
 286                 break;
 287
 288         case nir_intrinsic_load_uniform:
 289                 bi_emit_ld_uniform(ctx, instr);
 290                 break;
 291
 292         case nir_intrinsic_load_ssbo_address:
 293                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 294                 break;
 295
 296         case nir_intrinsic_get_buffer_size:
 297                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 298                 break;
 299
 300         case nir_intrinsic_load_viewport_scale:
 301         case nir_intrinsic_load_viewport_offset:
 302         case nir_intrinsic_load_num_work_groups:
 303         case nir_intrinsic_load_sampler_lod_parameters_pan:
 304                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 305                 break;
 306
 307         default:
 308                 /* todo */
 309                 break;
 310         }
 311 }
 312
 313 static void
 314 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 315 {
 316         /* Make sure we've been lowered */
 317         assert(instr->def.num_components == 1);
 318
 319         bi_instruction move = {
 320                 .type = BI_MOV,
 321                 .dest = pan_ssa_index(&instr->def),
 322                 .dest_type = instr->def.bit_size | nir_type_uint,
 323                 .src = {
 324                         BIR_INDEX_CONSTANT
 325                 },
 326                 .src_types = {
 327                         instr->def.bit_size | nir_type_uint,
 328                 },
 329                 .constant = {
 330                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 331                 }
 332         };
 333
 334         bi_emit(ctx, move);
 335 }
 336
 337 #define BI_CASE_CMP(op) \
 338         case op##8: \
 339         case op##16: \
 340         case op##32: \
 341
 342 static enum bi_class
 343 bi_class_for_nir_alu(nir_op op)
 344 {
 345         switch (op) {
 346         case nir_op_iadd:
 347         case nir_op_fadd:
 348         case nir_op_fsub:
 349                 return BI_ADD;
 350         case nir_op_isub:
 351                 return BI_ISUB;
 352
 353         case nir_op_iand:
 354         case nir_op_ior:
 355         case nir_op_ixor:
 356                 return BI_BITWISE;
 357
 358         BI_CASE_CMP(nir_op_flt)
 359         BI_CASE_CMP(nir_op_fge)
 360         BI_CASE_CMP(nir_op_feq)
 361         BI_CASE_CMP(nir_op_fne)
 362         BI_CASE_CMP(nir_op_ilt)
 363         BI_CASE_CMP(nir_op_ige)
 364         BI_CASE_CMP(nir_op_ieq)
 365         BI_CASE_CMP(nir_op_ine)
 366                 return BI_CMP;
 367
 368         case nir_op_b8csel:
 369         case nir_op_b16csel:
 370         case nir_op_b32csel:
 371                 return BI_CSEL;
 372
 373         case nir_op_i2i8:
 374         case nir_op_i2i16:
 375         case nir_op_i2i32:
 376         case nir_op_i2i64:
 377         case nir_op_u2u8:
 378         case nir_op_u2u16:
 379         case nir_op_u2u32:
 380         case nir_op_u2u64:
 381         case nir_op_f2i16:
 382         case nir_op_f2i32:
 383         case nir_op_f2i64:
 384         case nir_op_f2u16:
 385         case nir_op_f2u32:
 386         case nir_op_f2u64:
 387         case nir_op_i2f16:
 388         case nir_op_i2f32:
 389         case nir_op_i2f64:
 390         case nir_op_u2f16:
 391         case nir_op_u2f32:
 392         case nir_op_u2f64:
 393         case nir_op_f2f16:
 394         case nir_op_f2f32:
 395         case nir_op_f2f64:
 396         case nir_op_f2fmp:
 397                 return BI_CONVERT;
 398
 399         case nir_op_vec2:
 400         case nir_op_vec3:
 401         case nir_op_vec4:
 402                 return BI_COMBINE;
 403
 404         case nir_op_vec8:
 405         case nir_op_vec16:
 406                 unreachable("should've been lowered");
 407
 408         case nir_op_ffma:
 409         case nir_op_fmul:
 410                 return BI_FMA;
 411
 412         case nir_op_imin:
 413         case nir_op_imax:
 414         case nir_op_umin:
 415         case nir_op_umax:
 416         case nir_op_fmin:
 417         case nir_op_fmax:
 418                 return BI_MINMAX;
 419
 420         case nir_op_fsat:
 421         case nir_op_fneg:
 422         case nir_op_fabs:
 423                 return BI_FMOV;
 424         case nir_op_mov:
 425                 return BI_MOV;
 426
 427         case nir_op_fround_even:
 428         case nir_op_fceil:
 429         case nir_op_ffloor:
 430         case nir_op_ftrunc:
 431                 return BI_ROUND;
 432
 433         case nir_op_frcp:
 434         case nir_op_frsq:
 435                 return BI_SPECIAL;
 436
 437         default:
 438                 unreachable("Unknown ALU op");
 439         }
 440 }
 441
 442 /* Gets a bi_cond for a given NIR comparison opcode. In soft mode, it will
 443  * return BI_COND_ALWAYS as a sentinel if it fails to do so (when used for
 444  * optimizations). Otherwise it will bail (when used for primary code
 445  * generation). */
 446
 447 static enum bi_cond
 448 bi_cond_for_nir(nir_op op, bool soft)
 449 {
 450         switch (op) {
 451         BI_CASE_CMP(nir_op_flt)
 452         BI_CASE_CMP(nir_op_ilt)
 453                 return BI_COND_LT;
 454
 455         BI_CASE_CMP(nir_op_fge)
 456         BI_CASE_CMP(nir_op_ige)
 457                 return BI_COND_GE;
 458
 459         BI_CASE_CMP(nir_op_feq)
 460         BI_CASE_CMP(nir_op_ieq)
 461                 return BI_COND_EQ;
 462
 463         BI_CASE_CMP(nir_op_fne)
 464         BI_CASE_CMP(nir_op_ine)
 465                 return BI_COND_NE;
 466         default:
 467                 if (soft)
 468                         return BI_COND_ALWAYS;
 469                 else
 470                         unreachable("Invalid compare");
 471         }
 472 }
 473
 474 static void
 475 bi_copy_src(bi_instruction *alu, nir_alu_instr *instr, unsigned i, unsigned to,
 476                 unsigned *constants_left, unsigned *constant_shift, unsigned comps)
 477 {
 478         unsigned bits = nir_src_bit_size(instr->src[i].src);
 479         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 480
 481         alu->src_types[to] = nir_op_infos[instr->op].input_types[i]
 482                 | bits;
 483
 484         /* Try to inline a constant */
 485         if (nir_src_is_const(instr->src[i].src) && *constants_left && (dest_bits == bits)) {
 486                 uint64_t mask = (1ull << dest_bits) - 1;
 487                 uint64_t cons = nir_src_as_uint(instr->src[i].src);
 488
 489                 /* Try to reuse a constant */
 490                 for (unsigned i = 0; i < (*constant_shift); i += dest_bits) {
 491                         if (((alu->constant.u64 >> i) & mask) == cons) {
 492                                 alu->src[to] = BIR_INDEX_CONSTANT | i;
 493                                 return;
 494                         }
 495                 }
 496
 497                 alu->constant.u64 |= cons << *constant_shift;
 498                 alu->src[to] = BIR_INDEX_CONSTANT | (*constant_shift);
 499                 --(*constants_left);
 500                 (*constant_shift) += MAX2(dest_bits, 32); /* lo/hi */
 501                 return;
 502         }
 503
 504         alu->src[to] = pan_src_index(&instr->src[i].src);
 505
 506         /* Copy swizzle for all vectored components, replicating last component
 507          * to fill undersized */
 508
 509         unsigned vec = alu->type == BI_COMBINE ? 1 :
 510                 MAX2(1, 32 / dest_bits);
 511
 512         for (unsigned j = 0; j < vec; ++j)
 513                 alu->swizzle[to][j] = instr->src[i].swizzle[MIN2(j, comps - 1)];
 514 }
 515
 516 static void
 517 bi_fuse_csel_cond(bi_instruction *csel, nir_alu_src cond,
 518                 unsigned *constants_left, unsigned *constant_shift, unsigned comps)
 519 {
 520         /* Bail for vector weirdness */
 521         if (cond.swizzle[0] != 0)
 522                 return;
 523
 524         if (!cond.src.is_ssa)
 525                 return;
 526
 527         nir_ssa_def *def = cond.src.ssa;
 528         nir_instr *parent = def->parent_instr;
 529
 530         if (parent->type != nir_instr_type_alu)
 531                 return;
 532
 533         nir_alu_instr *alu = nir_instr_as_alu(parent);
 534
 535         /* Try to match a condition */
 536         enum bi_cond bcond = bi_cond_for_nir(alu->op, true);
 537
 538         if (bcond == BI_COND_ALWAYS)
 539                 return;
 540
 541         /* We found one, let's fuse it in */
 542         csel->cond = bcond;
 543         bi_copy_src(csel, alu, 0, 0, constants_left, constant_shift, comps);
 544         bi_copy_src(csel, alu, 1, 1, constants_left, constant_shift, comps);
 545 }
 546
 547 static void
 548 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 549 {
 550         /* Try some special functions */
 551         switch (instr->op) {
 552         case nir_op_fexp2:
 553                 bi_emit_fexp2(ctx, instr);
 554                 return;
 555         case nir_op_flog2:
 556                 bi_emit_flog2(ctx, instr);
 557                 return;
 558         default:
 559                 break;
 560         }
 561
 562         /* Otherwise, assume it's something we can handle normally */
 563         bi_instruction alu = {
 564                 .type = bi_class_for_nir_alu(instr->op),
 565                 .dest = pan_dest_index(&instr->dest.dest),
 566                 .dest_type = nir_op_infos[instr->op].output_type
 567                         | nir_dest_bit_size(instr->dest.dest),
 568         };
 569
 570         /* TODO: Implement lowering of special functions for older Bifrost */
 571         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 572
 573         unsigned comps = nir_dest_num_components(instr->dest.dest);
 574
 575         if (alu.type != BI_COMBINE)
 576                 assert(comps <= MAX2(1, 32 / comps));
 577
 578         if (!instr->dest.dest.is_ssa) {
 579                 for (unsigned i = 0; i < comps; ++i)
 580                         assert(instr->dest.write_mask);
 581         }
 582
 583         /* We inline constants as we go. This tracks how many constants have
 584          * been inlined, since we're limited to 64-bits of constants per
 585          * instruction */
 586
 587         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 588         unsigned constants_left = (64 / dest_bits);
 589         unsigned constant_shift = 0;
 590
 591         if (alu.type == BI_COMBINE)
 592                 constants_left = 0;
 593
 594         /* Copy sources */
 595
 596         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 597         assert(num_inputs <= ARRAY_SIZE(alu.src));
 598
 599         for (unsigned i = 0; i < num_inputs; ++i) {
 600                 unsigned f = 0;
 601
 602                 if (i && alu.type == BI_CSEL)
 603                         f++;
 604
 605                 bi_copy_src(&alu, instr, i, i + f, &constants_left, &constant_shift, comps);
 606         }
 607
 608         /* Op-specific fixup */
 609         switch (instr->op) {
 610         case nir_op_fmul:
 611                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 612                 alu.src_types[2] = alu.src_types[1];
 613                 break;
 614         case nir_op_fsat:
 615                 alu.outmod = BIFROST_SAT; /* FMOV */
 616                 break;
 617         case nir_op_fneg:
 618                 alu.src_neg[0] = true; /* FMOV */
 619                 break;
 620         case nir_op_fabs:
 621                 alu.src_abs[0] = true; /* FMOV */
 622                 break;
 623         case nir_op_fsub:
 624                 alu.src_neg[1] = true; /* FADD */
 625                 break;
 626         case nir_op_fmax:
 627         case nir_op_imax:
 628         case nir_op_umax:
 629                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 630                 break;
 631         case nir_op_frcp:
 632                 alu.op.special = BI_SPECIAL_FRCP;
 633                 break;
 634         case nir_op_frsq:
 635                 alu.op.special = BI_SPECIAL_FRSQ;
 636                 break;
 637         BI_CASE_CMP(nir_op_flt)
 638         BI_CASE_CMP(nir_op_ilt)
 639         BI_CASE_CMP(nir_op_fge)
 640         BI_CASE_CMP(nir_op_ige)
 641         BI_CASE_CMP(nir_op_feq)
 642         BI_CASE_CMP(nir_op_ieq)
 643         BI_CASE_CMP(nir_op_fne)
 644         BI_CASE_CMP(nir_op_ine)
 645                 alu.cond = bi_cond_for_nir(instr->op, false);
 646                 break;
 647         case nir_op_fround_even:
 648                 alu.roundmode = BIFROST_RTE;
 649                 break;
 650         case nir_op_fceil:
 651                 alu.roundmode = BIFROST_RTP;
 652                 break;
 653         case nir_op_ffloor:
 654                 alu.roundmode = BIFROST_RTN;
 655                 break;
 656         case nir_op_ftrunc:
 657                 alu.roundmode = BIFROST_RTZ;
 658                 break;
 659         case nir_op_iand:
 660                 alu.op.bitwise = BI_BITWISE_AND;
 661                 break;
 662         case nir_op_ior:
 663                 alu.op.bitwise = BI_BITWISE_OR;
 664                 break;
 665         case nir_op_ixor:
 666                 alu.op.bitwise = BI_BITWISE_XOR;
 667                 break;
 668         default:
 669                 break;
 670         }
 671
 672         if (alu.type == BI_CSEL) {
 673                 /* Default to csel3 */
 674                 alu.cond = BI_COND_NE;
 675                 alu.src[1] = BIR_INDEX_ZERO;
 676                 alu.src_types[1] = alu.src_types[0];
 677
 678                 bi_fuse_csel_cond(&alu, instr->src[0],
 679                                 &constants_left, &constant_shift, comps);
 680         } else if (alu.type == BI_BITWISE) {
 681                 /* Implicit shift argument... at some point we should fold */
 682                 alu.src[2] = BIR_INDEX_ZERO;
 683                 alu.src_types[2] = alu.src_types[1];
 684         }
 685
 686         bi_emit(ctx, alu);
 687 }
 688
 689 /* TEX_COMPACT instructions assume normal 2D f32 operation but are more
 690  * space-efficient and with simpler RA/scheduling requirements*/
 691
 692 static void
 693 emit_tex_compact(bi_context *ctx, nir_tex_instr *instr)
 694 {
 695         bi_instruction tex = {
 696                 .type = BI_TEX,
 697                 .op = { .texture = BI_TEX_COMPACT },
 698                 .texture = {
 699                         .texture_index = instr->texture_index,
 700                         .sampler_index = instr->sampler_index,
 701                 },
 702                 .dest = pan_dest_index(&instr->dest),
 703                 .dest_type = instr->dest_type,
 704                 .src_types = { nir_type_float32, nir_type_float32 },
 705                 .vector_channels = 4
 706         };
 707
 708         for (unsigned i = 0; i < instr->num_srcs; ++i) {
 709                 int index = pan_src_index(&instr->src[i].src);
 710                 assert (instr->src[i].src_type == nir_tex_src_coord);
 711
 712                 tex.src[0] = index;
 713                 tex.src[1] = index;
 714                 tex.swizzle[0][0] = 0;
 715                 tex.swizzle[1][0] = 1;
 716         }
 717
 718         bi_emit(ctx, tex);
 719 }
 720
 721 static void
 722 emit_tex_full(bi_context *ctx, nir_tex_instr *instr)
 723 {
 724         unreachable("stub");
 725 }
 726
 727 static void
 728 emit_tex(bi_context *ctx, nir_tex_instr *instr)
 729 {
 730         nir_alu_type base = nir_alu_type_get_base_type(instr->dest_type);
 731         unsigned sz =  nir_dest_bit_size(instr->dest);
 732         instr->dest_type = base | sz;
 733
 734         bool is_normal = instr->op == nir_texop_tex;
 735         bool is_2d = instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
 736                 instr->sampler_dim == GLSL_SAMPLER_DIM_EXTERNAL;
 737         bool is_f = base == nir_type_float && (sz == 16 || sz == 32);
 738
 739         bool is_compact = is_normal && is_2d && is_f && !instr->is_shadow;
 740
 741         if (is_compact)
 742                 emit_tex_compact(ctx, instr);
 743         else
 744                 emit_tex_full(ctx, instr);
 745 }
 746
 747 static void
 748 emit_instr(bi_context *ctx, struct nir_instr *instr)
 749 {
 750         switch (instr->type) {
 751         case nir_instr_type_load_const:
 752                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 753                 break;
 754
 755         case nir_instr_type_intrinsic:
 756                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 757                 break;
 758
 759         case nir_instr_type_alu:
 760                 emit_alu(ctx, nir_instr_as_alu(instr));
 761                 break;
 762
 763         case nir_instr_type_tex:
 764                 emit_tex(ctx, nir_instr_as_tex(instr));
 765                 break;
 766
 767         case nir_instr_type_jump:
 768                 emit_jump(ctx, nir_instr_as_jump(instr));
 769                 break;
 770
 771         case nir_instr_type_ssa_undef:
 772                 /* Spurious */
 773                 break;
 774
 775         default:
 776                 unreachable("Unhandled instruction type");
 777                 break;
 778         }
 779 }
 780
 781
 782
 783 static bi_block *
 784 create_empty_block(bi_context *ctx)
 785 {
 786         bi_block *blk = rzalloc(ctx, bi_block);
 787
 788         blk->base.predecessors = _mesa_set_create(blk,
 789                         _mesa_hash_pointer,
 790                         _mesa_key_pointer_equal);
 791
 792         blk->base.name = ctx->block_name_count++;
 793
 794         return blk;
 795 }
 796
 797 static void
 798 bi_schedule_barrier(bi_context *ctx)
 799 {
 800         bi_block *temp = ctx->after_block;
 801         ctx->after_block = create_empty_block(ctx);
 802         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 803         list_inithead(&ctx->after_block->base.instructions);
 804         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 805         ctx->current_block = ctx->after_block;
 806         ctx->after_block = temp;
 807 }
 808
 809 static bi_block *
 810 emit_block(bi_context *ctx, nir_block *block)
 811 {
 812         if (ctx->after_block) {
 813                 ctx->current_block = ctx->after_block;
 814                 ctx->after_block = NULL;
 815         } else {
 816                 ctx->current_block = create_empty_block(ctx);
 817         }
 818
 819         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 820         list_inithead(&ctx->current_block->base.instructions);
 821
 822         nir_foreach_instr(instr, block) {
 823                 emit_instr(ctx, instr);
 824                 ++ctx->instruction_count;
 825         }
 826
 827         return ctx->current_block;
 828 }
 829
 830 /* Emits an unconditional branch to the end of the current block, returning a
 831  * pointer so the user can fill in details */
 832
 833 static bi_instruction *
 834 bi_emit_branch(bi_context *ctx)
 835 {
 836         bi_instruction branch = {
 837                 .type = BI_BRANCH,
 838                 .branch = {
 839                         .cond = BI_COND_ALWAYS
 840                 }
 841         };
 842
 843         return bi_emit(ctx, branch);
 844 }
 845
 846 /* Sets a condition for a branch by examing the NIR condition. If we're
 847  * familiar with the condition, we unwrap it to fold it into the branch
 848  * instruction. Otherwise, we consume the condition directly. We
 849  * generally use 1-bit booleans which allows us to use small types for
 850  * the conditions.
 851  */
 852
 853 static void
 854 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 855 {
 856         /* TODO: Try to unwrap instead of always bailing */
 857         branch->src[0] = pan_src_index(cond);
 858         branch->src[1] = BIR_INDEX_ZERO;
 859         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 860         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 861 }
 862
 863 static void
 864 emit_if(bi_context *ctx, nir_if *nif)
 865 {
 866         bi_block *before_block = ctx->current_block;
 867
 868         /* Speculatively emit the branch, but we can't fill it in until later */
 869         bi_instruction *then_branch = bi_emit_branch(ctx);
 870         bi_set_branch_cond(then_branch, &nif->condition, true);
 871
 872         /* Emit the two subblocks. */
 873         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 874         bi_block *end_then_block = ctx->current_block;
 875
 876         /* Emit a jump from the end of the then block to the end of the else */
 877         bi_instruction *then_exit = bi_emit_branch(ctx);
 878
 879         /* Emit second block, and check if it's empty */
 880
 881         int count_in = ctx->instruction_count;
 882         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 883         bi_block *end_else_block = ctx->current_block;
 884         ctx->after_block = create_empty_block(ctx);
 885
 886         /* Now that we have the subblocks emitted, fix up the branches */
 887
 888         assert(then_block);
 889         assert(else_block);
 890
 891         if (ctx->instruction_count == count_in) {
 892                 /* The else block is empty, so don't emit an exit jump */
 893                 bi_remove_instruction(then_exit);
 894                 then_branch->branch.target = ctx->after_block;
 895         } else {
 896                 then_branch->branch.target = else_block;
 897                 then_exit->branch.target = ctx->after_block;
 898                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 899         }
 900
 901         /* Wire up the successors */
 902
 903         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 904
 905         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 906         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 907 }
 908
 909 static void
 910 emit_loop(bi_context *ctx, nir_loop *nloop)
 911 {
 912         /* Remember where we are */
 913         bi_block *start_block = ctx->current_block;
 914
 915         bi_block *saved_break = ctx->break_block;
 916         bi_block *saved_continue = ctx->continue_block;
 917
 918         ctx->continue_block = create_empty_block(ctx);
 919         ctx->break_block = create_empty_block(ctx);
 920         ctx->after_block = ctx->continue_block;
 921
 922         /* Emit the body itself */
 923         emit_cf_list(ctx, &nloop->body);
 924
 925         /* Branch back to loop back */
 926         bi_instruction *br_back = bi_emit_branch(ctx);
 927         br_back->branch.target = ctx->continue_block;
 928         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 929         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 930
 931         ctx->after_block = ctx->break_block;
 932
 933         /* Pop off */
 934         ctx->break_block = saved_break;
 935         ctx->continue_block = saved_continue;
 936         ++ctx->loop_count;
 937 }
 938
 939 static bi_block *
 940 emit_cf_list(bi_context *ctx, struct exec_list *list)
 941 {
 942         bi_block *start_block = NULL;
 943
 944         foreach_list_typed(nir_cf_node, node, node, list) {
 945                 switch (node->type) {
 946                 case nir_cf_node_block: {
 947                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 948
 949                         if (!start_block)
 950                                 start_block = block;
 951
 952                         break;
 953                 }
 954
 955                 case nir_cf_node_if:
 956                         emit_if(ctx, nir_cf_node_as_if(node));
 957                         break;
 958
 959                 case nir_cf_node_loop:
 960                         emit_loop(ctx, nir_cf_node_as_loop(node));
 961                         break;
 962
 963                 default:
 964                         unreachable("Unknown control flow");
 965                 }
 966         }
 967
 968         return start_block;
 969 }
 970
 971 static int
 972 glsl_type_size(const struct glsl_type *type, bool bindless)
 973 {
 974         return glsl_count_attribute_slots(type, false);
 975 }
 976
 977 static void
 978 bi_optimize_nir(nir_shader *nir)
 979 {
 980         bool progress;
 981         unsigned lower_flrp = 16 | 32 | 64;
 982
 983         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 984         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 985
 986         nir_lower_tex_options lower_tex_options = {
 987                 .lower_txs_lod = true,
 988                 .lower_txp = ~0,
 989                 .lower_tex_without_implicit_lod = true,
 990                 .lower_txd = true,
 991         };
 992
 993         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 994         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 995         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 996
 997         do {
 998                 progress = false;
 999
1000                 NIR_PASS(progress, nir, nir_lower_var_copies);
1001                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
1002
1003                 NIR_PASS(progress, nir, nir_copy_prop);
1004                 NIR_PASS(progress, nir, nir_opt_remove_phis);
1005                 NIR_PASS(progress, nir, nir_opt_dce);
1006                 NIR_PASS(progress, nir, nir_opt_dead_cf);
1007                 NIR_PASS(progress, nir, nir_opt_cse);
1008                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
1009                 NIR_PASS(progress, nir, nir_opt_algebraic);
1010                 NIR_PASS(progress, nir, nir_opt_constant_folding);
1011
1012                 if (lower_flrp != 0) {
1013                         bool lower_flrp_progress = false;
1014                         NIR_PASS(lower_flrp_progress,
1015                                  nir,
1016                                  nir_lower_flrp,
1017                                  lower_flrp,
1018                                  false /* always_precise */,
1019                                  nir->options->lower_ffma);
1020                         if (lower_flrp_progress) {
1021                                 NIR_PASS(progress, nir,
1022                                          nir_opt_constant_folding);
1023                                 progress = true;
1024                         }
1025
1026                         /* Nothing should rematerialize any flrps, so we only
1027                          * need to do this lowering once.
1028                          */
1029                         lower_flrp = 0;
1030                 }
1031
1032                 NIR_PASS(progress, nir, nir_opt_undef);
1033                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
1034                          nir_var_shader_in |
1035                          nir_var_shader_out |
1036                          nir_var_function_temp);
1037         } while (progress);
1038
1039         NIR_PASS(progress, nir, nir_opt_algebraic_late);
1040         NIR_PASS(progress, nir, nir_lower_bool_to_int32);
1041         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
1042         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
1043         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
1044
1045         /* Take us out of SSA */
1046         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
1047         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
1048         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
1049 }
1050
1051 void
1052 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
1053 {
1054         bi_context *ctx = rzalloc(NULL, bi_context);
1055         ctx->nir = nir;
1056         ctx->stage = nir->info.stage;
1057         ctx->quirks = bifrost_get_quirks(product_id);
1058         list_inithead(&ctx->blocks);
1059
1060         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
1061          * (so we don't accidentally duplicate the epilogue since mesa/st has
1062          * messed with our I/O quite a bit already) */
1063
1064         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1065
1066         if (ctx->stage == MESA_SHADER_VERTEX) {
1067                 NIR_PASS_V(nir, nir_lower_viewport_transform);
1068                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
1069         }
1070
1071         NIR_PASS_V(nir, nir_split_var_copies);
1072         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
1073         NIR_PASS_V(nir, nir_lower_var_copies);
1074         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
1075         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
1076         NIR_PASS_V(nir, nir_lower_ssbo);
1077         NIR_PASS_V(nir, nir_lower_mediump_outputs);
1078
1079         bi_optimize_nir(nir);
1080         nir_print_shader(nir, stdout);
1081
1082         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
1083         program->sysval_count = ctx->sysvals.sysval_count;
1084         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
1085         ctx->blend_types = program->blend_types;
1086
1087         nir_foreach_function(func, nir) {
1088                 if (!func->impl)
1089                         continue;
1090
1091                 ctx->impl = func->impl;
1092                 emit_cf_list(ctx, &func->impl->body);
1093                 break; /* TODO: Multi-function shaders */
1094         }
1095
1096         bi_foreach_block(ctx, _block) {
1097                 bi_block *block = (bi_block *) _block;
1098                 bi_lower_combine(ctx, block);
1099         }
1100
1101         bool progress = false;
1102
1103         do {
1104                 progress = false;
1105
1106                 bi_foreach_block(ctx, _block) {
1107                         bi_block *block = (bi_block *) _block;
1108                         progress |= bi_opt_dead_code_eliminate(ctx, block);
1109                 }
1110         } while(progress);
1111
1112         bi_print_shader(ctx, stdout);
1113         bi_schedule(ctx);
1114         bi_register_allocate(ctx);
1115         bi_print_shader(ctx, stdout);
1116         bi_pack(ctx, &program->compiled);
1117         disassemble_bifrost(stdout, program->compiled.data, program->compiled.size, true);
1118
1119         ralloc_free(ctx);
1120 }