src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "main/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_schedule_barrier(bi_context *ctx);
  43
  44 static void
  45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  46 {
  47         bi_instruction *branch = bi_emit_branch(ctx);
  48
  49         switch (instr->type) {
  50         case nir_jump_break:
  51                 branch->branch.target = ctx->break_block;
  52                 break;
  53         case nir_jump_continue:
  54                 branch->branch.target = ctx->continue_block;
  55                 break;
  56         default:
  57                 unreachable("Unhandled jump type");
  58         }
  59
  60         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  61 }
  62
  63 /* Gets a bytemask for a complete vecN write */
  64 static unsigned
  65 bi_mask_for_channels_32(unsigned i)
  66 {
  67         return (1 << (4 * i)) - 1;
  68 }
  69
  70 static bi_instruction
  71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  72 {
  73         bi_instruction load = {
  74                 .type = T,
  75                 .writemask = bi_mask_for_channels_32(instr->num_components),
  76                 .src = { BIR_INDEX_CONSTANT },
  77                 .constant = { .u64 = nir_intrinsic_base(instr) },
  78         };
  79
  80         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  81
  82         if (info->has_dest)
  83                 load.dest = bir_dest_index(&instr->dest);
  84
  85         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  86                 load.dest_type = nir_intrinsic_type(instr);
  87
  88         nir_src *offset = nir_get_io_offset_src(instr);
  89
  90         if (nir_src_is_const(*offset))
  91                 load.constant.u64 += nir_src_as_uint(*offset);
  92         else
  93                 load.src[0] = bir_src_index(offset);
  94
  95         return load;
  96 }
  97
  98 static void
  99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 100 {
 101         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 102         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 103         ins.load_vary.reuse = false; /* TODO */
 104         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 105         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest);
 106
 107         if (nir_src_is_const(*nir_get_io_offset_src(instr))) {
 108                 /* Zero it out for direct */
 109                 ins.src[1] = BIR_INDEX_ZERO;
 110         } else {
 111                 /* R61 contains sample mask stuff, TODO RA XXX */
 112                 ins.src[1] = BIR_INDEX_REGISTER | 61;
 113         }
 114
 115         bi_emit(ctx, ins);
 116 }
 117
 118 static void
 119 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 120 {
 121         if (!ctx->emitted_atest) {
 122                 bi_instruction ins = {
 123                         .type = BI_ATEST,
 124                         .src = {
 125                                 BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 126                                 bir_src_index(&instr->src[0])
 127                         },
 128                         .src_types = {
 129                                 nir_type_uint32,
 130                                 nir_type_float32
 131                         },
 132                         .swizzle = {
 133                                 { 0 },
 134                                 { 3, 0 } /* swizzle out the alpha */
 135                         },
 136                         .dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */,
 137                         .dest_type = nir_type_uint32,
 138                         .writemask = 0xF
 139                 };
 140
 141                 bi_emit(ctx, ins);
 142                 bi_schedule_barrier(ctx);
 143                 ctx->emitted_atest = true;
 144         }
 145
 146         bi_instruction blend = {
 147                 .type = BI_BLEND,
 148                 .blend_location = nir_intrinsic_base(instr),
 149                 .src = {
 150                         bir_src_index(&instr->src[0])
 151                 },
 152                 .src_types = {
 153                         nir_type_float32,
 154                 },
 155                 .swizzle = {
 156                         { 0, 1, 2, 3 }
 157                 }
 158         };
 159
 160         bi_emit(ctx, blend);
 161         bi_schedule_barrier(ctx);
 162 }
 163
 164 static void
 165 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 166 {
 167         bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
 168         address.dest = bi_make_temp(ctx);
 169         address.dest_type = nir_type_uint64;
 170         address.writemask = (1 << 8) - 1;
 171
 172         bi_instruction st = {
 173                 .type = BI_STORE_VAR,
 174                 .src = {
 175                         address.dest,
 176                         bir_src_index(&instr->src[0])
 177                 },
 178                 .src_types = {
 179                         nir_type_uint64,
 180                         nir_type_uint32
 181                 },
 182                 .swizzle = {
 183                         { 0 },
 184                         { 0, 1, 2, 3 }
 185                 }
 186         };
 187
 188         bi_emit(ctx, address);
 189         bi_emit(ctx, st);
 190 }
 191
 192 static void
 193 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 194 {
 195         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 196         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 197
 198         /* TODO: Indirect access, since we need to multiply by the element
 199          * size. I believe we can get this lowering automatically via
 200          * nir_lower_io (as mul instructions) with the proper options, but this
 201          * is TODO */
 202         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 203         ld.constant.u64 += ctx->sysvals.sysval_count;
 204         ld.constant.u64 *= 16;
 205
 206         bi_emit(ctx, ld);
 207 }
 208
 209 static void
 210 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 211                 unsigned nr_components, unsigned offset)
 212 {
 213         nir_dest nir_dest;
 214
 215         /* Figure out which uniform this is */
 216         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 217         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 218
 219         /* Sysvals are prefix uniforms */
 220         unsigned uniform = ((uintptr_t) val) - 1;
 221
 222         /* Emit the read itself -- this is never indirect */
 223
 224         bi_instruction load = {
 225                 .type = BI_LOAD_UNIFORM,
 226                 .writemask = (1 << (nr_components * 4)) - 1,
 227                 .src = { BIR_INDEX_CONSTANT},
 228                 .constant = { (uniform * 16) + offset },
 229                 .dest = bir_dest_index(&nir_dest),
 230                 .dest_type = nir_type_uint32, /* TODO */
 231         };
 232
 233         bi_emit(ctx, load);
 234 }
 235
 236 static void
 237 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 238 {
 239
 240         switch (instr->intrinsic) {
 241         case nir_intrinsic_load_barycentric_pixel:
 242                 /* stub */
 243                 break;
 244         case nir_intrinsic_load_interpolated_input:
 245         case nir_intrinsic_load_input:
 246                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 247                         bi_emit_ld_vary(ctx, instr);
 248                 else if (ctx->stage == MESA_SHADER_VERTEX)
 249                         bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
 250                 else {
 251                         unreachable("Unsupported shader stage");
 252                 }
 253                 break;
 254
 255         case nir_intrinsic_store_output:
 256                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 257                         bi_emit_frag_out(ctx, instr);
 258                 else if (ctx->stage == MESA_SHADER_VERTEX)
 259                         bi_emit_st_vary(ctx, instr);
 260                 else
 261                         unreachable("Unsupported shader stage");
 262                 break;
 263
 264         case nir_intrinsic_load_uniform:
 265                 bi_emit_ld_uniform(ctx, instr);
 266                 break;
 267
 268         case nir_intrinsic_load_ssbo_address:
 269                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 270                 break;
 271
 272         case nir_intrinsic_get_buffer_size:
 273                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 274                 break;
 275
 276         case nir_intrinsic_load_viewport_scale:
 277         case nir_intrinsic_load_viewport_offset:
 278         case nir_intrinsic_load_num_work_groups:
 279         case nir_intrinsic_load_sampler_lod_parameters_pan:
 280                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 281                 break;
 282
 283         default:
 284                 /* todo */
 285                 break;
 286         }
 287 }
 288
 289 static void
 290 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 291 {
 292         /* Make sure we've been lowered */
 293         assert(instr->def.num_components == 1);
 294
 295         bi_instruction move = {
 296                 .type = BI_MOV,
 297                 .dest = bir_ssa_index(&instr->def),
 298                 .dest_type = instr->def.bit_size | nir_type_uint,
 299                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 300                 .src = {
 301                         BIR_INDEX_CONSTANT
 302                 },
 303                 .constant = {
 304                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 305                 }
 306         };
 307
 308         bi_emit(ctx, move);
 309 }
 310
 311 static enum bi_class
 312 bi_class_for_nir_alu(nir_op op)
 313 {
 314         switch (op) {
 315         case nir_op_iadd:
 316         case nir_op_fadd:
 317         case nir_op_fsub:
 318                 return BI_ADD;
 319         case nir_op_isub:
 320                 return BI_ISUB;
 321
 322         case nir_op_flt:
 323         case nir_op_fge:
 324         case nir_op_feq:
 325         case nir_op_fne:
 326         case nir_op_ilt:
 327         case nir_op_ige:
 328         case nir_op_ieq:
 329         case nir_op_ine:
 330                 return BI_CMP;
 331
 332         case nir_op_bcsel:
 333                 return BI_CSEL;
 334
 335         case nir_op_i2i8:
 336         case nir_op_i2i16:
 337         case nir_op_i2i32:
 338         case nir_op_i2i64:
 339         case nir_op_u2u8:
 340         case nir_op_u2u16:
 341         case nir_op_u2u32:
 342         case nir_op_u2u64:
 343         case nir_op_f2i16:
 344         case nir_op_f2i32:
 345         case nir_op_f2i64:
 346         case nir_op_f2u16:
 347         case nir_op_f2u32:
 348         case nir_op_f2u64:
 349         case nir_op_i2f16:
 350         case nir_op_i2f32:
 351         case nir_op_i2f64:
 352         case nir_op_u2f16:
 353         case nir_op_u2f32:
 354         case nir_op_u2f64:
 355                 return BI_CONVERT;
 356
 357         case nir_op_ffma:
 358         case nir_op_fmul:
 359                 return BI_FMA;
 360
 361         case nir_op_imin:
 362         case nir_op_imax:
 363         case nir_op_umin:
 364         case nir_op_umax:
 365         case nir_op_fmin:
 366         case nir_op_fmax:
 367                 return BI_MINMAX;
 368
 369         case nir_op_fsat:
 370         case nir_op_fneg:
 371         case nir_op_fabs:
 372         case nir_op_mov:
 373                 return BI_MOV;
 374
 375         case nir_op_frcp:
 376         case nir_op_frsq:
 377         case nir_op_fsin:
 378         case nir_op_fcos:
 379                 return BI_SPECIAL;
 380
 381         default:
 382                 unreachable("Unknown ALU op");
 383         }
 384 }
 385
 386 static enum bi_cond
 387 bi_cond_for_nir(nir_op op)
 388 {
 389         switch (op) {
 390         case nir_op_flt:
 391         case nir_op_ilt:
 392                 return BI_COND_LT;
 393         case nir_op_fge:
 394         case nir_op_ige:
 395                 return BI_COND_GE;
 396         case nir_op_feq:
 397         case nir_op_ieq:
 398                 return BI_COND_EQ;
 399         case nir_op_fne:
 400         case nir_op_ine:
 401                 return BI_COND_NE;
 402         default:
 403                 unreachable("Invalid compare");
 404         }
 405 }
 406
 407 static void
 408 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 409 {
 410         /* Assume it's something we can handle normally */
 411         bi_instruction alu = {
 412                 .type = bi_class_for_nir_alu(instr->op),
 413                 .dest = bir_dest_index(&instr->dest.dest),
 414                 .dest_type = nir_op_infos[instr->op].output_type
 415                         | nir_dest_bit_size(instr->dest.dest),
 416         };
 417
 418         /* TODO: Implement lowering of special functions for older Bifrost */
 419         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 420
 421         if (instr->dest.dest.is_ssa) {
 422                 /* Construct a writemask */
 423                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 424                 unsigned comps = instr->dest.dest.ssa.num_components;
 425                 assert(comps == 1);
 426                 unsigned bits = bits_per_comp * comps;
 427                 unsigned bytes = MAX2(bits / 8, 1);
 428                 alu.writemask = (1 << bytes) - 1;
 429         } else {
 430                 unsigned comp_mask = instr->dest.write_mask;
 431
 432                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 433                                 comp_mask);
 434         }
 435
 436         /* We inline constants as we go. This tracks how many constants have
 437          * been inlined, since we're limited to 64-bits of constants per
 438          * instruction */
 439
 440         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 441         unsigned constants_left = (64 / dest_bits);
 442         unsigned constant_shift = 0;
 443
 444         /* Copy sources */
 445
 446         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 447         assert(num_inputs <= ARRAY_SIZE(alu.src));
 448
 449         for (unsigned i = 0; i < num_inputs; ++i) {
 450                 unsigned bits = nir_src_bit_size(instr->src[i].src);
 451                 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
 452                         | bits;
 453
 454                 /* Try to inline a constant */
 455                 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
 456                         alu.constant.u64 |=
 457                                 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
 458
 459                         alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
 460                         --constants_left;
 461                         constant_shift += dest_bits;
 462                         continue;
 463                 }
 464
 465                 alu.src[i] = bir_src_index(&instr->src[i].src);
 466
 467                 /* We assert scalarization above */
 468                 alu.swizzle[i][0] = instr->src[i].swizzle[0];
 469         }
 470
 471         /* Op-specific fixup */
 472         switch (instr->op) {
 473         case nir_op_fmul:
 474                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 475                 break;
 476         case nir_op_fsat:
 477                 alu.outmod = BIFROST_SAT; /* MOV */
 478                 break;
 479         case nir_op_fneg:
 480                 alu.src_neg[0] = true; /* MOV */
 481                 break;
 482         case nir_op_fabs:
 483                 alu.src_abs[0] = true; /* MOV */
 484                 break;
 485         case nir_op_fsub:
 486                 alu.src_neg[1] = true; /* ADD */
 487                 break;
 488         case nir_op_fmax:
 489         case nir_op_imax:
 490         case nir_op_umax:
 491                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 492                 break;
 493         case nir_op_frcp:
 494                 alu.op.special = BI_SPECIAL_FRCP;
 495                 break;
 496         case nir_op_frsq:
 497                 alu.op.special = BI_SPECIAL_FRSQ;
 498                 break;
 499         case nir_op_fsin:
 500                 alu.op.special = BI_SPECIAL_FSIN;
 501                 break;
 502         case nir_op_fcos:
 503                 alu.op.special = BI_SPECIAL_FCOS;
 504                 break;
 505         case nir_op_flt:
 506         case nir_op_ilt:
 507         case nir_op_fge:
 508         case nir_op_ige:
 509         case nir_op_feq:
 510         case nir_op_ieq:
 511         case nir_op_fne:
 512         case nir_op_ine:
 513                 alu.op.compare = bi_cond_for_nir(instr->op);
 514                 break;
 515         default:
 516                 break;
 517         }
 518
 519         bi_emit(ctx, alu);
 520 }
 521
 522 static void
 523 emit_instr(bi_context *ctx, struct nir_instr *instr)
 524 {
 525         switch (instr->type) {
 526         case nir_instr_type_load_const:
 527                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 528                 break;
 529
 530         case nir_instr_type_intrinsic:
 531                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 532                 break;
 533
 534         case nir_instr_type_alu:
 535                 emit_alu(ctx, nir_instr_as_alu(instr));
 536                 break;
 537
 538 #if 0
 539         case nir_instr_type_tex:
 540                 emit_tex(ctx, nir_instr_as_tex(instr));
 541                 break;
 542 #endif
 543
 544         case nir_instr_type_jump:
 545                 emit_jump(ctx, nir_instr_as_jump(instr));
 546                 break;
 547
 548         case nir_instr_type_ssa_undef:
 549                 /* Spurious */
 550                 break;
 551
 552         default:
 553                 //unreachable("Unhandled instruction type");
 554                 break;
 555         }
 556 }
 557
 558
 559
 560 static bi_block *
 561 create_empty_block(bi_context *ctx)
 562 {
 563         bi_block *blk = rzalloc(ctx, bi_block);
 564
 565         blk->base.predecessors = _mesa_set_create(blk,
 566                         _mesa_hash_pointer,
 567                         _mesa_key_pointer_equal);
 568
 569         blk->base.name = ctx->block_name_count++;
 570
 571         return blk;
 572 }
 573
 574 static void
 575 bi_schedule_barrier(bi_context *ctx)
 576 {
 577         bi_block *temp = ctx->after_block;
 578         ctx->after_block = create_empty_block(ctx);
 579         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 580         list_inithead(&ctx->after_block->base.instructions);
 581         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 582         ctx->current_block = ctx->after_block;
 583         ctx->after_block = temp;
 584 }
 585
 586 static bi_block *
 587 emit_block(bi_context *ctx, nir_block *block)
 588 {
 589         if (ctx->after_block) {
 590                 ctx->current_block = ctx->after_block;
 591                 ctx->after_block = NULL;
 592         } else {
 593                 ctx->current_block = create_empty_block(ctx);
 594         }
 595
 596         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 597         list_inithead(&ctx->current_block->base.instructions);
 598
 599         nir_foreach_instr(instr, block) {
 600                 emit_instr(ctx, instr);
 601                 ++ctx->instruction_count;
 602         }
 603
 604         return ctx->current_block;
 605 }
 606
 607 /* Emits an unconditional branch to the end of the current block, returning a
 608  * pointer so the user can fill in details */
 609
 610 static bi_instruction *
 611 bi_emit_branch(bi_context *ctx)
 612 {
 613         bi_instruction branch = {
 614                 .type = BI_BRANCH,
 615                 .branch = {
 616                         .cond = BI_COND_ALWAYS
 617                 }
 618         };
 619
 620         return bi_emit(ctx, branch);
 621 }
 622
 623 /* Sets a condition for a branch by examing the NIR condition. If we're
 624  * familiar with the condition, we unwrap it to fold it into the branch
 625  * instruction. Otherwise, we consume the condition directly. We
 626  * generally use 1-bit booleans which allows us to use small types for
 627  * the conditions.
 628  */
 629
 630 static void
 631 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 632 {
 633         /* TODO: Try to unwrap instead of always bailing */
 634         branch->src[0] = bir_src_index(cond);
 635         branch->src[1] = BIR_INDEX_ZERO;
 636         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 637         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 638 }
 639
 640 static void
 641 emit_if(bi_context *ctx, nir_if *nif)
 642 {
 643         bi_block *before_block = ctx->current_block;
 644
 645         /* Speculatively emit the branch, but we can't fill it in until later */
 646         bi_instruction *then_branch = bi_emit_branch(ctx);
 647         bi_set_branch_cond(then_branch, &nif->condition, true);
 648
 649         /* Emit the two subblocks. */
 650         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 651         bi_block *end_then_block = ctx->current_block;
 652
 653         /* Emit a jump from the end of the then block to the end of the else */
 654         bi_instruction *then_exit = bi_emit_branch(ctx);
 655
 656         /* Emit second block, and check if it's empty */
 657
 658         int count_in = ctx->instruction_count;
 659         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 660         bi_block *end_else_block = ctx->current_block;
 661         ctx->after_block = create_empty_block(ctx);
 662
 663         /* Now that we have the subblocks emitted, fix up the branches */
 664
 665         assert(then_block);
 666         assert(else_block);
 667
 668         if (ctx->instruction_count == count_in) {
 669                 /* The else block is empty, so don't emit an exit jump */
 670                 bi_remove_instruction(then_exit);
 671                 then_branch->branch.target = ctx->after_block;
 672         } else {
 673                 then_branch->branch.target = else_block;
 674                 then_exit->branch.target = ctx->after_block;
 675                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 676         }
 677
 678         /* Wire up the successors */
 679
 680         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 681
 682         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 683         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 684 }
 685
 686 static void
 687 emit_loop(bi_context *ctx, nir_loop *nloop)
 688 {
 689         /* Remember where we are */
 690         bi_block *start_block = ctx->current_block;
 691
 692         bi_block *saved_break = ctx->break_block;
 693         bi_block *saved_continue = ctx->continue_block;
 694
 695         ctx->continue_block = create_empty_block(ctx);
 696         ctx->break_block = create_empty_block(ctx);
 697         ctx->after_block = ctx->continue_block;
 698
 699         /* Emit the body itself */
 700         emit_cf_list(ctx, &nloop->body);
 701
 702         /* Branch back to loop back */
 703         bi_instruction *br_back = bi_emit_branch(ctx);
 704         br_back->branch.target = ctx->continue_block;
 705         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 706         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 707
 708         ctx->after_block = ctx->break_block;
 709
 710         /* Pop off */
 711         ctx->break_block = saved_break;
 712         ctx->continue_block = saved_continue;
 713         ++ctx->loop_count;
 714 }
 715
 716 static bi_block *
 717 emit_cf_list(bi_context *ctx, struct exec_list *list)
 718 {
 719         bi_block *start_block = NULL;
 720
 721         foreach_list_typed(nir_cf_node, node, node, list) {
 722                 switch (node->type) {
 723                 case nir_cf_node_block: {
 724                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 725
 726                         if (!start_block)
 727                                 start_block = block;
 728
 729                         break;
 730                 }
 731
 732                 case nir_cf_node_if:
 733                         emit_if(ctx, nir_cf_node_as_if(node));
 734                         break;
 735
 736                 case nir_cf_node_loop:
 737                         emit_loop(ctx, nir_cf_node_as_loop(node));
 738                         break;
 739
 740                 default:
 741                         unreachable("Unknown control flow");
 742                 }
 743         }
 744
 745         return start_block;
 746 }
 747
 748 static int
 749 glsl_type_size(const struct glsl_type *type, bool bindless)
 750 {
 751         return glsl_count_attribute_slots(type, false);
 752 }
 753
 754 static void
 755 bi_optimize_nir(nir_shader *nir)
 756 {
 757         bool progress;
 758         unsigned lower_flrp = 16 | 32 | 64;
 759
 760         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 761         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 762
 763         nir_lower_tex_options lower_tex_options = {
 764                 .lower_txs_lod = true,
 765                 .lower_txp = ~0,
 766                 .lower_tex_without_implicit_lod = true,
 767                 .lower_txd = true,
 768         };
 769
 770         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 771         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 772         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 773
 774         do {
 775                 progress = false;
 776
 777                 NIR_PASS(progress, nir, nir_lower_var_copies);
 778                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 779
 780                 NIR_PASS(progress, nir, nir_copy_prop);
 781                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 782                 NIR_PASS(progress, nir, nir_opt_dce);
 783                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 784                 NIR_PASS(progress, nir, nir_opt_cse);
 785                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 786                 NIR_PASS(progress, nir, nir_opt_algebraic);
 787                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 788
 789                 if (lower_flrp != 0) {
 790                         bool lower_flrp_progress = false;
 791                         NIR_PASS(lower_flrp_progress,
 792                                  nir,
 793                                  nir_lower_flrp,
 794                                  lower_flrp,
 795                                  false /* always_precise */,
 796                                  nir->options->lower_ffma);
 797                         if (lower_flrp_progress) {
 798                                 NIR_PASS(progress, nir,
 799                                          nir_opt_constant_folding);
 800                                 progress = true;
 801                         }
 802
 803                         /* Nothing should rematerialize any flrps, so we only
 804                          * need to do this lowering once.
 805                          */
 806                         lower_flrp = 0;
 807                 }
 808
 809                 NIR_PASS(progress, nir, nir_opt_undef);
 810                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 811                          nir_var_shader_in |
 812                          nir_var_shader_out |
 813                          nir_var_function_temp);
 814         } while (progress);
 815
 816         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 817         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 818         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 819         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 820
 821         /* Take us out of SSA */
 822         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 823         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 824
 825         /* We're a primary scalar architecture but there's enough vector that
 826          * we use a vector IR so let's not also deal with scalar hacks on top
 827          * of the vector hacks */
 828
 829         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 830         NIR_PASS(progress, nir, nir_lower_vec_to_movs);
 831         NIR_PASS(progress, nir, nir_opt_dce);
 832 }
 833
 834 void
 835 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 836 {
 837         bi_context *ctx = rzalloc(NULL, bi_context);
 838         ctx->nir = nir;
 839         ctx->stage = nir->info.stage;
 840         ctx->quirks = bifrost_get_quirks(product_id);
 841         list_inithead(&ctx->blocks);
 842
 843         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 844          * (so we don't accidentally duplicate the epilogue since mesa/st has
 845          * messed with our I/O quite a bit already) */
 846
 847         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 848
 849         if (ctx->stage == MESA_SHADER_VERTEX) {
 850                 NIR_PASS_V(nir, nir_lower_viewport_transform);
 851                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
 852         }
 853
 854         NIR_PASS_V(nir, nir_split_var_copies);
 855         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
 856         NIR_PASS_V(nir, nir_lower_var_copies);
 857         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 858         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
 859         NIR_PASS_V(nir, nir_lower_ssbo);
 860
 861         bi_optimize_nir(nir);
 862         nir_print_shader(nir, stdout);
 863
 864         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
 865         program->sysval_count = ctx->sysvals.sysval_count;
 866         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
 867
 868         nir_foreach_function(func, nir) {
 869                 if (!func->impl)
 870                         continue;
 871
 872                 ctx->impl = func->impl;
 873                 emit_cf_list(ctx, &func->impl->body);
 874                 break; /* TODO: Multi-function shaders */
 875         }
 876
 877         bool progress = false;
 878
 879         do {
 880                 progress = false;
 881
 882                 bi_foreach_block(ctx, _block) {
 883                         bi_block *block = (bi_block *) _block;
 884                         progress |= bi_opt_dead_code_eliminate(ctx, block);
 885                 }
 886         } while(progress);
 887
 888         bi_print_shader(ctx, stdout);
 889         bi_schedule(ctx);
 890         bi_register_allocate(ctx);
 891         bi_print_shader(ctx, stdout);
 892         bi_pack(ctx, &program->compiled);
 893         disassemble_bifrost(stdout, program->compiled.data, program->compiled.size, true);
 894
 895         ralloc_free(ctx);
 896 }