pan/bi: Switch to panfrost_program
[mesa.git] / src / panfrost / bifrost / bifrost_compile.c
1 /*
2 * Copyright (C) 2020 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors (Collabora):
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "main/mtypes.h"
28 #include "compiler/glsl/glsl_to_nir.h"
29 #include "compiler/nir_types.h"
30 #include "main/imports.h"
31 #include "compiler/nir/nir_builder.h"
32
33 #include "disassemble.h"
34 #include "bifrost_compile.h"
35 #include "bifrost_nir.h"
36 #include "compiler.h"
37 #include "bi_quirks.h"
38 #include "bi_print.h"
39
40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
41 static bi_instruction *bi_emit_branch(bi_context *ctx);
42 static void bi_block_add_successor(bi_block *block, bi_block *successor);
43 static void bi_schedule_barrier(bi_context *ctx);
44
45 static void
46 emit_jump(bi_context *ctx, nir_jump_instr *instr)
47 {
48 bi_instruction *branch = bi_emit_branch(ctx);
49
50 switch (instr->type) {
51 case nir_jump_break:
52 branch->branch.target = ctx->break_block;
53 break;
54 case nir_jump_continue:
55 branch->branch.target = ctx->continue_block;
56 break;
57 default:
58 unreachable("Unhandled jump type");
59 }
60
61 bi_block_add_successor(ctx->current_block, branch->branch.target);
62 }
63
64 /* Gets a bytemask for a complete vecN write */
65 static unsigned
66 bi_mask_for_channels_32(unsigned i)
67 {
68 return (1 << (4 * i)) - 1;
69 }
70
71 static bi_instruction
72 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
73 {
74 bi_instruction load = {
75 .type = T,
76 .writemask = bi_mask_for_channels_32(instr->num_components),
77 .src = { BIR_INDEX_CONSTANT },
78 .constant = { .u64 = nir_intrinsic_base(instr) },
79 };
80
81 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
82
83 if (info->has_dest)
84 load.dest = bir_dest_index(&instr->dest);
85
86 if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
87 load.dest_type = nir_intrinsic_type(instr);
88
89 nir_src *offset = nir_get_io_offset_src(instr);
90
91 if (nir_src_is_const(*offset))
92 load.constant.u64 += nir_src_as_uint(*offset);
93 else
94 load.src[0] = bir_src_index(offset);
95
96 return load;
97 }
98
99 static void
100 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
101 {
102 bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
103 ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
104 ins.load_vary.reuse = false; /* TODO */
105 ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
106 ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
107 bi_emit(ctx, ins);
108 }
109
110 static void
111 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
112 {
113 if (!ctx->emitted_atest) {
114 bi_instruction ins = {
115 .type = BI_ATEST
116 };
117
118 bi_emit(ctx, ins);
119 bi_schedule_barrier(ctx);
120 ctx->emitted_atest = true;
121 }
122
123 bi_instruction blend = {
124 .type = BI_BLEND,
125 .blend_location = nir_intrinsic_base(instr),
126 .src = {
127 bir_src_index(&instr->src[0])
128 },
129 .swizzle = {
130 { 0, 1, 2, 3 }
131 }
132 };
133
134 bi_emit(ctx, blend);
135 bi_schedule_barrier(ctx);
136 }
137
138 static void
139 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
140 {
141 bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
142 address.dest = bi_make_temp(ctx);
143 address.dest_type = nir_type_uint64;
144 address.writemask = (1 << 8) - 1;
145
146 bi_instruction st = {
147 .type = BI_STORE_VAR,
148 .src = {
149 address.dest,
150 bir_src_index(&instr->src[0])
151 },
152 .swizzle = {
153 { 0, 1, 2, 3 }
154 }
155 };
156
157 bi_emit(ctx, address);
158 bi_emit(ctx, st);
159 }
160
161 static void
162 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
163 {
164 bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
165 ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
166 bi_emit(ctx, ld);
167 }
168
169 static void
170 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
171 {
172
173 switch (instr->intrinsic) {
174 case nir_intrinsic_load_barycentric_pixel:
175 /* stub */
176 break;
177 case nir_intrinsic_load_interpolated_input:
178 case nir_intrinsic_load_input:
179 if (ctx->stage == MESA_SHADER_FRAGMENT)
180 bi_emit_ld_vary(ctx, instr);
181 else if (ctx->stage == MESA_SHADER_VERTEX)
182 bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
183 else {
184 unreachable("Unsupported shader stage");
185 }
186 break;
187
188 case nir_intrinsic_store_output:
189 if (ctx->stage == MESA_SHADER_FRAGMENT)
190 bi_emit_frag_out(ctx, instr);
191 else if (ctx->stage == MESA_SHADER_VERTEX)
192 bi_emit_st_vary(ctx, instr);
193 else
194 unreachable("Unsupported shader stage");
195 break;
196
197 case nir_intrinsic_load_uniform:
198 bi_emit_ld_uniform(ctx, instr);
199 break;
200
201 default:
202 /* todo */
203 break;
204 }
205 }
206
207 static void
208 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
209 {
210 /* Make sure we've been lowered */
211 assert(instr->def.num_components == 1);
212
213 bi_instruction move = {
214 .type = BI_MOV,
215 .dest = bir_ssa_index(&instr->def),
216 .dest_type = instr->def.bit_size | nir_type_uint,
217 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
218 .src = {
219 BIR_INDEX_CONSTANT
220 },
221 .constant = {
222 .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
223 }
224 };
225
226 bi_emit(ctx, move);
227 }
228
229 static enum bi_class
230 bi_class_for_nir_alu(nir_op op)
231 {
232 switch (op) {
233 case nir_op_iadd:
234 case nir_op_fadd:
235 case nir_op_fsub:
236 return BI_ADD;
237 case nir_op_isub:
238 return BI_ISUB;
239
240 case nir_op_flt:
241 case nir_op_fge:
242 case nir_op_feq:
243 case nir_op_fne:
244 case nir_op_ilt:
245 case nir_op_ige:
246 case nir_op_ieq:
247 case nir_op_ine:
248 return BI_CMP;
249
250 case nir_op_bcsel:
251 return BI_CSEL;
252
253 case nir_op_i2i8:
254 case nir_op_i2i16:
255 case nir_op_i2i32:
256 case nir_op_i2i64:
257 case nir_op_u2u8:
258 case nir_op_u2u16:
259 case nir_op_u2u32:
260 case nir_op_u2u64:
261 case nir_op_f2i16:
262 case nir_op_f2i32:
263 case nir_op_f2i64:
264 case nir_op_f2u16:
265 case nir_op_f2u32:
266 case nir_op_f2u64:
267 case nir_op_i2f16:
268 case nir_op_i2f32:
269 case nir_op_i2f64:
270 case nir_op_u2f16:
271 case nir_op_u2f32:
272 case nir_op_u2f64:
273 return BI_CONVERT;
274
275 case nir_op_fmul:
276 return BI_FMA;
277
278 case nir_op_imin:
279 case nir_op_imax:
280 case nir_op_umin:
281 case nir_op_umax:
282 case nir_op_fmin:
283 case nir_op_fmax:
284 return BI_MINMAX;
285
286 case nir_op_fsat:
287 case nir_op_fneg:
288 case nir_op_fabs:
289 case nir_op_mov:
290 return BI_MOV;
291
292 case nir_op_frcp:
293 case nir_op_frsq:
294 case nir_op_fsin:
295 case nir_op_fcos:
296 return BI_SPECIAL;
297
298 default:
299 unreachable("Unknown ALU op");
300 }
301 }
302
303 static enum bi_cond
304 bi_cond_for_nir(nir_op op)
305 {
306 switch (op) {
307 case nir_op_flt:
308 case nir_op_ilt:
309 return BI_COND_LT;
310 case nir_op_fge:
311 case nir_op_ige:
312 return BI_COND_GE;
313 case nir_op_feq:
314 case nir_op_ieq:
315 return BI_COND_EQ;
316 case nir_op_fne:
317 case nir_op_ine:
318 return BI_COND_NE;
319 default:
320 unreachable("Invalid compare");
321 }
322 }
323
324 static void
325 emit_alu(bi_context *ctx, nir_alu_instr *instr)
326 {
327 /* Assume it's something we can handle normally */
328 bi_instruction alu = {
329 .type = bi_class_for_nir_alu(instr->op),
330 .dest = bir_dest_index(&instr->dest.dest),
331 .dest_type = nir_op_infos[instr->op].output_type
332 | nir_dest_bit_size(instr->dest.dest),
333 };
334
335 /* TODO: Implement lowering of special functions for older Bifrost */
336 assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
337
338 if (instr->dest.dest.is_ssa) {
339 /* Construct a writemask */
340 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
341 unsigned comps = instr->dest.dest.ssa.num_components;
342 assert(comps == 1);
343 unsigned bits = bits_per_comp * comps;
344 unsigned bytes = MAX2(bits / 8, 1);
345 alu.writemask = (1 << bytes) - 1;
346 } else {
347 unsigned comp_mask = instr->dest.write_mask;
348
349 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
350 comp_mask);
351 }
352
353 /* We inline constants as we go. This tracks how many constants have
354 * been inlined, since we're limited to 64-bits of constants per
355 * instruction */
356
357 unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
358 unsigned constants_left = (64 / dest_bits);
359 unsigned constant_shift = 0;
360
361 /* Copy sources */
362
363 unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
364 assert(num_inputs <= ARRAY_SIZE(alu.src));
365
366 for (unsigned i = 0; i < num_inputs; ++i) {
367 unsigned bits = nir_src_bit_size(instr->src[i].src);
368 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
369 | bits;
370
371 /* Try to inline a constant */
372 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
373 alu.constant.u64 |=
374 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
375
376 alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
377 --constants_left;
378 constant_shift += dest_bits;
379 continue;
380 }
381
382 alu.src[i] = bir_src_index(&instr->src[i].src);
383
384 /* We assert scalarization above */
385 alu.swizzle[i][0] = instr->src[i].swizzle[0];
386 }
387
388 /* Op-specific fixup */
389 switch (instr->op) {
390 case nir_op_fmul:
391 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
392 break;
393 case nir_op_fsat:
394 alu.outmod = BIFROST_SAT; /* MOV */
395 break;
396 case nir_op_fneg:
397 alu.src_neg[0] = true; /* MOV */
398 break;
399 case nir_op_fabs:
400 alu.src_abs[0] = true; /* MOV */
401 break;
402 case nir_op_fsub:
403 alu.src_neg[1] = true; /* ADD */
404 break;
405 case nir_op_fmax:
406 case nir_op_imax:
407 case nir_op_umax:
408 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
409 break;
410 case nir_op_frcp:
411 alu.op.special = BI_SPECIAL_FRCP;
412 break;
413 case nir_op_frsq:
414 alu.op.special = BI_SPECIAL_FRSQ;
415 break;
416 case nir_op_fsin:
417 alu.op.special = BI_SPECIAL_FSIN;
418 break;
419 case nir_op_fcos:
420 alu.op.special = BI_SPECIAL_FCOS;
421 break;
422 case nir_op_flt:
423 case nir_op_ilt:
424 case nir_op_fge:
425 case nir_op_ige:
426 case nir_op_feq:
427 case nir_op_ieq:
428 case nir_op_fne:
429 case nir_op_ine:
430 alu.op.compare = bi_cond_for_nir(instr->op);
431 break;
432 default:
433 break;
434 }
435
436 bi_emit(ctx, alu);
437 }
438
439 static void
440 emit_instr(bi_context *ctx, struct nir_instr *instr)
441 {
442 switch (instr->type) {
443 case nir_instr_type_load_const:
444 emit_load_const(ctx, nir_instr_as_load_const(instr));
445 break;
446
447 case nir_instr_type_intrinsic:
448 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
449 break;
450
451 case nir_instr_type_alu:
452 emit_alu(ctx, nir_instr_as_alu(instr));
453 break;
454
455 #if 0
456 case nir_instr_type_tex:
457 emit_tex(ctx, nir_instr_as_tex(instr));
458 break;
459 #endif
460
461 case nir_instr_type_jump:
462 emit_jump(ctx, nir_instr_as_jump(instr));
463 break;
464
465 case nir_instr_type_ssa_undef:
466 /* Spurious */
467 break;
468
469 default:
470 //unreachable("Unhandled instruction type");
471 break;
472 }
473 }
474
475
476
477 static bi_block *
478 create_empty_block(bi_context *ctx)
479 {
480 bi_block *blk = rzalloc(ctx, bi_block);
481
482 blk->predecessors = _mesa_set_create(blk,
483 _mesa_hash_pointer,
484 _mesa_key_pointer_equal);
485
486 blk->name = ctx->block_name_count++;
487
488 return blk;
489 }
490
491 static void
492 bi_block_add_successor(bi_block *block, bi_block *successor)
493 {
494 assert(block);
495 assert(successor);
496
497 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); ++i) {
498 if (block->successors[i]) {
499 if (block->successors[i] == successor)
500 return;
501 else
502 continue;
503 }
504
505 block->successors[i] = successor;
506 _mesa_set_add(successor->predecessors, block);
507 return;
508 }
509
510 unreachable("Too many successors");
511 }
512
513 static void
514 bi_schedule_barrier(bi_context *ctx)
515 {
516 bi_block *temp = ctx->after_block;
517 ctx->after_block = create_empty_block(ctx);
518 list_addtail(&ctx->after_block->link, &ctx->blocks);
519 list_inithead(&ctx->after_block->instructions);
520 bi_block_add_successor(ctx->current_block, ctx->after_block);
521 ctx->current_block = ctx->after_block;
522 ctx->after_block = temp;
523 }
524
525 static bi_block *
526 emit_block(bi_context *ctx, nir_block *block)
527 {
528 if (ctx->after_block) {
529 ctx->current_block = ctx->after_block;
530 ctx->after_block = NULL;
531 } else {
532 ctx->current_block = create_empty_block(ctx);
533 }
534
535 list_addtail(&ctx->current_block->link, &ctx->blocks);
536 list_inithead(&ctx->current_block->instructions);
537
538 nir_foreach_instr(instr, block) {
539 emit_instr(ctx, instr);
540 ++ctx->instruction_count;
541 }
542
543 return ctx->current_block;
544 }
545
546 /* Emits an unconditional branch to the end of the current block, returning a
547 * pointer so the user can fill in details */
548
549 static bi_instruction *
550 bi_emit_branch(bi_context *ctx)
551 {
552 bi_instruction branch = {
553 .type = BI_BRANCH,
554 .branch = {
555 .cond = BI_COND_ALWAYS
556 }
557 };
558
559 return bi_emit(ctx, branch);
560 }
561
562 /* Sets a condition for a branch by examing the NIR condition. If we're
563 * familiar with the condition, we unwrap it to fold it into the branch
564 * instruction. Otherwise, we consume the condition directly. We
565 * generally use 1-bit booleans which allows us to use small types for
566 * the conditions.
567 */
568
569 static void
570 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
571 {
572 /* TODO: Try to unwrap instead of always bailing */
573 branch->src[0] = bir_src_index(cond);
574 branch->src[1] = BIR_INDEX_ZERO;
575 branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
576 branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
577 }
578
579 static void
580 emit_if(bi_context *ctx, nir_if *nif)
581 {
582 bi_block *before_block = ctx->current_block;
583
584 /* Speculatively emit the branch, but we can't fill it in until later */
585 bi_instruction *then_branch = bi_emit_branch(ctx);
586 bi_set_branch_cond(then_branch, &nif->condition, true);
587
588 /* Emit the two subblocks. */
589 bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
590 bi_block *end_then_block = ctx->current_block;
591
592 /* Emit a jump from the end of the then block to the end of the else */
593 bi_instruction *then_exit = bi_emit_branch(ctx);
594
595 /* Emit second block, and check if it's empty */
596
597 int count_in = ctx->instruction_count;
598 bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
599 bi_block *end_else_block = ctx->current_block;
600 ctx->after_block = create_empty_block(ctx);
601
602 /* Now that we have the subblocks emitted, fix up the branches */
603
604 assert(then_block);
605 assert(else_block);
606
607 if (ctx->instruction_count == count_in) {
608 /* The else block is empty, so don't emit an exit jump */
609 bi_remove_instruction(then_exit);
610 then_branch->branch.target = ctx->after_block;
611 } else {
612 then_branch->branch.target = else_block;
613 then_exit->branch.target = ctx->after_block;
614 bi_block_add_successor(end_then_block, then_exit->branch.target);
615 }
616
617 /* Wire up the successors */
618
619 bi_block_add_successor(before_block, then_branch->branch.target); /* then_branch */
620
621 bi_block_add_successor(before_block, then_block); /* fallthrough */
622 bi_block_add_successor(end_else_block, ctx->after_block); /* fallthrough */
623 }
624
625 static void
626 emit_loop(bi_context *ctx, nir_loop *nloop)
627 {
628 /* Remember where we are */
629 bi_block *start_block = ctx->current_block;
630
631 bi_block *saved_break = ctx->break_block;
632 bi_block *saved_continue = ctx->continue_block;
633
634 ctx->continue_block = create_empty_block(ctx);
635 ctx->break_block = create_empty_block(ctx);
636 ctx->after_block = ctx->continue_block;
637
638 /* Emit the body itself */
639 emit_cf_list(ctx, &nloop->body);
640
641 /* Branch back to loop back */
642 bi_instruction *br_back = bi_emit_branch(ctx);
643 br_back->branch.target = ctx->continue_block;
644 bi_block_add_successor(start_block, ctx->continue_block);
645 bi_block_add_successor(ctx->current_block, ctx->continue_block);
646
647 ctx->after_block = ctx->break_block;
648
649 /* Pop off */
650 ctx->break_block = saved_break;
651 ctx->continue_block = saved_continue;
652 ++ctx->loop_count;
653 }
654
655 static bi_block *
656 emit_cf_list(bi_context *ctx, struct exec_list *list)
657 {
658 bi_block *start_block = NULL;
659
660 foreach_list_typed(nir_cf_node, node, node, list) {
661 switch (node->type) {
662 case nir_cf_node_block: {
663 bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
664
665 if (!start_block)
666 start_block = block;
667
668 break;
669 }
670
671 case nir_cf_node_if:
672 emit_if(ctx, nir_cf_node_as_if(node));
673 break;
674
675 case nir_cf_node_loop:
676 emit_loop(ctx, nir_cf_node_as_loop(node));
677 break;
678
679 default:
680 unreachable("Unknown control flow");
681 }
682 }
683
684 return start_block;
685 }
686
687 static int
688 glsl_type_size(const struct glsl_type *type, bool bindless)
689 {
690 return glsl_count_attribute_slots(type, false);
691 }
692
693 static void
694 bi_optimize_nir(nir_shader *nir)
695 {
696 bool progress;
697 unsigned lower_flrp = 16 | 32 | 64;
698
699 NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
700 NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
701
702 nir_lower_tex_options lower_tex_options = {
703 .lower_txs_lod = true,
704 .lower_txp = ~0,
705 .lower_tex_without_implicit_lod = true,
706 .lower_txd = true,
707 };
708
709 NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
710 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
711 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
712
713 do {
714 progress = false;
715
716 NIR_PASS(progress, nir, nir_lower_var_copies);
717 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
718
719 NIR_PASS(progress, nir, nir_copy_prop);
720 NIR_PASS(progress, nir, nir_opt_remove_phis);
721 NIR_PASS(progress, nir, nir_opt_dce);
722 NIR_PASS(progress, nir, nir_opt_dead_cf);
723 NIR_PASS(progress, nir, nir_opt_cse);
724 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
725 NIR_PASS(progress, nir, nir_opt_algebraic);
726 NIR_PASS(progress, nir, nir_opt_constant_folding);
727
728 if (lower_flrp != 0) {
729 bool lower_flrp_progress = false;
730 NIR_PASS(lower_flrp_progress,
731 nir,
732 nir_lower_flrp,
733 lower_flrp,
734 false /* always_precise */,
735 nir->options->lower_ffma);
736 if (lower_flrp_progress) {
737 NIR_PASS(progress, nir,
738 nir_opt_constant_folding);
739 progress = true;
740 }
741
742 /* Nothing should rematerialize any flrps, so we only
743 * need to do this lowering once.
744 */
745 lower_flrp = 0;
746 }
747
748 NIR_PASS(progress, nir, nir_opt_undef);
749 NIR_PASS(progress, nir, nir_opt_loop_unroll,
750 nir_var_shader_in |
751 nir_var_shader_out |
752 nir_var_function_temp);
753 } while (progress);
754
755 NIR_PASS(progress, nir, nir_opt_algebraic_late);
756 NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
757 NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
758 NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
759
760 /* Take us out of SSA */
761 NIR_PASS(progress, nir, nir_lower_locals_to_regs);
762 NIR_PASS(progress, nir, nir_convert_from_ssa, true);
763
764 /* We're a primary scalar architecture but there's enough vector that
765 * we use a vector IR so let's not also deal with scalar hacks on top
766 * of the vector hacks */
767
768 NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
769 NIR_PASS(progress, nir, nir_lower_vec_to_movs);
770 NIR_PASS(progress, nir, nir_opt_dce);
771 }
772
773 void
774 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
775 {
776 bi_context *ctx = rzalloc(NULL, bi_context);
777 ctx->nir = nir;
778 ctx->stage = nir->info.stage;
779 ctx->quirks = bifrost_get_quirks(product_id);
780 list_inithead(&ctx->blocks);
781
782 /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
783 * (so we don't accidentally duplicate the epilogue since mesa/st has
784 * messed with our I/O quite a bit already) */
785
786 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
787
788 if (ctx->stage == MESA_SHADER_VERTEX) {
789 NIR_PASS_V(nir, nir_lower_viewport_transform);
790 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
791 }
792
793 NIR_PASS_V(nir, nir_split_var_copies);
794 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
795 NIR_PASS_V(nir, nir_lower_var_copies);
796 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
797 NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
798 NIR_PASS_V(nir, nir_lower_ssbo);
799
800 bi_optimize_nir(nir);
801 nir_print_shader(nir, stdout);
802
803 nir_foreach_function(func, nir) {
804 if (!func->impl)
805 continue;
806
807 ctx->impl = func->impl;
808 emit_cf_list(ctx, &func->impl->body);
809 break; /* TODO: Multi-function shaders */
810 }
811
812 bi_print_shader(ctx, stdout);
813 bi_schedule(ctx);
814
815 ralloc_free(ctx);
816 }