src/panfrost/bifrost/bifrost_compile.c

   1 /*
   2  * Copyright (C) 2020 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors (Collabora):
  24  *      Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
  25  */
  26
  27 #include "main/mtypes.h"
  28 #include "compiler/glsl/glsl_to_nir.h"
  29 #include "compiler/nir_types.h"
  30 #include "main/imports.h"
  31 #include "compiler/nir/nir_builder.h"
  32
  33 #include "disassemble.h"
  34 #include "bifrost_compile.h"
  35 #include "bifrost_nir.h"
  36 #include "compiler.h"
  37 #include "bi_quirks.h"
  38 #include "bi_print.h"
  39
  40 static bi_block *emit_cf_list(bi_context *ctx, struct exec_list *list);
  41 static bi_instruction *bi_emit_branch(bi_context *ctx);
  42 static void bi_schedule_barrier(bi_context *ctx);
  43
  44 static void
  45 emit_jump(bi_context *ctx, nir_jump_instr *instr)
  46 {
  47         bi_instruction *branch = bi_emit_branch(ctx);
  48
  49         switch (instr->type) {
  50         case nir_jump_break:
  51                 branch->branch.target = ctx->break_block;
  52                 break;
  53         case nir_jump_continue:
  54                 branch->branch.target = ctx->continue_block;
  55                 break;
  56         default:
  57                 unreachable("Unhandled jump type");
  58         }
  59
  60         pan_block_add_successor(&ctx->current_block->base, &branch->branch.target->base);
  61 }
  62
  63 /* Gets a bytemask for a complete vecN write */
  64 static unsigned
  65 bi_mask_for_channels_32(unsigned i)
  66 {
  67         return (1 << (4 * i)) - 1;
  68 }
  69
  70 static bi_instruction
  71 bi_load(enum bi_class T, nir_intrinsic_instr *instr)
  72 {
  73         bi_instruction load = {
  74                 .type = T,
  75                 .writemask = bi_mask_for_channels_32(instr->num_components),
  76                 .src = { BIR_INDEX_CONSTANT },
  77                 .constant = { .u64 = nir_intrinsic_base(instr) },
  78         };
  79
  80         const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
  81
  82         if (info->has_dest)
  83                 load.dest = bir_dest_index(&instr->dest);
  84
  85         if (info->has_dest && info->index_map[NIR_INTRINSIC_TYPE] > 0)
  86                 load.dest_type = nir_intrinsic_type(instr);
  87
  88         nir_src *offset = nir_get_io_offset_src(instr);
  89
  90         if (nir_src_is_const(*offset))
  91                 load.constant.u64 += nir_src_as_uint(*offset);
  92         else
  93                 load.src[0] = bir_src_index(offset);
  94
  95         return load;
  96 }
  97
  98 static void
  99 bi_emit_ld_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 100 {
 101         bi_instruction ins = bi_load(BI_LOAD_VAR, instr);
 102         ins.load_vary.interp_mode = BIFROST_INTERP_DEFAULT; /* TODO */
 103         ins.load_vary.reuse = false; /* TODO */
 104         ins.load_vary.flat = instr->intrinsic != nir_intrinsic_load_interpolated_input;
 105         ins.dest_type = nir_type_float | nir_dest_bit_size(instr->dest),
 106         bi_emit(ctx, ins);
 107 }
 108
 109 static void
 110 bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
 111 {
 112         if (!ctx->emitted_atest) {
 113                 bi_instruction ins = {
 114                         .type = BI_ATEST
 115                 };
 116
 117                 bi_emit(ctx, ins);
 118                 bi_schedule_barrier(ctx);
 119                 ctx->emitted_atest = true;
 120         }
 121
 122         bi_instruction blend = {
 123                 .type = BI_BLEND,
 124                 .blend_location = nir_intrinsic_base(instr),
 125                 .src = {
 126                         bir_src_index(&instr->src[0])
 127                 },
 128                 .swizzle = {
 129                         { 0, 1, 2, 3 }
 130                 }
 131         };
 132
 133         bi_emit(ctx, blend);
 134         bi_schedule_barrier(ctx);
 135 }
 136
 137 static void
 138 bi_emit_st_vary(bi_context *ctx, nir_intrinsic_instr *instr)
 139 {
 140         bi_instruction address = bi_load(BI_LOAD_VAR_ADDRESS, instr);
 141         address.dest = bi_make_temp(ctx);
 142         address.dest_type = nir_type_uint64;
 143         address.writemask = (1 << 8) - 1;
 144
 145         bi_instruction st = {
 146                 .type = BI_STORE_VAR,
 147                 .src = {
 148                         address.dest,
 149                         bir_src_index(&instr->src[0])
 150                 },
 151                 .swizzle = {
 152                         { 0, 1, 2, 3 }
 153                 }
 154         };
 155
 156         bi_emit(ctx, address);
 157         bi_emit(ctx, st);
 158 }
 159
 160 static void
 161 bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
 162 {
 163         bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
 164         ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
 165
 166         /* TODO: Indirect access, since we need to multiply by the element
 167          * size. I believe we can get this lowering automatically via
 168          * nir_lower_io (as mul instructions) with the proper options, but this
 169          * is TODO */
 170         assert(ld.src[0] & BIR_INDEX_CONSTANT);
 171         ld.constant.u64 += ctx->sysvals.sysval_count;
 172         ld.constant.u64 *= 16;
 173
 174         bi_emit(ctx, ld);
 175 }
 176
 177 static void
 178 bi_emit_sysval(bi_context *ctx, nir_instr *instr,
 179                 unsigned nr_components, unsigned offset)
 180 {
 181         nir_dest nir_dest;
 182
 183         /* Figure out which uniform this is */
 184         int sysval = panfrost_sysval_for_instr(instr, &nir_dest);
 185         void *val = _mesa_hash_table_u64_search(ctx->sysvals.sysval_to_id, sysval);
 186
 187         /* Sysvals are prefix uniforms */
 188         unsigned uniform = ((uintptr_t) val) - 1;
 189
 190         /* Emit the read itself -- this is never indirect */
 191
 192         bi_instruction load = {
 193                 .type = BI_LOAD_UNIFORM,
 194                 .writemask = (1 << (nr_components * 4)) - 1,
 195                 .src = { BIR_INDEX_CONSTANT},
 196                 .constant = { (uniform * 16) + offset },
 197                 .dest = bir_dest_index(&nir_dest),
 198                 .dest_type = nir_type_uint32, /* TODO */
 199         };
 200
 201         bi_emit(ctx, load);
 202 }
 203
 204 static void
 205 emit_intrinsic(bi_context *ctx, nir_intrinsic_instr *instr)
 206 {
 207
 208         switch (instr->intrinsic) {
 209         case nir_intrinsic_load_barycentric_pixel:
 210                 /* stub */
 211                 break;
 212         case nir_intrinsic_load_interpolated_input:
 213         case nir_intrinsic_load_input:
 214                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 215                         bi_emit_ld_vary(ctx, instr);
 216                 else if (ctx->stage == MESA_SHADER_VERTEX)
 217                         bi_emit(ctx, bi_load(BI_LOAD_ATTR, instr));
 218                 else {
 219                         unreachable("Unsupported shader stage");
 220                 }
 221                 break;
 222
 223         case nir_intrinsic_store_output:
 224                 if (ctx->stage == MESA_SHADER_FRAGMENT)
 225                         bi_emit_frag_out(ctx, instr);
 226                 else if (ctx->stage == MESA_SHADER_VERTEX)
 227                         bi_emit_st_vary(ctx, instr);
 228                 else
 229                         unreachable("Unsupported shader stage");
 230                 break;
 231
 232         case nir_intrinsic_load_uniform:
 233                 bi_emit_ld_uniform(ctx, instr);
 234                 break;
 235
 236         case nir_intrinsic_load_ssbo_address:
 237                 bi_emit_sysval(ctx, &instr->instr, 1, 0);
 238                 break;
 239
 240         case nir_intrinsic_get_buffer_size:
 241                 bi_emit_sysval(ctx, &instr->instr, 1, 8);
 242                 break;
 243
 244         case nir_intrinsic_load_viewport_scale:
 245         case nir_intrinsic_load_viewport_offset:
 246         case nir_intrinsic_load_num_work_groups:
 247         case nir_intrinsic_load_sampler_lod_parameters_pan:
 248                 bi_emit_sysval(ctx, &instr->instr, 3, 0);
 249                 break;
 250
 251         default:
 252                 /* todo */
 253                 break;
 254         }
 255 }
 256
 257 static void
 258 emit_load_const(bi_context *ctx, nir_load_const_instr *instr)
 259 {
 260         /* Make sure we've been lowered */
 261         assert(instr->def.num_components == 1);
 262
 263         bi_instruction move = {
 264                 .type = BI_MOV,
 265                 .dest = bir_ssa_index(&instr->def),
 266                 .dest_type = instr->def.bit_size | nir_type_uint,
 267                 .writemask = (1 << (instr->def.bit_size / 8)) - 1,
 268                 .src = {
 269                         BIR_INDEX_CONSTANT
 270                 },
 271                 .constant = {
 272                         .u64 = nir_const_value_as_uint(instr->value[0], instr->def.bit_size)
 273                 }
 274         };
 275
 276         bi_emit(ctx, move);
 277 }
 278
 279 static enum bi_class
 280 bi_class_for_nir_alu(nir_op op)
 281 {
 282         switch (op) {
 283         case nir_op_iadd:
 284         case nir_op_fadd:
 285         case nir_op_fsub:
 286                 return BI_ADD;
 287         case nir_op_isub:
 288                 return BI_ISUB;
 289
 290         case nir_op_flt:
 291         case nir_op_fge:
 292         case nir_op_feq:
 293         case nir_op_fne:
 294         case nir_op_ilt:
 295         case nir_op_ige:
 296         case nir_op_ieq:
 297         case nir_op_ine:
 298                 return BI_CMP;
 299
 300         case nir_op_bcsel:
 301                 return BI_CSEL;
 302
 303         case nir_op_i2i8:
 304         case nir_op_i2i16:
 305         case nir_op_i2i32:
 306         case nir_op_i2i64:
 307         case nir_op_u2u8:
 308         case nir_op_u2u16:
 309         case nir_op_u2u32:
 310         case nir_op_u2u64:
 311         case nir_op_f2i16:
 312         case nir_op_f2i32:
 313         case nir_op_f2i64:
 314         case nir_op_f2u16:
 315         case nir_op_f2u32:
 316         case nir_op_f2u64:
 317         case nir_op_i2f16:
 318         case nir_op_i2f32:
 319         case nir_op_i2f64:
 320         case nir_op_u2f16:
 321         case nir_op_u2f32:
 322         case nir_op_u2f64:
 323                 return BI_CONVERT;
 324
 325         case nir_op_ffma:
 326         case nir_op_fmul:
 327                 return BI_FMA;
 328
 329         case nir_op_imin:
 330         case nir_op_imax:
 331         case nir_op_umin:
 332         case nir_op_umax:
 333         case nir_op_fmin:
 334         case nir_op_fmax:
 335                 return BI_MINMAX;
 336
 337         case nir_op_fsat:
 338         case nir_op_fneg:
 339         case nir_op_fabs:
 340         case nir_op_mov:
 341                 return BI_MOV;
 342
 343         case nir_op_frcp:
 344         case nir_op_frsq:
 345         case nir_op_fsin:
 346         case nir_op_fcos:
 347                 return BI_SPECIAL;
 348
 349         default:
 350                 unreachable("Unknown ALU op");
 351         }
 352 }
 353
 354 static enum bi_cond
 355 bi_cond_for_nir(nir_op op)
 356 {
 357         switch (op) {
 358         case nir_op_flt:
 359         case nir_op_ilt:
 360                 return BI_COND_LT;
 361         case nir_op_fge:
 362         case nir_op_ige:
 363                 return BI_COND_GE;
 364         case nir_op_feq:
 365         case nir_op_ieq:
 366                 return BI_COND_EQ;
 367         case nir_op_fne:
 368         case nir_op_ine:
 369                 return BI_COND_NE;
 370         default:
 371                 unreachable("Invalid compare");
 372         }
 373 }
 374
 375 static void
 376 emit_alu(bi_context *ctx, nir_alu_instr *instr)
 377 {
 378         /* Assume it's something we can handle normally */
 379         bi_instruction alu = {
 380                 .type = bi_class_for_nir_alu(instr->op),
 381                 .dest = bir_dest_index(&instr->dest.dest),
 382                 .dest_type = nir_op_infos[instr->op].output_type
 383                         | nir_dest_bit_size(instr->dest.dest),
 384         };
 385
 386         /* TODO: Implement lowering of special functions for older Bifrost */
 387         assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
 388
 389         if (instr->dest.dest.is_ssa) {
 390                 /* Construct a writemask */
 391                 unsigned bits_per_comp = instr->dest.dest.ssa.bit_size;
 392                 unsigned comps = instr->dest.dest.ssa.num_components;
 393                 assert(comps == 1);
 394                 unsigned bits = bits_per_comp * comps;
 395                 unsigned bytes = MAX2(bits / 8, 1);
 396                 alu.writemask = (1 << bytes) - 1;
 397         } else {
 398                 unsigned comp_mask = instr->dest.write_mask;
 399
 400                 alu.writemask = pan_to_bytemask(nir_dest_bit_size(instr->dest.dest),
 401                                 comp_mask);
 402         }
 403
 404         /* We inline constants as we go. This tracks how many constants have
 405          * been inlined, since we're limited to 64-bits of constants per
 406          * instruction */
 407
 408         unsigned dest_bits = nir_dest_bit_size(instr->dest.dest);
 409         unsigned constants_left = (64 / dest_bits);
 410         unsigned constant_shift = 0;
 411
 412         /* Copy sources */
 413
 414         unsigned num_inputs = nir_op_infos[instr->op].num_inputs;
 415         assert(num_inputs <= ARRAY_SIZE(alu.src));
 416
 417         for (unsigned i = 0; i < num_inputs; ++i) {
 418                 unsigned bits = nir_src_bit_size(instr->src[i].src);
 419                 alu.src_types[i] = nir_op_infos[instr->op].input_types[i]
 420                         | bits;
 421
 422                 /* Try to inline a constant */
 423                 if (nir_src_is_const(instr->src[i].src) && constants_left && (dest_bits == bits)) {
 424                         alu.constant.u64 |=
 425                                 (nir_src_as_uint(instr->src[i].src)) << constant_shift;
 426
 427                         alu.src[i] = BIR_INDEX_CONSTANT | constant_shift;
 428                         --constants_left;
 429                         constant_shift += dest_bits;
 430                         continue;
 431                 }
 432
 433                 alu.src[i] = bir_src_index(&instr->src[i].src);
 434
 435                 /* We assert scalarization above */
 436                 alu.swizzle[i][0] = instr->src[i].swizzle[0];
 437         }
 438
 439         /* Op-specific fixup */
 440         switch (instr->op) {
 441         case nir_op_fmul:
 442                 alu.src[2] = BIR_INDEX_ZERO; /* FMA */
 443                 break;
 444         case nir_op_fsat:
 445                 alu.outmod = BIFROST_SAT; /* MOV */
 446                 break;
 447         case nir_op_fneg:
 448                 alu.src_neg[0] = true; /* MOV */
 449                 break;
 450         case nir_op_fabs:
 451                 alu.src_abs[0] = true; /* MOV */
 452                 break;
 453         case nir_op_fsub:
 454                 alu.src_neg[1] = true; /* ADD */
 455                 break;
 456         case nir_op_fmax:
 457         case nir_op_imax:
 458         case nir_op_umax:
 459                 alu.op.minmax = BI_MINMAX_MAX; /* MINMAX */
 460                 break;
 461         case nir_op_frcp:
 462                 alu.op.special = BI_SPECIAL_FRCP;
 463                 break;
 464         case nir_op_frsq:
 465                 alu.op.special = BI_SPECIAL_FRSQ;
 466                 break;
 467         case nir_op_fsin:
 468                 alu.op.special = BI_SPECIAL_FSIN;
 469                 break;
 470         case nir_op_fcos:
 471                 alu.op.special = BI_SPECIAL_FCOS;
 472                 break;
 473         case nir_op_flt:
 474         case nir_op_ilt:
 475         case nir_op_fge:
 476         case nir_op_ige:
 477         case nir_op_feq:
 478         case nir_op_ieq:
 479         case nir_op_fne:
 480         case nir_op_ine:
 481                 alu.op.compare = bi_cond_for_nir(instr->op);
 482                 break;
 483         default:
 484                 break;
 485         }
 486
 487         bi_emit(ctx, alu);
 488 }
 489
 490 static void
 491 emit_instr(bi_context *ctx, struct nir_instr *instr)
 492 {
 493         switch (instr->type) {
 494         case nir_instr_type_load_const:
 495                 emit_load_const(ctx, nir_instr_as_load_const(instr));
 496                 break;
 497
 498         case nir_instr_type_intrinsic:
 499                 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
 500                 break;
 501
 502         case nir_instr_type_alu:
 503                 emit_alu(ctx, nir_instr_as_alu(instr));
 504                 break;
 505
 506 #if 0
 507         case nir_instr_type_tex:
 508                 emit_tex(ctx, nir_instr_as_tex(instr));
 509                 break;
 510 #endif
 511
 512         case nir_instr_type_jump:
 513                 emit_jump(ctx, nir_instr_as_jump(instr));
 514                 break;
 515
 516         case nir_instr_type_ssa_undef:
 517                 /* Spurious */
 518                 break;
 519
 520         default:
 521                 //unreachable("Unhandled instruction type");
 522                 break;
 523         }
 524 }
 525
 526
 527
 528 static bi_block *
 529 create_empty_block(bi_context *ctx)
 530 {
 531         bi_block *blk = rzalloc(ctx, bi_block);
 532
 533         blk->base.predecessors = _mesa_set_create(blk,
 534                         _mesa_hash_pointer,
 535                         _mesa_key_pointer_equal);
 536
 537         blk->base.name = ctx->block_name_count++;
 538
 539         return blk;
 540 }
 541
 542 static void
 543 bi_schedule_barrier(bi_context *ctx)
 544 {
 545         bi_block *temp = ctx->after_block;
 546         ctx->after_block = create_empty_block(ctx);
 547         list_addtail(&ctx->after_block->base.link, &ctx->blocks);
 548         list_inithead(&ctx->after_block->base.instructions);
 549         pan_block_add_successor(&ctx->current_block->base, &ctx->after_block->base);
 550         ctx->current_block = ctx->after_block;
 551         ctx->after_block = temp;
 552 }
 553
 554 static bi_block *
 555 emit_block(bi_context *ctx, nir_block *block)
 556 {
 557         if (ctx->after_block) {
 558                 ctx->current_block = ctx->after_block;
 559                 ctx->after_block = NULL;
 560         } else {
 561                 ctx->current_block = create_empty_block(ctx);
 562         }
 563
 564         list_addtail(&ctx->current_block->base.link, &ctx->blocks);
 565         list_inithead(&ctx->current_block->base.instructions);
 566
 567         nir_foreach_instr(instr, block) {
 568                 emit_instr(ctx, instr);
 569                 ++ctx->instruction_count;
 570         }
 571
 572         return ctx->current_block;
 573 }
 574
 575 /* Emits an unconditional branch to the end of the current block, returning a
 576  * pointer so the user can fill in details */
 577
 578 static bi_instruction *
 579 bi_emit_branch(bi_context *ctx)
 580 {
 581         bi_instruction branch = {
 582                 .type = BI_BRANCH,
 583                 .branch = {
 584                         .cond = BI_COND_ALWAYS
 585                 }
 586         };
 587
 588         return bi_emit(ctx, branch);
 589 }
 590
 591 /* Sets a condition for a branch by examing the NIR condition. If we're
 592  * familiar with the condition, we unwrap it to fold it into the branch
 593  * instruction. Otherwise, we consume the condition directly. We
 594  * generally use 1-bit booleans which allows us to use small types for
 595  * the conditions.
 596  */
 597
 598 static void
 599 bi_set_branch_cond(bi_instruction *branch, nir_src *cond, bool invert)
 600 {
 601         /* TODO: Try to unwrap instead of always bailing */
 602         branch->src[0] = bir_src_index(cond);
 603         branch->src[1] = BIR_INDEX_ZERO;
 604         branch->src_types[0] = branch->src_types[1] = nir_type_uint16;
 605         branch->branch.cond = invert ? BI_COND_EQ : BI_COND_NE;
 606 }
 607
 608 static void
 609 emit_if(bi_context *ctx, nir_if *nif)
 610 {
 611         bi_block *before_block = ctx->current_block;
 612
 613         /* Speculatively emit the branch, but we can't fill it in until later */
 614         bi_instruction *then_branch = bi_emit_branch(ctx);
 615         bi_set_branch_cond(then_branch, &nif->condition, true);
 616
 617         /* Emit the two subblocks. */
 618         bi_block *then_block = emit_cf_list(ctx, &nif->then_list);
 619         bi_block *end_then_block = ctx->current_block;
 620
 621         /* Emit a jump from the end of the then block to the end of the else */
 622         bi_instruction *then_exit = bi_emit_branch(ctx);
 623
 624         /* Emit second block, and check if it's empty */
 625
 626         int count_in = ctx->instruction_count;
 627         bi_block *else_block = emit_cf_list(ctx, &nif->else_list);
 628         bi_block *end_else_block = ctx->current_block;
 629         ctx->after_block = create_empty_block(ctx);
 630
 631         /* Now that we have the subblocks emitted, fix up the branches */
 632
 633         assert(then_block);
 634         assert(else_block);
 635
 636         if (ctx->instruction_count == count_in) {
 637                 /* The else block is empty, so don't emit an exit jump */
 638                 bi_remove_instruction(then_exit);
 639                 then_branch->branch.target = ctx->after_block;
 640         } else {
 641                 then_branch->branch.target = else_block;
 642                 then_exit->branch.target = ctx->after_block;
 643                 pan_block_add_successor(&end_then_block->base, &then_exit->branch.target->base);
 644         }
 645
 646         /* Wire up the successors */
 647
 648         pan_block_add_successor(&before_block->base, &then_branch->branch.target->base); /* then_branch */
 649
 650         pan_block_add_successor(&before_block->base, &then_block->base); /* fallthrough */
 651         pan_block_add_successor(&end_else_block->base, &ctx->after_block->base); /* fallthrough */
 652 }
 653
 654 static void
 655 emit_loop(bi_context *ctx, nir_loop *nloop)
 656 {
 657         /* Remember where we are */
 658         bi_block *start_block = ctx->current_block;
 659
 660         bi_block *saved_break = ctx->break_block;
 661         bi_block *saved_continue = ctx->continue_block;
 662
 663         ctx->continue_block = create_empty_block(ctx);
 664         ctx->break_block = create_empty_block(ctx);
 665         ctx->after_block = ctx->continue_block;
 666
 667         /* Emit the body itself */
 668         emit_cf_list(ctx, &nloop->body);
 669
 670         /* Branch back to loop back */
 671         bi_instruction *br_back = bi_emit_branch(ctx);
 672         br_back->branch.target = ctx->continue_block;
 673         pan_block_add_successor(&start_block->base, &ctx->continue_block->base);
 674         pan_block_add_successor(&ctx->current_block->base, &ctx->continue_block->base);
 675
 676         ctx->after_block = ctx->break_block;
 677
 678         /* Pop off */
 679         ctx->break_block = saved_break;
 680         ctx->continue_block = saved_continue;
 681         ++ctx->loop_count;
 682 }
 683
 684 static bi_block *
 685 emit_cf_list(bi_context *ctx, struct exec_list *list)
 686 {
 687         bi_block *start_block = NULL;
 688
 689         foreach_list_typed(nir_cf_node, node, node, list) {
 690                 switch (node->type) {
 691                 case nir_cf_node_block: {
 692                         bi_block *block = emit_block(ctx, nir_cf_node_as_block(node));
 693
 694                         if (!start_block)
 695                                 start_block = block;
 696
 697                         break;
 698                 }
 699
 700                 case nir_cf_node_if:
 701                         emit_if(ctx, nir_cf_node_as_if(node));
 702                         break;
 703
 704                 case nir_cf_node_loop:
 705                         emit_loop(ctx, nir_cf_node_as_loop(node));
 706                         break;
 707
 708                 default:
 709                         unreachable("Unknown control flow");
 710                 }
 711         }
 712
 713         return start_block;
 714 }
 715
 716 static int
 717 glsl_type_size(const struct glsl_type *type, bool bindless)
 718 {
 719         return glsl_count_attribute_slots(type, false);
 720 }
 721
 722 static void
 723 bi_optimize_nir(nir_shader *nir)
 724 {
 725         bool progress;
 726         unsigned lower_flrp = 16 | 32 | 64;
 727
 728         NIR_PASS(progress, nir, nir_lower_regs_to_ssa);
 729         NIR_PASS(progress, nir, nir_lower_idiv, nir_lower_idiv_fast);
 730
 731         nir_lower_tex_options lower_tex_options = {
 732                 .lower_txs_lod = true,
 733                 .lower_txp = ~0,
 734                 .lower_tex_without_implicit_lod = true,
 735                 .lower_txd = true,
 736         };
 737
 738         NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
 739         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 740         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 741
 742         do {
 743                 progress = false;
 744
 745                 NIR_PASS(progress, nir, nir_lower_var_copies);
 746                 NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
 747
 748                 NIR_PASS(progress, nir, nir_copy_prop);
 749                 NIR_PASS(progress, nir, nir_opt_remove_phis);
 750                 NIR_PASS(progress, nir, nir_opt_dce);
 751                 NIR_PASS(progress, nir, nir_opt_dead_cf);
 752                 NIR_PASS(progress, nir, nir_opt_cse);
 753                 NIR_PASS(progress, nir, nir_opt_peephole_select, 64, false, true);
 754                 NIR_PASS(progress, nir, nir_opt_algebraic);
 755                 NIR_PASS(progress, nir, nir_opt_constant_folding);
 756
 757                 if (lower_flrp != 0) {
 758                         bool lower_flrp_progress = false;
 759                         NIR_PASS(lower_flrp_progress,
 760                                  nir,
 761                                  nir_lower_flrp,
 762                                  lower_flrp,
 763                                  false /* always_precise */,
 764                                  nir->options->lower_ffma);
 765                         if (lower_flrp_progress) {
 766                                 NIR_PASS(progress, nir,
 767                                          nir_opt_constant_folding);
 768                                 progress = true;
 769                         }
 770
 771                         /* Nothing should rematerialize any flrps, so we only
 772                          * need to do this lowering once.
 773                          */
 774                         lower_flrp = 0;
 775                 }
 776
 777                 NIR_PASS(progress, nir, nir_opt_undef);
 778                 NIR_PASS(progress, nir, nir_opt_loop_unroll,
 779                          nir_var_shader_in |
 780                          nir_var_shader_out |
 781                          nir_var_function_temp);
 782         } while (progress);
 783
 784         NIR_PASS(progress, nir, nir_opt_algebraic_late);
 785         NIR_PASS(progress, nir, bifrost_nir_lower_algebraic_late);
 786         NIR_PASS(progress, nir, nir_lower_alu_to_scalar, NULL, NULL);
 787         NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
 788
 789         /* Take us out of SSA */
 790         NIR_PASS(progress, nir, nir_lower_locals_to_regs);
 791         NIR_PASS(progress, nir, nir_convert_from_ssa, true);
 792
 793         /* We're a primary scalar architecture but there's enough vector that
 794          * we use a vector IR so let's not also deal with scalar hacks on top
 795          * of the vector hacks */
 796
 797         NIR_PASS(progress, nir, nir_move_vec_src_uses_to_dest);
 798         NIR_PASS(progress, nir, nir_lower_vec_to_movs);
 799         NIR_PASS(progress, nir, nir_opt_dce);
 800 }
 801
 802 void
 803 bifrost_compile_shader_nir(nir_shader *nir, panfrost_program *program, unsigned product_id)
 804 {
 805         bi_context *ctx = rzalloc(NULL, bi_context);
 806         ctx->nir = nir;
 807         ctx->stage = nir->info.stage;
 808         ctx->quirks = bifrost_get_quirks(product_id);
 809         list_inithead(&ctx->blocks);
 810
 811         /* Lower gl_Position pre-optimisation, but after lowering vars to ssa
 812          * (so we don't accidentally duplicate the epilogue since mesa/st has
 813          * messed with our I/O quite a bit already) */
 814
 815         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 816
 817         if (ctx->stage == MESA_SHADER_VERTEX) {
 818                 NIR_PASS_V(nir, nir_lower_viewport_transform);
 819                 NIR_PASS_V(nir, nir_lower_point_size, 1.0, 1024.0);
 820         }
 821
 822         NIR_PASS_V(nir, nir_split_var_copies);
 823         NIR_PASS_V(nir, nir_lower_global_vars_to_local);
 824         NIR_PASS_V(nir, nir_lower_var_copies);
 825         NIR_PASS_V(nir, nir_lower_vars_to_ssa);
 826         NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
 827         NIR_PASS_V(nir, nir_lower_ssbo);
 828
 829         bi_optimize_nir(nir);
 830         nir_print_shader(nir, stdout);
 831
 832         panfrost_nir_assign_sysvals(&ctx->sysvals, nir);
 833         program->sysval_count = ctx->sysvals.sysval_count;
 834         memcpy(program->sysvals, ctx->sysvals.sysvals, sizeof(ctx->sysvals.sysvals[0]) * ctx->sysvals.sysval_count);
 835
 836         nir_foreach_function(func, nir) {
 837                 if (!func->impl)
 838                         continue;
 839
 840                 ctx->impl = func->impl;
 841                 emit_cf_list(ctx, &func->impl->body);
 842                 break; /* TODO: Multi-function shaders */
 843         }
 844
 845         bool progress = false;
 846
 847         do {
 848                 progress = false;
 849
 850                 bi_foreach_block(ctx, _block) {
 851                         bi_block *block = (bi_block *) _block;
 852                         progress |= bi_opt_dead_code_eliminate(ctx, block);
 853                 }
 854         } while(progress);
 855
 856         bi_print_shader(ctx, stdout);
 857         bi_schedule(ctx);
 858
 859         ralloc_free(ctx);
 860 }